Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC...

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Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register-based machines. Also look forward to next week’s work on Software, computer programming languages.

description

S1 ? ?

Transcript of Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC...

Page 1: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

Session 4: Atomic Language.

Take Turing Machine

Look back to 1st session’s work on hardware, RISC and CISC register-based machines.

Also look forward to next week’s work on Software, computer programming languages.

Page 2: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

S1

?

S1

?

S2

S1

S2

Sn

Page 3: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

S1

?

S1

?

Page 4: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

ax

eax

rax

Page 5: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

0a

q

s1a2a 0b 1b 2b

m n

4 2 1 1 2 4

(s,m,n,q) (s*,m*,n*,q*)

Page 6: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

4 2 1 1 2 4

Page 7: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

0a

q

s1a2a 0b 1b 2b

m n

4 2 1 1 2 4

(s,m,n,q) (s’,m’,n’,q’)

Page 8: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

sm n

8 4 2 1 1 2 4 8

0 1 1 0 1 1 1 0

(s,m,n) = ( , , )

Page 9: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

s*m* n*

8 4 2 1 1 2 4 8

0 1 1 0 1 1 1 0

(s*,m*,n*) = ( , , )

Page 10: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

sm n

8 4 2 1 1 2 4 8

0 1 1 1 0 1 1 0

(s,m,n) = ( , , )

Page 11: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

s*m* n*

8 4 2 1 1 2 4 8

0 1 1 1 0 1 1 0

(s*,m*,n*) = ( , , )

Page 12: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

* ( / 2)* 2* / 2

s rem nm s mn n

Page 13: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov reg,0 Put 0 into register “reg”

inc reg Add 1 to the contents of register “reg”

decjmpreg reg,lab If register “reg” is zero, jump to the label “lab” else subtract 1 from “reg” and do the next instruction

jmp lab Jump straight to the label “lab”

hlt Halt

Page 14: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

inc reg Add 1 to the contents of register “reg”

decjmpreg reg,lab If register “reg” is zero, jump to the label “lab” else subtract 1 from “reg” and do the next instruction

Page 15: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

assume ecx is zeroinc ecxinc ecxinc ecx

assume ecx is zeroL1: …

…decjmpreg ecx,L1

Page 16: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov ecx,3mov eax,0mov ebx,0

L3: decjmpreg ecx,L4inc ebxjmp L3

L4: nop

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 17: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov eax,0inc eaxhlt

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 18: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov ecx,3 decjmpreg ecx,L1L1: hlt

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 19: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov ecx,3L2: decjmpreg ecx,L1 jmp L2L1: hlt

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 20: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

is S = q?

read line

inc line pointer

end ofTable?

end (error)

is “read” = s? inc line pointer

move left/right

write in cell

Current state

read write moveL / R

New state

write in cell end ofTable?

end (error)

Page 21: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

main PROC

mov ecx,N

mov eax,0

l1: mov ebx,0

decjmpz l2

inc ebx

decjmpz l2

inc eax

jmp l1

l2: hlt

main ENDP

ecx ebx eax

Page 22: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

m

s

n

z

ALU

sm n

Page 23: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

m

s

n

z

ALU z = 2m

* ( / 2)* 2* / 2

s rem nm s mn n

z = z + s

m* = z

s* = rem(n/2)

n = z

z = n/2

Page 24: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov ecx,5mov eax,0

L3: mov ebx,0decjmpreg ecx,L4inc ebxdecjmpreg ecx,L4inc eaxjmp L3

L4: hlt

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 25: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov ecx,5mov eax,0

L3: mov ebx,0decjmpreg ecx,L4inc ebxdecjmpreg ecx,L4inc eaxjmp L3

L4: hlt

eax

ebx

ecx

edx

5

0

0

4

1

3

1

eax

ebx

ecx

edx

0

2

1

1

2

eax

ebx

ecx

edx

0

0

1

Page 26: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov ecx,3mov eax,0

L3: decjmpreg ecx,L4inc eaxinc eaxjmp L3

L4: hlt

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 27: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov eax,3mov edx,0

L3: decjmpreg eax,L4inc edxinc edxjmp L3

L4: hlt

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 28: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov ecx,3L3: mov eax,0

decjmpreg ecx,L4inc eaxjmp L3

L4: hlt

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 29: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov reg,0inc regdecjmpz Ljmp L

Page 30: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.
Page 31: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.
Page 32: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.
Page 33: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.
Page 34: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.
Page 35: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.
Page 36: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov ecx,3mov ebx,0

L3: decjmpreg ecx,L4inc ebxinc ebxjmp L3

L4: hlt

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 37: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov ecx,3mov ebx,0

L3: decjmpreg ecx,L4inc ebxinc ebxjmp L3

L4: hlt

eax

ebx

ecx

edx

3

0

2

1

2

eax

ebx

ecx

edx

1

3

4

eax

ebx

ecx

edx

0

5

6

Page 38: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

……

L1: decjmpreg ecx,L2jmp L1

L2 …

eax

ebx

ecx

edx

3

2

eax

ebx

ecx

edx

1

eax

ebx

ecx

edx

0

Page 39: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

L2: decjmpreg eax,L1inc edxinc edxjmp L2

L1: decjmpreg ebx,L3inc edx

L3: decjmpreg edx,L4inc eaxjmp L3

L4: mov ebx,0decjmpreg ecx,L6inc ebxdecjmpreg ecx,L6inc edxjmp L4

L6: decjmpreg edx,L7inc ecxjmp L6

L7: hlt

eax holds m ebx holds s ecx holds n edx holds z

If s is 1 z = z + 1

z = 2m

m* = z

s* = rem(n/2) z = n/2 whole

n* = z

Page 40: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

rem whole

1 2 4 8 1 2 4 8

8 4 2 1 8 4 2 1

Page 41: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

8 4 2 1 8 4 2 1

Page 42: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

decjmpreg ebx,L3inc edx

L3:

Page 43: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

eax holds m ebx holds s ecx holds n edx holds z

Page 44: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

sm n

8 4 2 1 1 2 4 8

0 1 1 0 1 1 1 0

Page 45: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

sm n

8 4 2 1 1 2 4 8

0 1 1 1 0 0 0 11

Page 46: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

sm n

8 4 2 1 1 2 4 8

0 1 1 1 0 0 0 11

Page 47: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

; get current state

; read current symbol s. (Read ebx)

; get new state using value of s (in ebx)

; write new symbol. (Write to ebx)

; get the movement direction

; execute the movement code (left or right)

Page 48: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

; assume we start in state 0

; write the starting symbol into ebx

; write the code for move right or move left

; write the new symbol into ebx

; jump to the new state code

; repeat lines 2 to 4

Page 49: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

The movement code (left or right) depending on the state

Page 50: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

1

2

x

y

Page 51: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

Head move

right code

Head move

left code

Page 52: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

read the symbol sstore sif(s == 0), set s = 0 and jmp to move-right codeif(s == 1), set s = 0 and jmp to move-right code

use the stored s

if(s == 0), jump to the even state code

if(s == 1), jump to the odd state code

Page 53: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov eax,3inc eaxinc ebx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 54: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov ecx,2L1: decjmpreg ecx,L2

jmp L1L2: hlt

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 55: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

mov eax,0mov ecx,2

L1: decjmpreg ecx,L2inc eaxjmp L1

L2: hlt

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 56: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

read the symbol sstore sif(s == 0), set s = 0 and jmp to move-right codeif(s == 1), set s = 0 and jmp to move-right code

use the stored s

if(s == 0), jump to the even state code

if(s == 1), jump to the odd state code

Code for read-write

head moveleft

Code for read-write

head moveright

Current State S

Symbol read s

Symbol to write s*

Direction to move d

New state S*

Even 0 0 R Even

Even 1 0 R Odd

Even @ 0 N Halt

StateEven

Page 57: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

0 1 1 1

8 4 2 1 8 4 2 1

0 1 1 1

8 4 2 1 8 4 2 1

1 11 1 1 0

1 2 4 8 1 2 4 8

Page 58: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

eax

ebx

ecx

edx

Page 59: Session 4: Atomic Language. Take Turing Machine Look back to 1 st session’s work on hardware, RISC and CISC register- based machines. Also look forward.

Turing MachineTable

Tape t

R/W Head