Serial Communications Introduction to UART and USART Intel 8250 and 8251.

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Serial Communications Introduction to UART and USART Intel 8250 and 8251

Transcript of Serial Communications Introduction to UART and USART Intel 8250 and 8251.

Page 1: Serial Communications Introduction to UART and USART Intel 8250 and 8251.

Serial Communications

Introduction to UART and USART

Intel 8250 and 8251

Page 2: Serial Communications Introduction to UART and USART Intel 8250 and 8251.

Outline

• Concept of serial communications

• Synchronous, Asynchronous

• RS-232 standard

• Hand shaking

• UART and USART chips

• 8250 and 8251 chips

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What is Serial Communication

Page 4: Serial Communications Introduction to UART and USART Intel 8250 and 8251.

Serial Communication Types

• In Terms of Data on a Line

– Asynchronous

– Synchronous

• In Terms of Number of Senders

– Simplex

– Half duplex

– Full duplex

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Transfer Types

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Asynchronous Data Framing

Idle (high): MarkLow: Space

Overhead? (parity, start, stop)

Sending Character ‘A’ = 0x41 on the Line

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Vocabulary

• DTE– data terminal equipment

– e.g. computer, terminal

• DCE– data communication equipment

– connects DTE to communication lines

– e.g. modem

• Data Transfer Rate– Baud Rate Baud (Symbol representing n

bits)

– BPS Bit per second

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RS-232 Standard

• EIA 232 = ITU-T V.24/V.28

• Specifies the interface between DTE and DCE:– V.28 : mechanical and electrical characteristics

– V.24 : functional and procedural characteristics

• Even used in applications where there is no DCE– e.g. connecting computer to printer, magnetic card

reader, robot, … etc.

• Introduced in 1962 but is still widely used

• Stand for Recommended Standard

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DTE Connections

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Mechanical Characteristics

• 25-pin connector– 9-pin connector is more commonly found in IBM-PC but it

covers signals for asynchronous serial communication only

• Use male connector on DTE and female connector on DCE

• Note: all signal names are viewed from DTE

Page 11: Serial Communications Introduction to UART and USART Intel 8250 and 8251.

25-Pin RS232 Connector

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9-Pin RS232 Connector

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Electrical Characteristics

• Single-ended– one wire per signal, voltage levels are with respect to

system common (i.e. signal ground)

• Mark: –3V to –15V– represent Logic 1, Idle State (OFF)

• Space: +3 to +15V– represent Logic 0, Active State (ON)

• Usually swing between –12V to +12V

• Recommended maximum cable length is 15m, at 20kbps

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TTL to RS-232

Line drivers and line receivers

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RS-232 Frame Format

…0b0

1b nb p 1s 2sStart bit

ASCIIParity Stop bit

111101000001111

Idle A

Example

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RS232 Logic Waveform

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Function of Signals

• TD: transmitted data

• RD: received data

• DSR: data set ready– indicate whether DCE is powered on

• DTR: data terminal ready– indicate whether DTR is powered on

– turning off DTR causes modem to hang up the line

• RI: ring indicator– ON when modem detects phone call

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Function of Signals

• DCD: data carrier detect– ON when two modems have negotiated successfully and the

carrier signal is established on the phone line

• RTS: request to send– ON when DTE wants to send data

– Used to turn on and off modem’s carrier signal in multi-point (i.e. multi-drop) lines

– Normally constantly ON in point-to-point lines

• CTS: clear to send– ON when DCE is ready to receive data

• SG: signal ground

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Flow Control

• Means to ask the transmitter to stop/resume sending in data

• Required when:– DTE to DCE speed > DCE to DCE speed

(e.g. terminal speed = 115.2kbps and line speed = 33.6kbps, in order to benefit from modem’s data compression protocol)

» without flow control, the buffer within modem will overflow – sooner or later

– the receiving end takes time to process the data and thus cannot be always ready to receive

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Hardware Flow Control

• RTS/CTS– the transmitting end activates RTS to inform the receiving

end that it has data to send

– if the receiving end is ready to receive, it activates CTS

– normally used between computer and modem

» computer is always ready to receive data but modem is not, because terminal speed > link speed

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Software Flow Control

• Xon/Xoff– when the buffer within the receiving end is nearly full,

Xoff is sent to the transmitting end to ask it to stop

– when data have been processed by the receiving end and the buffer has space again, Xon is sent to the transmitting end to notify it to resume

– advantage: only three wires are required (TD, RD and GND)

– disadvantage: confusion arises when the transmitted data (e.g. a graphics file) contains a byte equal to 13H (Xoff)

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RS-232 (con)

• Communication between two nodes

x-off

x-on

data transmission

transmitter

receiver

receiver

RTS

CTS

CTS

CTS

CTS

TD

RTS

RD

transmitter

data transmission

Are you ready to receive?

No

Yes

Send character

Software Handshaking

Hardware Handshaking

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Null Modem Cables

• Used to directly connect two DTEs together

• Many possibilities – depending on whether and how the two DTEs handshake (i.e. doing flow control)

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Null Modem Cables Examples

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Other Standards

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UART in PC

115200*16=1843200

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8250/16450/16550 UART

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Registers

• Transmitter holding register

• Receiver buffer register

• Interrupt enable register

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Registers

• Interrupt identification register

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Line Control

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Modem Registers

Modem Control Register

Modem Status Register

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Line Status

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Divisor Register

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Example

Program the divisor Latch for 300 baud. Assume Xin=1.8432MHz The Base Address: 0x3F8

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Example 2

Program the divisor Latch for 2400 baud. Assume Xin=1.8432MHz The Base Address: 0x3F8

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Example 3

Program 8250 for 2400 baud, 8 data bit, even parity and 1 stop bit. Assume Xin=1.8432MHz The Base Address: 0x3F8

MOV AL,80H ; Accessing DLABMOV DX,3FBH ;Line Control Register AddressOUT DX,ALMOV AX,48 ;baud=2400 115200:48=2400MOV DX,3F8H ;Low byte of DivisorOUT DX,ALMOV AL,AHINC DXOUT DX,ALMOV AL,00011011 ; DLAB,Break,Even,1 stop, 8 dataMOV DX,3FBH ;LCROUT DX,AL

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Synchronous Protocols

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CRC

In SDLC:G(X) = x**16 + x**12 + x**5 + 1

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8251 Block Diagram

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8251 Registers

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Mode Register

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Mode Instruction (Asynchronous)

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Mode Instruction (Synchronous)

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Command Register

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Status Register

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8251 Timing

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8251 USART Interface

A7A6A5A4A3A2A1

IO/M

D[7:0]

RD RDWR WRA0 C/D

CLK CLKTxCRxC

TxD

RxD

8251 RS232

Page 48: Serial Communications Introduction to UART and USART Intel 8250 and 8251.

Programming 8251

8251 mode register

7 6 5 4 3 2 1 0 Mode register

Number of Stop bits

00: invalid01: 1 bit10: 1.5 bits11: 2 bits

Parity0: odd1: even

Parity enable0: disable1: enable

Character length

00: 5 bits01: 6 bits10: 7 bits11: 8 bits

Baud Rate

00: Syn. Mode01: x1 clock10: x16 clock11: x64 clock

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Programming 8251

8251 command register

EH IR RTS ER SBRK RxE DTR TxE command register

TxE: transmit enableDTR: data terminal readyRxE: receiver enableSBPRK: send break characterER: error resetRTS: request to sendIR: internal resetEH: enter hunt mode

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Programming 8251

8251 status register

DSR SYNDET FE OE PE TxEMPTYRxRDY TxRDY status register

TxRDY: transmit readyRxRDY: receiver readyTxEMPTY: transmitter emptyPE: parity errorOE: overrun errorFE: framing errorSYNDET: sync. character detectedDSR: data set ready

Page 51: Serial Communications Introduction to UART and USART Intel 8250 and 8251.

Simple Serial I/O Procedures

Read

start

Check RxRDY

Is it logic 1?

Read data register*

end

Yes

No

* This clears RxRDY

Write

start

Check TxRDY

Is it logic 1?

Write data register*

end

Yes

No

* This clears TxRDY