Sept 25, 2008 PHENIX RPC review C.Y. Chi 1 RPC Front End Electronics On chamber discriminator The...

Sept 25, 2008PHENIX RPC review

C.Y. Chi 1

RPC Front End Electronics On chamber discriminator

The strips The CMS discriminator chips The discriminator board Test results

The TDC board The TDC and Crate block diagram The TDC board test result The trigger board

The board counts Status


C.Y. Chi 2

020406080

100120140160180

1 3 5 7 9 11 13 15 17 19

RPC Strip Our chamber closely follows the CMS design. Our on-chamber

electronics will try to follow their electronics too. The CMS barrel strips are 1.3m long, 4 cm or 2cm wide.

15/40 ohms impedance. 420pf/160pf capacitance. Fully terminated strips.

CMS encap RPC Cover 5/16 degree in phi, 7 to 38mm in width and 22 to 55 cm in

length Un-terminated. Lemo cables are used to connect strip to the discriminator board

PHENIX RPC strip width range from 11.4 mm by 141mm to 64.6 mm by 554.2mm. The smallest one has 46 ohms impedance and 16 pf of

capacitance. The largest one has 10 ohms impedance and 286 pf of

capacitance.


C.Y. Chi 3

CMS RPC preamp/discriminator chipBuild on AMS 0.8 um BiCMOS process, +5V device. 15 ohms input impendence.

45mW/channel. 8 channels per chip. It is designed in Bari, Italy.

It has preamp, gain stage, zero crossing discriminator, monostable (cover the dead time) and LVDS driver.

The chip is designed to deal with 20 fC up to 20 pC with1.7fC ENC noise.

Zero crossing is necessary to deal with large dynamic range.

The time walk is about .6ns except for very large charge.

Testing shows that threshold level could be as high as 100fc without loosing efficiency.


C.Y. Chi 4

Chip production With help of Giuseppe Isaelli and Flavio Loddo from Bari Italy,

we got 4 32 channel CMS boards about 1.5 years ago. These boards work both on the bench in Nevis and in chamber

testing in University of Colorado. We decide to use the CMS RPC chip as the frontend

discriminator chips. With help of Flavio, the chip production started at end of the last

year. The wafer is fabricated in AMS through EuroPratice and

packaged in Taiwan The chip testing is done by Matrix. (the same company did the

CMS RPC chip testing) The yield is around 99%, few bad chips out of ~2000

We now have twice more chips than we needed in hand.


C.Y. Chi 5

Cable adapter board

RPC 32 channel discriminator board

32 channels per boardFused +6V input analog/digital power supply ~.46A(use +5V, +3V through low drop regulators)

Serial download is used to set 10 bits 4 channel threshold DAC (4mv per bin) andFire test pulse. One DAC setting per chip.

LVDS discriminator output

Serial download

The design is following closely the CMS design


C.Y. Chi 6

RPCdisc32ch

3M6834-4500PL

Or8534-4500pl

RPCTDC64ch

Half octant Detector

Module edge

AdapterBoard

AdapterBoard

2-3 m cable ? 8-18 meters cable ?

2-3 m cable? 8-18 meter cable ?

3M (Gray)3432-5302

3M (Black)3432-

5302RB

3M (Gray)3417-6640

3MN3432-L302RB

3M (Black)D89140-????

Signal Cable : 40 conductors twist flat ribbon cable

3M (gray)3431-5302

3M4640-7300

3M 1700/40 Twisted Pair, Flat Cable, .050" 28 AWG StrandedFire rating VW-1

16 short RG174 cables

Connection diagram


C.Y. Chi 7

The discriminator’s threshold is moving 4mv per step. The test pulse is feed to the input amplify through 1pf cap.(not for calibration, functional check only)

Channel 14 TDC distribution, DAC step =80

TD

C

step

On board test pulse vs. threshold study

TDC bin size ~2.5nsRange from 0 to 43


C.Y. Chi 8

Direct Pulse Injection (fixed threshold) & Cross Talk Study

Inject test pulse through the cable adapter card + 10pf capacitance (channel 45)

2mv per step, 160mv threshold (~80fc)

Cross talk seen at round 100mv on channel 46.

Input (steps)

Channel 45

TD

C

Channel 46Channel 44

disc.fired

No disc fired

No disc fired


C.Y. Chi 9

DISC LVDS output at discriminator board

DISC output after

~10 meter cables

69 ns time difference1.61ns/ft ~42 ft

Digitally subtracted pulse between+ and – side of discriminator LVDS output

500mv per division

1.4V

1.63V

RMS on the TDC distribution at step=60

0

0.1

0.2

0.3

0.4

0.5

0.6

0 20 40 60 80

channel

RM

S

rms

Long output cable study 1


C.Y. Chi 10

Short Cable

Disc threshold

TDC

79 ft cable (~24 meters)

Long output cable study 2

100 mv/div 50ns/div

The station 3 cable length could be along as 20 metersAlthough the result looks O.K., but this is in a lab environment.

Digitally subtracted pulse


C.Y. Chi 11

DISC

LVD

SR

eceiver

Triggerwindow

32 channeldigitizer

PLLTest

Pulse

LVDSTransmitter

4x beam clock

44X BC

44X BC Test Pulse

MA

SK

Serial

do

wn

load

Disc Serialdownload

TDC serial download

Interface Chip

Collects 64

ChannelOf

Data

DigitizedData

L1 trigger etc

L1 trigger primitives

L1 trigger primitives

Serial DownloadTiming etc.

EventData

EventData

RPC TDCMODULE


C.Y. Chi 12

The TDC Internal Test Pulse Scan

test pulse step test pulse step

av

era

ge

TD

C

va

lue

Sig

ma o

n th

e T

DC

TDC:

Use 44X beam crossing clock to digitized the discriminated LVDS pulse, ~2.5ns for 9.6MHz RHIC clock

Test Pulse:

Generated internally with the FPGA with the same 44x beam crossing clock

Trigger Window:

The lower and upper limits be can set channel by channel

Mask:

Mask bits can be set to turn off individual channel.

Serial data to Discriminator Board:

Control test pulse firing and discriminator threshold ( chip by chip)

TDC Module


C.Y. Chi 13

RPC(HBD) crate/BUS structure 6Ux160 mm VME size

TDC

TDC

OutputTo L1

Clockfanout

L1 primitives

L1

GT

M Slo

wC

on

tro

l

TDCs XMIT

DC

M

Clock Master

RPC FEM crate

optical cable


C.Y. Chi 14

Trigger data from FEM1 pair of cable per FEM

Arria FPGADe-serializedFEM data &

format triggerdata

Transceiver

blocks

RPC Trigger Board

Optical transmitter

Optical transmitter

2.8 Gbits/sec

RPC triggers has been layed out and proceeded to fabrication.

The module can receive up to 6 (8) FEM’s trigger dataThe optical trigger data contains, idle, clock numbers and up to 12 16bits

FEM trigger data every beam crossing.

15

Channel count etc… (one side)

Station 1a+b 3 total

Channel 3072 2872 5944

Channel per FEM (TDC)

64 64

FEM (TDC) 48 48 96

Disc Board 96 96 192

L1 trigger Fibers 8 8 16

FEM/ L1 fibers

6 6

Support board/crate 3 3

FEM/crate 12 12

Crates 4 4 8

The discriminator board is mounted on chamber

The TDC, Trigger module is located in the readout crate.


C.Y. Chi 16

Production QA

For discriminator boards We do even/odd channel direct pulse inject

through a 12 bits DAC pulser vs. threshold We do on board test pulse test vs. threshold

For TDC boards Fire the discriminator on board test pulse can

check the data TDC internal test pulse scan Data to L1 trigger board test. ( still need to be

works out)


C.Y. Chi 17

STATUS The discriminator and TDC modules have been

successfully prototyped. Waiting for on chamber testing.

Grounding issue need to be resolved with chamber testing CMS 32 channel board has been tested in both

Colorado and BNL factory. We are building, 40 discriminator modules, 20 TDC

boards, 3 sets of crates+ clock master modules for the coming run and individual factory readout/test stand.

Trigger modules is designed and proceed to fabrication.


C.Y. Chi 18

Production Outlook The production cycle normally last about 6

months. This includes, fabricating boards, buying parts, board assembly and testing. For the RPC3 N discriminator board, we have

most of parts on hand already. We will start production around Nov this year.

Sept 25, 2008 PHENIX RPC review C.Y. Chi 1 RPC Front End Electronics On chamber discriminator The...

Documents

Transcript of Sept 25, 2008 PHENIX RPC review C.Y. Chi 1 RPC Front End Electronics On chamber discriminator The...