Design 3 Bit Flash Analog to Digital Converters

Guide By :-Ass.Prof J.C.Prajapati

Presented by:Hetang Chauhan 15014031002

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U.V.PATEL COLLEGE OF ENGINEERING

Contains:-

• Introduction• What is Flash ADC• Block Diagram • Flash ADC Circuit• Analog to Digital Conversion• Simulation of Comparator • Simulation of 8:3 Encoder• Simulation of 3-Bit Flash ADC• References

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Introduction

• Analog-to-digital converters (ADC’s) are the most distinguished signal circuits which interface the analog signals.

• ADC’s includes three essential parameters which cannot be changed once it has been designed and the parameters are resolution, speed and power consumption.

• There are number of architectures available to develop an ADC that depends upon speed, accuracy, resolution.

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What is Flash ADC

• Consists of a series of comparators, each one comparing the input signal to a unique reference voltage.

• The comparator outputs connect to the inputs of a priority encoder circuit, which produces a binary output

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Block Diagram

Fig 1.1 Block Diagram of ADC[1]

Analog to Digital Converter (ADC) is a device that accepts an analog value (voltage/current) and converts it into digital form.

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3bit Flash ADC

Fig 1.2 Block Diagram of Flash ADC [17]

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• As the analog input voltage exceeds the reference voltage at each comparator, the comparator outputs will sequentially saturate to a high state.

• The priority encoder generates a binary number based on the highest-order active input, ignoring all other active inputs.

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Analog to Digital Conversion

• Sampling - In signal processing, sampling is the reduction of a continuous signal to a discrete signal.

• Quantizing - breaking down analog value is a set of finite states.

• Encoding - assigning a digital word or number to each state and matching it to the input signal

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Anal

og s

igna

l

Sampling

Digital signalQuantized signal

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Comparator Circuit

Fig.1.3 Two stage CMOS open loop comparator [1]05/01/23 10

For N-channel [16]

For P-channel [16]

Comparator Symbol

Fig.1.4 Two stage CMOS open loop comparator symbol [1]

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Simulation Result of Comparator

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Fig.1.5 Comparator Output

8:3 Priority Encoder

Fig.1.6 priority encoder 8:3 [1]

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Truth Table of 8 to 3 priority encoder

Table-1:Truth Table [1]

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Simulation Result

Fig.1.7 input of priority encoder 8:3 [1]

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Simulation Result

Fig .1.8 output of priority encoder 8:3[1]

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Simulation of 3-Bit flash ADC

Fig.1.9 3-Bit Flash ADC [1]05/01/23 17

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Simulation Results

Fig.1.10 input and output of ADC with 90 degree phase

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Simulation Results

Fig.1.11 input and output of ADC with 180 degree phase

Simulation Results

Fig.1.12 input and output of ADC with 360 degree phase

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Specification Summary for Flash ADC

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Table 2 Specification of Flash ADC

References [1] Neha, Amana Yadav” Design and Implementation of Low Power 3-

Bit Flash ADC Using 180nm CMOS Technology”. Int. Journal of Engineering Research and Applications www.ijera.com ISSN: 2248-9622, Vol. 6, Issue 6, (Part - 3) June 2016, pp.77-82[2] Abhishek rai, B Ananda Venkatesan, “Analysis and design of High

Speed and Low Power Comparator in ADC”, International Journal of Engineering Development and Research (IJEDR), 2014.

[3] Anand Kumar Singh, Anuradha, Dr. Vijay Nath, “Design and Performance analysis of Low power CMOS Op-Amp.”, International Journal of Engineering Sciences & Research Technology. 2014 .[4] Dharmendra B. Mavani, Arun B.Nandurbarkar, “Study and Implementation of comparator in CMOS 50nm Technology”, International Journal Of research and engineering Technology (IJRET), Volume 3, Feb. 2014.

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[5] T.Maneesha, T.S Ghouse Basha, “Design Of Low Voltage low Power Inverter based comparator using CMOS technology”, International Journal of emerging Engineering Research and Technology(IJEERT), Volume 2, September 2014.[6] Sujeet Mishra, Balchand Nagar, “Design of a TIQ comparator for high speed and low power 4-bit Flash ADC”, International Journal of Emerging Technologies in Computational and Applied science (IJETCAS), 2013. [7] Marcel Siadjine njinowa, “Design of low power 4-bit flash ADC based on standard cells”, New Circuits and Systems Conference (NEWCAS), 2013, IEEE. [8] M Subba Reddy, S. Tipu Rahaman, “An effective 6-bit flash ADC using low power CMOS technology”, Advanced Computing Technologies (ICACT), 2013, IEEE.

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[9] Smriti Subhanad, Dr. H.P Shukla, A.G Rao, “Design and Simulation of a high speed CMOS Comparator”, International journal Electronics and Communication Engineering, ISSN 0974-2166 Volume 6, 2013 [10] Sujeet Mishra, Balchand Nagar, “Design of a TIQ comparator for high speed and low power 4-bit Flash ADC”, International Journal of Emerging Technologies in Computational and Applied science (IJETCAS), 2013. [11] Pradeep Kumar, Amit Kolhe, "Design & Implementation of Low Power 3-bit Flash ADC in 0.18μm CMOS", International Journal of Soft Computing and Engineering (IJSCE), ISSN: 2231-2307, Volume-1, Issue-5, November, 2011. [12] Vinayashree Hiremath, Saiyu Ren “An Ultra High Speed Encoder for 5GSPS Flash ADC “,IEEE Conference on Instrumentation andMeasurement Technology, pp 136-141, May 2010.

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[13] A. Mahesh Kumar, Venkat Tumamala, “Design of a Low Power, Variable-Resolution Flash ADC”, 22nd International Conference on VLSI Design, 2009, IEEE [14] Sheikhaei, S. Mirabbasi, A. Ivanov, “An Encoder for a 5GS/s 4bit flash A/D converter in 0.18um CMOS”, Canadian Conference on Electrical and Computer Engineering, pp 698 701,May 2005.[15] Phillip E. Allen and Douglas R. Holberg, CMOS Analog Circuit Design, Oxford University Press, Inc. 2002.[16] Sung-mo Kang, Yusuf Leblebici, “CMOS Digital Integrated Circuits: Analysis and Design”, third edition, Tata McGraw-Hill edition 2003.[17] Y.-T. Wang and B. Razavi, “An 6-bit 150-MHz CMOS A/D Converter,” IEEE Journal of Solid-State Circuits, 35(3):308-317, March 2000.

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Thank you …

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