Semiconductor modeling in Caspoc

INTRODUCTION 2

DIODE MODELS 2

POWER MOSFET MODEL. 4

Spice Mosfet Model 4

Caspoc Mosfet Model 5

THERMAL MODEL. 8

Thermal model from a Field analysis 9

PARASITIC INDUCTANCE 10

Introduction

There are many mysteries around the modeling of power semiconductors. In this publication we will elaborate which models are available, what parameters are of use for power electronics simulations and we will give a more detailed description of the models available in Caspoc.

In Caspoc use can be made of the standard mosfet and diode models and their parameters. The ".Model" description can be included in the "Command Editor" or included as include text files in the "Include" section.

If a model is provided in a subcircuit, the netlist from that subcircuit can be placed in a "NetList" circuit component. The "NetList" circuit component excepts a subset of the Spice 2G6 format.

Diode modelsThe standard diode model in Spice was originally developed for low power signal diodes. However the diode spice model is fully modeled in Caspoc.Spice model disadvantages:

No adequate reverse recovery model

In Caspoc also a diode model with reverse recovery is modeled. In the simulation below the difference between hard (blue trace) and soft recovery (red trace) is shown in the lower Scope(2)

There is a template for translating data from a reverse recovery measurement into model parameters.

The Caspoc - spice model can be found in the library under semiconductors. In the simulation below the red trace in the scope shows the reverse recovery current of the diode. Observe the model parameters in the text editor. In this simulation the reverse recovery is modeled by the non-linear capacitor CJO.

Power Mosfet model.The standard mosfet model in Spice is more suited for power mosfet simulation, however lacks two important features:1. Non-linear behavior of the capacitance2. Not temperature depending

In Caspoc the capacitance CGD is depending on the voltage VDG across it. RDS(on) and KP are temperature dependent.

Spice Mosfet ModelThere exist various mosfet models for implementation in Spice. Using the standard model the parameters are to be provided using the ".Model" template.

If the model is described by a single ".Model" description you can use this model directly for the mosfet model from "Components/Library/Semiconductor/Mosfet". Use a "MName" block from Components/Blocks/Miscellaneous and specify the model name at "text1". Include the ".Model" description in the "Command Editor" or as include text files in the "Include" section.

The DC characteristics are suitable for power mosfet modeling for a specific temperature. For different temperatures the simulation has to run where the temperature is defined using the "Temp" variable. However the temperature is fixed during one simulation run. One has to perform a temperature sweep or monte carlo analysis to analyze the circuit for various temperatures.The capacitors Cgs, Cgd and Cds are modeled as constant parameters. Only the junction to base capacitors are non-linear, but they do not reflect the properties of power mosfets.

To overcome the problem of non-linear capacitors mosfet manufacturers are using subcircuits to model the mosfet. The bases of most of these models is a mosfet to model the transconductance of the mosfet, Id=f(Vds, Vgs, Vgs, Vgto) Extra circuitry is used to model the non-linear behavior of CGD. Two examples will elaborate this:

1. International Rectifier mosfet models:IR uses diodes and a lumped circuit model, to model the non-linear behavior of CGD. The spice

model has a non-linear junction capacitor described by

The gate capacitance is modeled by the internal constant gate-source capacitance of the mosfet model. A standard spice diode model models the anti-parallel body diode, where the reverse recovery is modeled using the parameter CJO.

2. Philips mosfet modelsPhilips uses an ideal mosfet to switch between the minimum and maximum value of CGD. CGS is modeled as a constant capacitor. A standard spice diode model models the anti-parallel body diode, where the reverse recovery is modeled using the parameters CJO and the transit time TT.

In both cases temperature dependence is only modeled by specifying the operating temperature.

These models can be used in Caspoc directly, if the models for the diode and mosfet are replaced with the internal Caspoc diode and mosfet models. The following steps describe this process.

1. Start with an empty Caspoc worksheet.2. Insert the "NetList" component from Components/Circuit/Miscellaneous 3. Insert the spice-subcircuit into the "NetList" component and remove the .SUBCKT and .ENDS

lines.

4. For each M component insert a mosfet model from Components/Library/Semiconductor/Mosfet. Remove the M component from the "NetList" and number the nodes according to the nodes from the removed M component. Add a MName block from Components/Blocks/Miscellaneous and specify the model name from the removed M component at "text1"

5. For each D component insert a diode model from Components/Library/Semiconductor/Diode. Remove the D component from the "NetList" and number the nodes according to the nodes from the removed M component. Add a MName block from Components/Blocks/Miscellaneous and specify the model name from the removed D component at "text1"

6. Export the created model where the exported nodes were the previous exported nodes in the .SUBCKT line.

At this moment the subcircuit has to be entered manually by the user, since no "M" element is supported in the "NetList" circuit component. Add the circuitry in a "NetList" component and use the diode and mosfet model from the Caspoc semiconductor library. (Not the ideal switched models!)However this approach will give you very large circuit models where workarounds are introduced to bypass the shortcomings in Spice. Therefore it is recommended use the internal Caspoc models for the mosfet and Diode.

Conclusions:Although various Spice models for semiconductors exist they mostly are a workaround for the shortcomings of Spice. The non-linear behavior of the capacitors is solved adequately by most manufacturers, but the temperature dependence is not modeled. Especially for Power Mosfets the Drain-Source on resistance and the transconductance coefficient KP is dependent on the junction temperature, which predicts the conduction losses.

Caspoc Mosfet ModelIn Caspoc there are basically three levels to model the mosfet.

1. Ideal switch model, with conduction losses modeled.Use this model top predict the system behavior of a converter.

2. Ideal switch model, with conduction and switch losses modeled (temperature dependent RDSon).Use this model to predict the system behavior and predict the losses of the component. The Drain to Source on resistance is dependent on the temperature, which in turn is dependent on the outcome of a heatsink model.

In the above figure the turn-on and turn-off losses of the IGBT's are modeled by specifying the VCE_sat, turn-on and turn-off delay times of the IGBT.

3. Non-linear model where Id is modeled as function of VDS, VGS and VTO(gate threshold voltage), temperature dependent and non-linear CDG.

In the above figure the IRF730 from International Rectifier is modeled using the following parameters:

It includes the following properties:

1. Non-linear DC dependence of Id=f(Vds,Vgs, Vto)2. Cdg is non-linear dependent on Vgd3. RDS-on and KP are dependent on the temperature

The model is set up using a template, which can be accessed, from the Tools section in the Caspoc Project Manager.

Parameters for this template can be inserted from any data sheet. The reverse conducting diode of the mosfet can be modeled using either:

1. Ideal model2. Model with reverse recovery

The ideal reverse conducting diode is included in the model of the mosfet. No reverse recovery is modeled in this case. To include also reverse recovery to the reverse conducting diode, a diode can be placed anti-parallel to the mosfet, being either the previous described Spice diode model or the model with the reverse recovery process modeled.

.Model IRF730 USER VTO=3volt KP=2.9 RD=1ohm+ CGS=700pF CGD=64pF CDS=170pF LD=1nH

Thermal model.

For the ideal models the thermal properties are not modeled. For the ideal models where losses can be predicted, a thermal model can be added. Also for the mosfet model a thermal model can be added.In principle a thermal model can be set up using the Heatsink blocks from the library where Rth and Cth are the parameters. For each thermal resistance a thermal model can be inserted and at the end an Ambient-Temperature block has to be specified. The simulated temperature from the simulation is input to the semiconductor model.The parameters for the thermal model can be taken from the heatsink data sheet or calculated from the geometric of the heatsink. If Zth(t) is provided by the heatsink manufacturer,

In the above model the library blocks are used to simulate the junction temperature as function of the by the mosfet produced heat. The library blocks contain linear ideal models.

Thermal model from a Field analysis

Using a thermal field solver program the heat transfer function T(s)=f(P(s),s) where s is the Laplace operator, can be calculated. The inputs for the field analysis are the produced losses from the mosfets, while the calculated temperature in the field simulation is input for the mosfet model. The following steps have to be taken to calculate the heat transfer function in a thermal field solver:

1. Set up the geometry for the heatsink in the 3D modeler for the thermal field solver2. Specify a step response for the injected power3. Perform a transient field analysis and record the temperature at the spot where the power is

injected(actually the place where the Mosfet is mounted to the heatsink)4. Transform both time domain wave forms for the injected power and calculated temperature into

the Laplace domain: P(s) and T(s)5. Calculate the heat transfer function in the laplace domain F(s)=T(s)/P(s)6. The heat transfer function can be modeled in Caspoc using the transfer function blocks from the

Caspoc library.

A direct coupling would also be possible, but then a coupled simulation of Caspoc and the field solver has to be carried out. Since the field analysis for a complex heatsink can be complex and time consuming the above mentioned method is preferred. In the shown example a 2nd order model for the heatsink is proposed, but higher order models can be applied.

Parasitic inductance

Building power electronics converter either on PCB or using bus bar's, introduces parasitic inductance in the circuit. Especially the parasitic inductance in series with the drain and source of the mosfet can lead to over-voltages and damage the semiconductor. Using a field solver, this parasitic inductance can be analyzed and included in the simulation.

The physical wiring of the semiconductors in the circuit give rise to parasitic inductance in the connections of the mosfet.In the simulation below a parasitic inductance of 5nH is placed in series with the drain of the mosfet. The voltage at node E (directly at the mosfet drain) is displayed by the yellow trace in the scope. The internal parasitic inductance of the mosfet LD=1nH. In the scope the over-voltage on node E can be observed during turn off.

The red trace shows the current through the parasitic inductance. Next to parasicic inductance's also parasitic capacitors can be modeled, where the capacitance is calculated using a field solver.This is important if bus-bars are used in the design, which can have a considerable capacitance. In many cases, snubber circuits can be made smaller or even omitted. From the above simulation also the temperature dependence of RDS is visible, since the rise in temperature increases RDSon and thereby also the voltage across the mosfet.(Yellow trace)