Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 –...

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EE143 – Ali Javey Section 6: Ion Implantation Jaeger Chapter 5 EE143 – Ali Javey Ion Implantation - Overview Wafer is Target in High Energy Accelerator Impurities “Shot” into Wafer Preferred Method of Adding Impurities to Wafers Wide Range of Impurity Species (Almost Anything) Tight Dose Control (A few % vs. 20-30% for high temperature pre-deposition processes) Low Temperature Process Expensive Systems Vacuum System

Transcript of Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 –...

Page 1: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Section 6: Ion Implantation

Jaeger Chapter 5

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Ion Implantation - Overview• Wafer is Target in High Energy Accelerator

• Impurities “Shot” into Wafer

• Preferred Method of Adding Impurities to Wafers– Wide Range of Impurity Species (Almost Anything)

– Tight Dose Control (A few % vs. 20-30% for high temperature pre-deposition processes)

– Low Temperature Process

• Expensive Systems

• Vacuum System

Page 2: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Equipment( )

( )dttInqA

Q

qr

mV

T

∫=

=

=

0

2

1 Dose Implanted

2 Field Magnetic

x q particle chargedon Force

B

BvF

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Ion Implantation

x

Blocking maskSi

+ C(x) as-implantdepth profile

Depth xEqual-Concentrationcontours

Reminder: During implantation, temperature is ambient. However, post-implant annealing step (>900oC) is required to anneal out defects.

Reminder: During implantation, temperature is ambient. However, post-implant annealing step (>900oC) is required to anneal out defects.

y

Page 3: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Advantages of Ion Implantation• Precise control of dose and depth profile• Low-temp. process (can use photoresist as mask)• Wide selection of masking materials

e.g. photoresist, oxide, poly-Si, metal

• Less sensitive to surface cleaning procedures• Excellent lateral uniformity (< 1% variation across 12” wafer)

n+n+

Application example: self-aligned MOSFET source/drain regions

SiO2

p-Si

As+As+ As+

Poly Si Gate

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Ion Implantation Energy Loss Mechanisms

Si+

+

Si

Si

e e

+ +Electronicstopping

Nuclearstopping

Crystalline Si substrate damaged by collision

Electronic excitation creates heat

Page 4: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Light ions/at higher energy more electronic stopping

Heavier ions/at lower energy more nuclear stopping

EXAMPLES Implanting into Si:

Ion Energy Loss Characteristics

H+

B+

As+

Electronic stoppingdominates

Electronic stoppingdominates

Nuclear stoppingdominates

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Stopping Mechanisms

E1(keV) E2(keV)B into Si 3 17P into Si 17 140As into Si 73 800

Page 5: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Simulation of 50keV Boron implanted into Si

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Model for blanket implantation

( ) ( )

( ) pp

p

p

pp

RNdxxNQ

R

R

RxNxN

Δ=

=

⎥⎥⎦

⎢⎢⎣

Δ

−−=

∫∞

0

p

2

2

2= Dose

StraggleR

Range Projected

2exp

ProfileGaussian

π

Page 6: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Rp and ΔRp values are given in tables or charts e.g. see pp. 113 of Jaeger

Note: this means 0.02 μm.

Projected Range and Straggle

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Selective Implantation

( ) ( ) ( )

( )

( ) solution ldimensiona-one is xN

straggle transverse

222

1

,

=Δ⎥⎥⎦

⎢⎢⎣

⎡⎟⎟⎠

⎞⎜⎜⎝

Δ+

−⎟⎟⎠

⎞⎜⎜⎝

Δ−

=

=

⊥⊥

R

R

ayerfc

R

ayerfcyF

yFxNyxN

Page 7: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Transverse (or Lateral) Straggle (ΔRt or Δ R⊥)

ΔRt

ΔRtΔRp

>1

ΔRt

ΔRp

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y

Mask

C(y) at x=Rp

x = Rp

Implanted specieshas lateral distribution,larger than mask opening

Implanted specieshas lateral distribution,larger than mask opening

x

y

Higher concentrationLowerconcentration

Feature Enlargement due to lateral straggle

Page 8: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Selective Implantation – Mask thickness

• Desire Implanted Impurity Level to be Much Less Than Wafer Doping

N(X0) << NB

or

N(X0) < NB/10

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What fraction of dose gets into Si substrate?

x=0 x=d

C(x)Mask material (e.g. photoresist)

Si substrate

C(x) Mask material with d=∞

x=0 x=d

-

Transmission Factor of Implantation Mask

Page 9: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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( ) ( )

( )

( )( )

T C x dx C x dx

erfcd R

R

erfc x e dy

C x d

C x R

d

p

p

yx

p

= −

=−⎧

⎨⎩

⎫⎬⎭

= −

==

∫∫

00

0

4

1

2 2

12

10

2

Δ

πRule of thumb Good masking thickness:

d R Rp p= + 4 3Δ. ~

are values of for ions intothe masking material

ΔRpRp ,

Transmitted Fraction

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Junction Depth

( )( )

⎟⎟⎠

⎞⎜⎜⎝

⎛Δ±=

=⎥⎥⎦

⎢⎢⎣

Δ

−−

=

B

pppj

Bp

pjp

Bj

N

NRRx

NR

RxN

NxN

ln2

2exp

2

2

The junction depth is calculated from the point at which the implant profile concentration = bulk concentration:

Page 10: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Channeling

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Use of tilt to reduce channeling

To minimize channeling, we tilt wafer by 7o with respect to ion beam.To minimize channeling, we tilt wafer by 7o with respect to ion beam.

Random component

channeledcomponent

C(x)

x

Axial ChannelingPlanar ChannelingRandom

Lucky ions fall into channel despite tilt

Page 11: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Si+

1 E15/cm2

Si crystal

Disadvantage : Needs an additional high-dose implantation stepDisadvantage : Needs an additional high-dose implantation step

B+

Si crystal

Amorphous Si

Step 1High dose Si+implantation to covertsurface layer intoamorphous Si

Step 2Implantation ofdesired dopantinto amorphous surface layer

Prevention of Channeling by Pre-amorphization

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With Accelerating Voltage = x kV

B+

P+

As+

Kinetic Energy = x · keV

B+++

B++ Kinetic Energy = 2x · keV

Kinetic Energy = 3x · keV

Singlycharged

Doublycharged

Triplycharged

Note: Kinetic energy is expressed in eV . An electronic charge q experiencing a voltage drop of 1 Volt will gain a kinetic energy of 1 eV

Kinetic Energy of Multiply Charged Ions

Page 12: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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BF2+

Kinetic Energy = x keV

BFF

B has 11 amuF has 19 amu

accelerating voltage= x kV+ -

%20191911

11

BFof.E.K

Bof.E.K

vm2

1Fof.E.K

vm2

1Bof.E.K

vvvVelocity

2

2BF

2BB

FFB

=++

⋅=

⋅=

==

+

Molecular ion will dissociate immediatelyinto atomic components after entering a solid.All atomic componentswill have same velocityafter dissociation.

SolidSurface

Molecular Ion Implantation

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Implantation Damage

Page 13: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Amount and type of Crystalline Damage

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(1) Restore Si crystallinity.

(2) Place dopants into Si substitutional sitesfor electrical activation

After implantation, we need an annealing step.A typical anneal will:

Post-Implantation Annealing Summary

Page 14: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Deviation from Gaussian Theory

• Curves deviate from Gaussian for deeper implants (> 200 keV)

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Shallow Implantation

Page 15: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Rapid Thermal Annealing

•Rapid Heating•950-1050o C•>50o C/sec•Very low dopant diffusion

(b)

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Dose-Energy Application Space

Page 16: Section 6 - Ion Implantationee143/fa09/lectures/Section_6_Ion_Implantation.pdfChanneling EE143 – Ali Javey Use of tilt to reduce channeling To minimize channeling, we tilt wafer

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Sheet Resistance RS of Implanted Layers

x

C(x) log scale

xj

CB

μ

1017 1019

μn

Total doping conc

μp

p-sub (CB)

n

( ) ( )[ ]∫ −μ⋅=

jx

0 B

S

dxCxCxq

1R

Example:n-type dopants implantedinto p-type substrate

x =0

x =xj

x