SD CARD PWR CTRL GDC CPU Subsystem I/O Subsystem · 5 5 4 4 3 3 2 2 1 1 d d c c b b a a avin0 avin1...

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RESET#

RESET#

MPLEX_CTRL

GDC_BCLKI

SD_CARD[7..0]

UART1_[7..0]

ETH_A[7..1]

CAN1_[1..0]

GDC_CTRL[11..0]

UART2_[3..0]

GPIO[17..0]

CAN_CTRL[3..0]

EXT_GPIO[2..0] CPU_D[31..0]

UART0_[7..0]

CAN0_[1..0]I2C[3..0]

RESET#0

CPU_D[31..0]

GDC_A[25..2]

ETH_CTRL[4..0]

SD_CARD_PWR_CTRL

USB_STAT[1..0]

Title

Size Document Number Rev

Date: Sheet o f

30420-001 PA3

467/GDC Evaluation Board

© mycable GmbHBoeker Stieg 43D-24613 AukrugGermanywww.mycable.de

A3

1 16Saturday, September 29, 2007

Top Top

Hierarchy Part References

467/GDC Evaluation Board

+---#1 Lime Platform Top ¦ +---#2 Power 1xx +---#3 Graphics Subsystem 2xx +---#4 GDC Extension 3xx +---#5 --- +---#6 Video I/O 4xx +---#7 Video In 48x +---#8 CPU Subsystem +---#9 CPU 5xx +---#10 RAM 59x +---#11 Flash 58x +---#12 IO +---#13 Ethernet / USB 6xx +---#14 CAN 7xx +---#15 UART 8xx +---#16 GPIO / SD Card 9xx

Power

#2Reference ID: 100

#3Top

GDCSubsystem

Revision: PA3467/GDC Evaluation Board

Device Function

I2C Address Map

U480 SAA7113 composite video input 0x48 0x49U400 SIL164 DVI transmitter #0 0x70 0x71U401 SIL164 DVI transmitter #1 0x72 0x73

ReadWrite

#12#8

I/ORESET#

UART0_[7..0]

UART1_[7..0]

ETH_CTRL[4..0]

CAN0_[1..0]

CAN1_[1..0]

ETH_A[7..1]

CPU_D[31..0]

CAN_CTRL[3..0]

GPIO[17..0]

SD_CARD[7..0]

UART2_[3..0]

SD_CARD_PWR_CTRL

USB_STAT[1..0]

RESET#

RESET#

GDC_CTRL[11..0]

GDC_A[25..2]

I2C[3..0]

CPU_D[31..0]

GDC_BCLKI

RESET#0

EXT_GPIO[2..0]

MPLEX_CTRL

CPU SubsystemRESET#

GDC_CTRL[11..0]

UART0_[7..0]

UART1_[7..0]

ETH_CTRL[4..0]

CAN0_[1..0]

CAN1_[1..0]

ETH_A[7..1]

CPU_D[31..0]

GDC_A[25..2]

I2C[3..0]

CAN_CTRL[3..0]

GPIO[17..0]

CPU_D[31..0]

SD_CARD[7..0]

UART2_[3..0]

GDC_BCLKI

RESET#0

EXT_GPIO[2..0]

MPLEX_CTRL

SD_CARD_PWR_CTRL

USB_STAT[1..0]

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RESET#

RESET

RESET

RESET#

VCC50

VCC33

VCC33

VCC50VCC33

VCC_IN

VCC33

VCC33

VCC_IN

VCC33

VCC50

Title


Date: Sheet o f

30420-002 PA3

467/GDC Evaluation Board: Power


A3


PCB Layout: see application notes in data sheet !

Place capacitorsdirectly powerinput and output!

PCB label:3.3V

PCB label:5.0V

PCB label:RESET

C103 330p

C125100n 0805

100nC122

C10510u 1812

D107

MBRM120LT3

R104390R

SW100B3S1000

1 4

2 3

D101

CMDSH-3

R1124k7

R106470R

R111 16k5

TPS3307

U102

TPS3307-33DGN

SENSE11

SENSE22

SENSE33

MR 7

VDD 8

GND4

RESET 6

RESET 5

D106

CMDSH-3

C10610u 1812

C109 330p

100nC120

R103 15k

LT1940

U100

LT1940EFE-PBF

BOOST11

SW12

VIN13

VIN24

VIN35

FB1 16

VC1 15

PG1 14

RUN/SS1 13

RUN/SS2 12

VIN46

SW27

BOOST28 FB2 9

VC2 10

PG2 11

GN

DU

M

C107100n 0805

D105TLMC3100

F100SMD100F

C10110u

C111100n

C108 1n

C124100n 0805

100nC121

L101 7447785004 R108 15k

R10910k 0603

C110

100n 0805

D100

MBRM120LT3

C104 1n

D104TLMC3100

D109SMAJ24A

R100 30k1

C123100n 0805

R10110k 0603

C102

100n 0805

C100100n

D102TLMT3100

C11210u

L100 7447785004

R102 0R NP

R107680R

X100

KLD-SMT2-0202-A

123

R119 10k

L103

742792515

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CPU_D[31..0]

AVIN[1..0]

GDC_CTRL[11..0]

GDC_A[25..2]

GDC_BCLKI

RESET#0

EXT_GPIO[2..0]

RESET#

MPLEX_CTRL

I2C[3..0]

I2C0I2C1

I2C[1..0]

AOUT_RGB[2..0]

MINT_SYNC[4..0]

RESET#

GDC_A[25..2]

GDC_CTRL[11..0]

I2C[3..0]

CPU_D[31..0]

GDC_BCLKI

RESET#0

EXT_GPIO[2..0]

MPLEX_CTRL

Title


Date: Sheet o f

30420-003 PA3

467/GDC Evaluation Board: GDC Subsystem


A3


Reference ID: 3xx#6Reference ID: 4xx #4

CPU

Inte

rfac

e

#7Reference ID: 48x

Vid

eo In

I2C

Vide

o O

ut

Vide

o O

ut

RESET#

I2C[3..0]

AOUT_RGB[2..0]

MINT_SYNC[4..0]

MPLEX_CTRL GDC Extension

GDC_CTRL[11..0]

CPU_D[31..0]

GDC_A[25..2]

I2C[1..0]

AVIN[1..0]

GDC_BCLKI

AOUT_RGB[2..0]

MINT_SYNC[4..0]

RESET#0

EXT_GPIO[2..0]

Video In

AVIN[1..0]

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AVIN0AVIN1

AVIN[1..0]

I2C_SDAI2C1I2C_SCLI2C0

GDC_BCLKI

GDC_XBSGDC_CTRL5GDC_XRDYGDC_CTRL4GDC_XWE1GDC_CTRL3

GDC_XINTGDC_CTRL9GDC_RACKGDC_CTRL8

GDC_DREQGDC_CTRL6GDC_DTACKGDC_CTRL7

GDC_XWE0GDC_CTRL2

GDC_CTRL[11..0]

GDC_XCSGDC_CTRL0GDC_RDGDC_CTRL1

MINT_SYNC[4..0]

RESET#0

EXT_GPIO[2..0]

I2C_SCL I2C_SDA

GDC_RD

GDC_XINT

GDC_XBSGDC_XWE1

GDC_RACK

GDC_BCLKI

GDC_XCS

GDC_XRDYGDC_XWE0

GDC_DTACKGDC_DREQ

RESET#0

CPU_D28

CPU_D24

CPU_D16CPU_D18CPU_D20CPU_D22

CPU_D26

CPU_D30

CPU_D27CPU_D25CPU_D23

CPU_D19CPU_D17

CPU_D31CPU_D29

CPU_D21

AVIN0

GDC_A12GDC_A10GDC_A8

GDC_A4GDC_A2

GDC_A23

GDC_A16GDC_A14

GDC_A6

GDC_A20GDC_A18

GDC_A13

GDC_A9

GDC_A3GDC_A5

GDC_A11

GDC_A7

GDC_A15GDC_A17

GDC_A19GDC_A21 GDC_A22

AVIN1

CPU_D0CPU_D2CPU_D4CPU_D6CPU_D8

CPU_D12CPU_D10

CPU_D14

EXT_GPIO2EXT_GPIO0GDC_XWE2

S_HSYNC

GDC_A25

EXT_GPIO1GDC_XWE3

S_VSYNC

AOUTG

GDC_A24

S_DE

AOUTB

AOUTR

S_CSYNC

CPU_D1

CPU_D5CPU_D3

CPU_D13CPU_D11

CPU_D7CPU_D9

CPU_D15

S_DCLK

CPU_D5

GDC_XWE3GDC_CTRL11

CPU_D27

CPU_D17

GDC_A21

GDC_A2

CPU_D8

CPU_D19

CPU_D30CPU_D31

EXT_GPIO1

MINT_SYNC2S_VSYNC

AOUT_RGB2AOUTB

GDC_A18

CPU_D12

GDC_A22

CPU_D21

CPU_D15

CPU_D26

CPU_D16

GDC_A4GDC_A5

GDC_A13

EXT_GPIO2GDC_A16

CPU_D25

GDC_A6

CPU_D29

GDC_A8

GDC_A10

CPU_D11

GDC_A9

GDC_A24

CPU_D20

CPU_D10

CPU_D6

MINT_SYNC1S_HSYNC

CPU_D14

AOUT_RGB[2..0]

CPU_D24

GDC_A17

MINT_SYNC3S_DE

GDC_XWE2GDC_CTRL10

CPU_D4

CPU_D23

GDC_A24

GDC_A12

CPU_D28

GDC_A14

CPU_D1

GDC_A15

GDC_A11

AOUT_RGB1AOUTG

EXT_GPIO0

CPU_D18

CPU_D7

CPU_D0

GDC_A23

MINT_SYNC0S_DCLK

MINT_SYNC4S_CSYNC

GDC_A19

CPU_D13

CPU_D2

AOUT_RGB0AOUTR

CPU_D9

GDC_A25

GDC_A20

CPU_D22

CPU_D3

GDC_A7

GDC_A3

AVIN[1..0]

I2C[1..0]

CPU_D[31..0]

GDC_A[25..2]

GDC_BCLKI

GDC_CTRL[11..0]

AOUT_RGB[2..0]

MINT_SYNC[4..0]

RESET#0

EXT_GPIO[2..0]

VCC33

VCC50

GND_CV GND_CV

VCC33

GDC_AVSGDC_AVS

Title

Size Document Number R ev

Date: Sheet o f

30420-004 PA3

467/GDC Evaluation Board: GDC Subsystem: Lime


A2


Place capacitors directly to thecorresponding connector pins!

X301

SSM-120-S-DV-P

1 23 45 67 89 10

11 1213 1415 1617 1819 202123 24

22

2527 2829 3031 3233 3435 3637 3839 40

26

100nC300

R301 0R 0603 NP

100nC307

100nC301

R300 0R 0603 NP

100nC304

10uC308

10uC305

10uC302

X300

SSM-120-S-DV-P

1 23 45 67 89 10

11 1213 1415 1617 1819 202123 24

22

2527 2829 3031 3233 3435 3637 3839 40

26

X302

FLE-120-01-G-DV-A-P

1 23 45 67 89 10

11 1213 1415 1617 1819 202123 24

22

2527 2829 3031 3233 3435 3637 3839 40

26

10uC303

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VO0_CLK_RGBA

VO0_RED

VO0_GREEN

VO0_BLUE

VO0_CSYNC

VO0_RGB8 VO0_G0

VO0_RGB19 VO0_R3

VO0_RGB13 VO0_G5

VO0_RGB2 VO0_B2

VO0_RGB6 VO0_B6VO0_RGB5 VO0_B5

VO0_RGB20 VO0_R4

VO0_RGB14 VO0_G6

VO0_RGB17 VO0_R1

VO0_RGB12 VO0_G4

VO0_RGB10 VO0_G2

VO0_RGB16 VO0_R0

VO0_RGB23 VO0_R7

VO0_RGB18 VO0_R2

VO0_RGB0 VO0_B0

VO0_RGB3 VO0_B3

VO0_RGB22 VO0_R6VO0_RGB21 VO0_R5

VO0_RGB9 VO0_G1

VO0_RGB1 VO0_B1

VO0_RGB4 VO0_B4

VO0_RGB15 VO0_G7

VO0_RGB7 VO0_B7

VO0_RGB11 VO0_G3

RGBA1_BLANKRGBA1_PSAVE#

DVI1_DKEN

DVI1_CTL3DVI1_CTL2DVI1_CTL1

DVI0_DKEN

DVI0_CTL3DVI0_CTL2DVI0_CTL1

VO1_TX2MVO1_TX2P

VO1_VSYNCVO1_TX1MVO1_TX1P

VO1_TX0MVO1_TX0P

VO1_TXCPVO1_TXCM

I2C[3..0]

DVI0_ISEL

VO1_G4

DVI1_PLLVCC

DVI1_CTL1

DVI1_CTL2

DVI1_CTL3

I2C_SDAI2C_SCL

DVI1_HTPLG

VO

1_C

LK_D

VI

VO1_VSYNC

DVI1_PLLVCC

VO

1_TX

CM

VO

1_TX

0PVO

1_TX

0M

VO

1_TX

CP

VO1_

TX1M

VO1_

TX2M

VO

1_TX

1P

VO

1_TX

2PVO1_HSYNC

VO1_DE

DVI1_HTPLG

DVI1_PDDVI1_ISEL

VO0_TX2MVO0_TX2P

VO0_VSYNCVO0_TX1MVO0_TX1P

VO0_TX0MVO0_TX0P

VO0_TXCPVO0_TXCM

VO0_HSYNC

RESET#

VO0_R7VO0_R6VO0_R5

VO0_R3VO0_R2VO0_R1VO0_R0VO0_G7VO0_G6VO0_G5VO0_G4

DVI0_PLLVCC

VO0_R4

DVI0_CTL1

DVI0_CTL2

DVI0_CTL3

VO

0_B

0V

O0_

B1

VO

0_B

2V

O0_

B3

VO

0_B

4

VO1_G5

VO

0_B

5

VO1_G6VO1_G7

VO

0_B

7

VO1_R0

VO

0_G

0

VO1_R1VO1_R2VO1_R3VO1_R4

VO

0_G

1

VO1_R5VO1_R6VO1_R7

VO

0_G

2V

O0_

G3

VO

1_B

0V

O1_

B1

I2C_SDA

VO

1_B

2

I2C_SCL

VO

0_B

6

VO

1_B

3

DVI0_HTPLG

VO

1_B

4V

O1_

B5

VO

0_C

LK_D

VI

VO0_VSYNC

DVI0_PLLVCC

VO

0_TX

CM

VO

0_TX

0PVO

0_TX

0M

VO

0_TX

CP

VO0_

TX1M

VO0_

TX2M

VO

0_TX

1P

VO

0_TX

2P

VO0_HSYNC

VO

1_B

6

VO0_GREENVO0_BLUE

VO0_DE

VO

1_B

7V

O1_

G0

VO

1_G

1V

O1_

G2

VO

1_G

3

DVI0_HTPLGDVI0_PD

DVI1_ISEL

VO1_CSYNC

VO1_RGB0 VO1_B0VO1_RGB1 VO1_B1VO1_RGB2 VO1_B2VO1_RGB3 VO1_B3



VO1_RGB8 VO1_G0VO1_RGB9 VO1_G1VO1_RGB10 VO1_G2VO1_RGB11 VO1_G3

VO1_CLK_RGBA

VO1_RGB12 VO1_G4VO1_RGB13 VO1_G5VO1_RGB14 VO1_G6VO1_RGB15 VO1_G7



VO1_RGB20 VO1_R4VO1_RGB21 VO1_R5VO1_RGB22 VO1_R6VO1_RGB23 VO1_R7

VO1_GREEN

RGBA1_PSAVE#RGBA1_BLANK

VO0_RED

VO1_HSYNCMPLEX_BLUE

MPLEX_REDMPLEX_GREEN

VO1_BLUE

VO1_RED

VO0_B1VO0_B3VO0_B5VO0_B7VO0_G1VO0_G3VO0_G5VO0_G7

VO0_R1VO0_R3VO0_R5VO0_R7VO0_VSYNCVO0_CSYNCVO0_CLK_RGBDI2C_SDA


VO0_R0VO0_R2VO0_R4VO0_R6VO0_HSYNCVO0_DE

I2C_SCL


VO1_R1VO1_R3VO1_R5VO1_R7VO1_VSYNCVO1_CSYNCVO1_CLK_RGBDI2C_SDA


VO1_R0VO1_R2VO1_R4VO1_R6VO1_HSYNCVO1_DE

I2C_SCL

RESET#

RESET#

DVI1_PD

AOUT_RGB[2..0]

AOUT_RGB0 AOUTRAOUT_RGB1 AOUTGAOUT_RGB2 AOUTB

VO1_REDAOUTR

VO1_GREENAOUTG VO1_BLUE

AOUTB

MPLEX_RED

MPLEX_GREENMPLEX_BLUE

MPLEX_CTRL

I2C_SDA

I2C0 I2C_SCL

I2C_SCL

I2C1 I2C_SDA

MPLEX_CTRL

I2C_SDA_BI2C3I2C_SCL_BI2C2

I2C_SCL_BI2C_SDA_B

VO0_B0VO0_B2VO0_B4VO0_B6VO0_G0VO0_G2VO0_G4VO0_G6VO0_R0VO0_R2VO0_R4VO0_R6

VO0_DE


VO0_HSYNCVO0_VSYNC


VO1_CLKVO1_DE


VO1_VSYNCVO1_HSYNC

MINT_SYNC0 VO1_CLK

MINT_SYNC2 VO1_VSYNC

MINT_SYNC[4..0]

MINT_SYNC3 VO1_DE

MINT_SYNC1 VO1_HSYNC

MINT_SYNC4 VO1_CSYNC

VO0_CLK

VO0_CLK_DVI

VO0_CLK_RGBA

VO0_CLK_RGBD

VO0_CLK

VO1_CLK

VO1_CLK_DVI

VO1_CLK_RGBA

VO1_CLK_RGBD

I2C[3..0]

RESET#

AOUT_RGB[2..0]

MPLEX_CTRL

MINT_SYNC[4..0]

GND_RGBO

GND_RGBO

GND_RGBO

GND_RGBO

VCC33

VCC33

VCC33

VCC33

GND_DVI

VCC50VCC33

GND_DVI

VCC33

VCC33

VCC33

VCC33

GND_DVI

VCC50

GND_DVI

VCC33

GND_DVI

VCC33

VCC33

GND_DVI

GND_DVI

GND_RGBO

GND_RGBO

GND_RGBO

VCC33

VCC33 VCC33

VCC50

VCC50 VCC33 VCC50 VCC33

VCC33 VCC33

VCC33 VCC33

Title


Date: Sheet o f

30420-006 PA3

467/GDC Evaluation Board: GDC Subsystem: Video Out


A1


Consider ADV7125 layout rules!Place filter network directlyto U402 power pins!

NP NP???

Place filter network directlyto U400 power pins!




Place capacitors directlyto U400 power pins!

Place capacitors directlyto U401 power pins!

Consider SIL164 PCBlayout application note!

Consider SIL164 PCBlayout application note!

I2C addresses of SIL164 #0read: 0x71, write: 0x70

I2C addresses of SIL164 #1read: 0x73, write: 0x72

Consider ADV7125 layout rules!Place filter network directlyto U403 power pins!

RG

B d

igit

al o

utpu

t #0

RG

B d

igit

al o

utpu

t #1

Place R508- R510 and R512 directlyto the corresponding U501 pins!


L410

BLM18PG600SN1

C45810p NP

75RR430

IDT2305

Zero DelayClock Buffer

U406

IDT2305-1DCGI

REF1

CLK22

CLK13

GND4 CLK3 5

VDD 6

CLK4 7

CLKOUT 8

SIL 164 PanelLinkTransmitter

U400

SiI164CT64

VCC11DE2VREF3HSYNC4VSYNC5CTL3/A3/DK36CTL2/A2/DK27CTL1/A1/DK18EDGE/HTPLG9PD10MSEN11VCC212ISEL/RST13DESL/SDA14BSEL/SCL15GND116

PG

ND

17P

VC

C1

18E

XT_

SW

ING

19A

GN

D1

20TX

C-

21TX

C+

22A

VC

C1

23TX

0-24

TX0+

25A

GN

D2

26TX

1-27

TX1+

28A

VC

C2

29TX

2-30

TX2+

31A

GN

D3

32

VCC3 33RESERVED 34DKEN 35D23 36D22 37D21 38D20 39D19 40D18 41D17 42D16 43D15 44D14 45D13 46D12 47GND2 48

PV

CC

249

D11

50D

1051

D9

52D

853

D7

54D

655

IDC

K-

56ID

CK

+57

D5

58D

459

D3

60D

261

D1

62D

063

GN

D3

64

C45710u

R446 33R

100nC419

X405

DF13-40DS-1.25C

1 23 45 67 89 10

11 1213 1415 1617 1819 202123 24

22

2527 2829 3031 3233 3435 3637 3839 40

26

BLM18PG600SN1L401

0R NPR402

390RR413

10kx4

RN402

12345

678

BLM18PG600SN1L414

D400BZX84C3V32

2

11

33

R44710k

510RR424

0R NPR432

0RR440

10uC400

0RR408

0R 0603R420

0R 0603R404

470RR436

10uC409

100nC443

0R NPR422

BLM18PG600SN1L406

C459100n

27pC430

27pC433

100n NPC454

ADV7125Video DAC

U403

ADV7125JSTZ240

B016B117B218B319B420B521B622B723

G03G14G25G36G47G58G69G710

R041R142R243R344R445R546R647R748

SYNC#12BLANK11CLOCK24

PSAVE#38

IOR 34

IOG 32

IOB 28

IOR# 33

IOG# 31

IOB# 27

VC

C13

VC

C29

VC

C30

GN

D1

GN

D2

GN

D14

GN

D15

GN

D25

GN

D26

GN

D39

GN

D40

RSET 37

COMP 35

VREF 36

DVIS029T-002BSX400

123456789

1011121314151617181920212223

C1C2C3C4

C5A

24

C5B

R450 33R

0RR418

100nC447100nC444

0RR437

27pC412

10uC429

BLM18PG600SN1L411

75RR431

100nC416

100nC435

R449 10k

390RR400

DVIS029T-002BSX401

123456789

1011121314151617181920212223

C1C2C3C4

C5A

24

C5B

0RR410

10uC424

10uC418

75RR429

510RR411

100nC426

R448 33R

U404

FSAV330MTC

S11B121B231A42B152B262A7GND8

VCC 16/OE 154B1 144B2 134A 12

3B1 113B2 103A 09

1nC

437

10kR416

10uC404

75RR427

C46110p NP

0R 0603R406

0RR425

BLM18PG600SN1L408

R451 33R

27pC413

100nC452

27pC411

0RR405

100n NPC455

X404

DF13-40DS-1.25C

1 23 45 67 89 10

11 1213 1415 1617 1819 202123 24

22

2527 2829 3031 3233 3435 3637 3839 40

26

R45210kC460

10u

0RR409

BLM18PG600SN1L400

27pC425

100nC440

0RR441

68RR438

10uC438

0RR442

10uC448

100nC403

BLM18PG600SN1L409

L413

BLM18PG600SN1

10uC423

1nC427

100nC415

100nC428

D401BZX84C3V32

2

11

33

10uC442

10uC434

0RR434

10kR403

75RR428

IDT2305


U405

IDT2305-1DCGI

REF1

CLK22

CLK13

GND4 CLK3 5

VDD 6

CLK4 7

CLKOUT 8

220RR401

0RR421

1nC445

1nC

417

100nC450

100nC439

BLM18PG600SN1L402

X402

FTSH-120-01-L-DV-EJ-P

1 23 45 67 89 10

11 1213 1415 1617 1819 202123 24

22

2527 2829 3031 3233 3435 3637 3839 40

26

10kx4RN400

12345

678

0R 0603R417

75RR426

100nC421

27pC410

BLM18PG600SN1L405

SIL 164 PanelLinkTransmitter

U402

SiI164CT64

VCC11DE2VREF3HSYNC4VSYNC5CTL3/A3/DK36CTL2/A2/DK27CTL1/A1/DK18EDGE/HTPLG9PD10MSEN11VCC212ISEL/RST13DESL/SDA14BSEL/SCL15GND116

PG

ND

17P

VC

C1

18E

XT_

SW

ING

19A

GN

D1

20TX

C-

21TX

C+

22A

VC

C1

23TX

0-24

TX0+

25A

GN

D2

26TX

1-27

TX1+

28A

VC

C2

29TX

2-30

TX2+

31A

GN

D3

32

VCC3 33RESERVED 34DKEN 35D23 36D22 37D21 38D20 39D19 40D18 41D17 42D16 43D15 44D14 45D13 46D12 47GND2 48

PV

CC

249

D11

50D

1051

D9

52D

853

D7

54D

655

IDC

K-

56ID

CK

+57

D5

58D

459

D3

60D

261

D1

62D

063

GN

D3

64

C456100n

27pC432

27pC405

BLM18PG600SN1L407

0RR412

10kx4

RN403

12345

678

R453 33R

0R 0603R407

100nC422

470RR439

0RR443

100nC446

R445 33R

1nC407

100nC406

220RR414

100nC453

0R NPR433

0R NPR415

100nC408

R444 10k

100nC401

BLM18PG600SN1L403

BLM18PG600SN1L404

10uC449

ADV7125Video DAC

U401

ADV7125JSTZ240

B016B117B218B319B420B521B622B723

G03G14G25G36G47G58G69G710

R041R142R243R344R445R546R647R748

SYNC#12BLANK11CLOCK24

PSAVE#38

IOR 34

IOG 32

IOB 28

IOR# 33

IOG# 31

IOB# 27

VC

C13

VC

C29

VC

C30

GN

D1

GN

D2

GN

D14

GN

D15

GN

D25

GN

D26

GN

D39

GN

D40

RSET 37

COMP 35

VREF 36

0R 0603R419

1nC402

68RR435

100nC436

10uC414

10kx4RN401

12345

678

0RR423

1nC441

27pC431

X403

FTSH-120-01-L-DV-EJ-P

1 23 45 67 89 10

11 1213 1415 1617 1819 202123 24

22

2527 2829 3031 3233 3435 3637 3839 40

26

BLM18PG600SN1L412

1nC420

100nC451

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AVIN0

AVIN1

AVIN[1..0]AVIN[1..0]

GND_CV

GND_CV

Title


Date: Sheet o f

30420-007 PA3

467/GDC Evaluation Board: GDC Subsystem: Video In


A4


JEITA RC-5231X4801

2

18RR480

JEITA RC-5231X4811

2

18RR482

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RESET#

GDC_CTRL[11..0]

CPU_SDQM#[3..0]

SD_CARD[7..0]

S_CTRL[4..0]

CPU_D[31..0]

CPU_SDCLK[1..0]

EXT_GPIO[2..0]

UART0_[7..0]

CPU_SDD[31..0]

CPU_SDCTRL[4..0]

CAN_CTRL[3..0]

GPIO[17..0]

UART1_[7..0]

F_A[27..2]

GDC_BCLKI

F_CTRL[5..0]

UART2_[3..0]

ETH_A[7..1]

ETH_CTRL[4..0]

CAN0_[1..0]GDC_A[25..2]

CPU_D[31..0]

CAN1_[1..0]

I2C[3..0]

MPLEX_CTRL

CPU_SDA[21..0]

RESET#0

SD_CARD_PWR_CTRL

USB_STAT[1..0]

RESET#

GDC_CTRL[11..0]

CPU_D[31..0]

ETH_CTRL[4..0]

GDC_A[25..2]

ETH_A[7..1]

I2C[3..0]

GDC_BCLKI

EXT_GPIO[2..0]

RESET#0

MPLEX_CTRL

SD_CARD[7..0]

UART1_[7..0]

UART0_[7..0]

UART2_[3..0]

CAN_CTRL[3..0]

CAN0_[1..0]

GPIO[17..0]

CAN1_[1..0]

SD_CARD_PWR_CTRL

USB_STAT[1..0]

Title


Date: Sheet o f

30420-008 PA3

467/GDC Evaluation Board: CPU Subsystem


A3


Flas

h

SDRAM

Reference ID: 58x

Ser

ial I

O

Exte

nsio

n B

us

Reference ID: 5xx #9 #10#11

SDR

AM

/SR

AM

Reference ID: 59x

CPU_SDQM#[3..0]

CPU_SDD[31..0]

CPU_SDA[21..0]

CPU_SDCLK[1..0]

CPU_SDCTRL[4..0]

S_CTRL[4..0]

CPU

CPU_SDA[21..0]

CPU_SDD[31..0]

CPU_SDQM#[3..0]

F_CTRL[5..0]

CPU_D[31..0]

F_A[27..2]

RESET#

GDC_CTRL[11..0]CAN_CTRL[3..0]

CAN0_[1..0]

UART0_[7..0]

UART1_[7..0]ETH_CTRL[4..0]

CPU_SDCLK[1..0]

GDC_A[25..2]

ETH_A[7..1]

CPU_SDCTRL[4..0]

I2C[3..0]GPIO[17..0]

S_CTRL[4..0]

CAN1_[1..0]

UART2_[3..0]

SD_CARD[7..0]

GDC_BCLKI

RESET#0

EXT_GPIO[2..0]

MPLEX_CTRLSD_CARD_PWR_CTRL

USB_STAT[1..0]

Flash

RESET#

F_CTRL[5..0]

CPU_D[31..0]

F_A[27..2]

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RESET#

CPU_SDD[31..0]

I2C[3..0]

CPU_SDCLK[1..0]

CPU_SDCLK0CPU_SDCLK1

CPU_MCLKO

CPU_SDCLK0

CPU_SDCLK1

GDC_BCLKI

CAN1_[1..0]

CPU_D[31..0]

CPU_MCLKO

CAN0_TXD

CAN1_TXD

CP

U_B

RQ

CA

N0_

TX_E

N

CA

N1_

TX_E

NC

AN

1_TX

_STB

Y

CA

N0_

TX_S

TBY

F_A

27

GD

C_R

AC

KG

DC

_DR

EQ

CP

U_A

LAR

M0

CP

U_R

DY

F_B

YTE

#F

_A26

F_R

BS

Y#

F_W

P#

PB

_AB

OR

T#C

PU

_IN

T0

CP

U_I

NT4

UART2_[3..0]

UART2_0UART2_TXD

UART2_3UART2_CTSUART2_2UART2_RTSUART2_1UART2_RXD

GPIO3

GPIO12

UART1_DTR

F_WP#

CPU_WR#1

SRAM_CS1#

CP

U_D

27

CP

U_D

21

GPIO15

UART0_RI

CPU_SDCS#

CPU_ALARM0

GDC_DTACK

F_A27

UART1_TXD

CP

U_A

0

CP

U_D

31

CP

U_D

28

CP

U_D

24

CP

U_D

15

CP

U_D

8

GPIO12

GPIO2

CAN1_0CAN1_RXD

UART0_0UART0_TXD

UART0_6UART0_CD

I2C_SDA

C PU_RDY

CPU_SDCKE

CP

U_D

9

GPIO13

CAN1_RXD

GPIO3

UART0_1UART0_RXD

UART0_3UART0_CTS

CAN0_TXD CAN0_1

CAN_CTRL3CAN1_TX_STBY

UART1_CTS

UART0_CTS

CPU_RD#

CPU_WR#0

CPU_DEOTX0

RESET#

GPIO17

CAN1_TX_EN

GDC_RESET#1

GPIO1GPIO0

CPU_WR#3

GDC_RACK

GDC_DREQ

UART0_4UART0_DTR

F_A26

UART0_CDUART0_DSR

GDC_XCS

CP

U_D

11

CP

U_D

2

GPIO11

GPIO8

GPIO1

CAN_CTRL1CAN0_TX_STBY

UART0_RXD

UART0_RTS

CPU_INT0

CP

U_D

26

CP

U_D

13

GDC_RESET#0

GPIO6GPIO7

CAN0_RXD CAN0_0

CPU_BRQ

CP

U_D

10

GPIO16

CP

U_D

17

GPIO7

CAN0_TX_EN

UART0_2UART0_RTS

F_BYTE#

CP

U_D

20

CP

U_D

5

CP

U_D

3

GPIO10

CAN_CTRL0CAN0_TX_EN

GPIO16

GPIO14

GPIO11

UART0_DTR

CPU_DREQ

CP

U_D

25

CP

U_D

16

CP

U_D

7

CAN1_TX_STBY

GPIO9

GPIO5

PB_DIAG#1PB_ABORT#

CPU_WR#2

CPU_SDCAS#

CP

U_D

22

CP

U_D

14

CP

U_D

1

GPIO15

GPIO5

CAN0_[1..0]

UART0_5UART0_DSR

GD

C_R

ES

ET#

1

UART1_RTS

CPU_WE#

CP

U_D

29

CP

U_D

19C

PU

_D18

CP

U_D

12

GPIO6

GPIO0

GPIO2

CAN_CTRL2CAN1_TX_EN

GPIO13

I2C_SCL

CP

U_D

23

GPIO9

CAN0_RXD

UART0_[7..0]

CAN_CTRL[3..0]

GPIO[17..0]

GPIO4

GPIO8

PB_DIAG#2

UART0_TXD

ETH_CS#

CPU_AS#

CP

U_D

6

ETH_PME

GPIO17

GPIO10

UART0_7UART0_RI

CAN1_1CAN1_TXD

PB

_DIA

G#2

CP

U_I

NT5

UART1_RXD

CP

U_D

30

CP

U_D

4

CP

U_D

0

GPIO14

GPIO4

CAN0_TX_STBY

UART2_RTSUART2_TXD

UART2_RXDUART2_CTS

UART1_[7..0]

SD_CARD7SD_XMCD

SD_CARD[7..0]

SD_CARD3SD_DAT1

SD_CARD1SD_CMDSD_CARD2SD_DAT0

SD_CARD0SD_CLK

SD_CARD4SD_DAT2

SD_CARD6SD_WPSD_CARD5SD_DAT3SD_CLK

SD_CMDSD_DAT0SD_DAT1SD_DAT2SD_DAT3SD_WPSD_XMCD

GDC_BCLKI

GD

C_R

ES

ET#

0

ETH

_PM

E

F_A[27..2]

GD

C_A

15

CPU_SDA0 CPU_A0

CPU_SDA17 GDC_A17

GD

C_A

19

GD

C_A

12

F_A12 GDC_A12

CPU_SDA13 GDC_A13

CPU_SDA9 GDC_A9

F_A24 GDC_A24

GD

C_A

2CPU_SDA5 GDC_A5

CPU_SDA18 GDC_A18CPU_SDA19 GDC_A19

F_A26

CPU_SDA10 GDC_A10

F_A25 GDC_A25

GD

C_A

8

GD

C_A

22

F_A17 GDC_A17

GD

C_A

6

CPU_SDA2 GDC_A2

F_A3 GDC_A3

GD

C_A

23

CPU_SDA7 GDC_A7

F_A9 GDC_A9

F_A6 GDC_A6F_A5 GDC_A5

GD

C_A

17

GD

C_A

10

CPU_SDA6 GDC_A6

F_A27

GD

C_A

4

GDC_A[25..2]

CPU_SDA12 GDC_A12

F_A16 GDC_A16

ETH_A5 GDC_A6

F_A2 GDC_A2

CPU_SDA14 GDC_A14

ETH_A[7..1]

F_A20 GDC_A20

CPU_SDA20 GDC_A20

F_A14 GDC_A14

CPU_SDA21 GDC_A21

F_A22 GDC_A22

F_A13 GDC_A13

CPU_SDA15 GDC_A15

GD

C_A

24

GD

C_A

14

CPU_SDA3 GDC_A3

GD

C_A

13

GD

C_A

20

ETH_A6 GDC_A7

F_A18 GDC_A18

F_A4 GDC_A4

GD

C_A

25

F_A15 GDC_A15

ETH_A1 GDC_A2

F_A23 GDC_A23

CPU_SDA1 GDC_A1

ETH_A4 GDC_A5

F_A10 GDC_A10

GD

C_A

5

GD

C_A

18

CPU_SDA4 GDC_A4G

DC

_A1

F_A7 GDC_A7

F_A19 GDC_A19

GD

C_A

11

ETH_A7 GDC_A8

GD

C_A

3

GD

C_A

21

CPU_SDA16 GDC_A16

GD

C_A

9

CPU_SDA8 GDC_A8G

DC

_A7

CPU_SDA[21..0]

GD

C_A

16

F_A8 GDC_A8

ETH_A2 GDC_A3

F_A21 GDC_A21

ETH_A3 GDC_A4

F_A11 GDC_A11

CPU_SDA11 GDC_A11

F_CTRL[5..0]

CPU_DACKX0

CPU_SDCTRL[4..0]

RESET#0

UART1_1UART1_RXD

UART1_RI

UART1_3UART1_CTSUART1_4UART1_DTR

UART1_CD

UART1_2UART1_RTS

UART1_7UART1_RIUART1_6UART1_CD

UART1_0UART1_TXD

UART1_DSR

UART1_5UART1_DSR

RESET#0

EXT_GPIO2

EXT_GPIO0EXT_GPIO1

EXT_GPIO[2..0]

EXT_GPIO0EXT_GPIO1EXT_GPIO2

MPLEX_CTRL

MPLEX_CTRL

CPU_INT6

CPU_INT2

PB_DIAG#3

F_CS#

F_RBSY#

CPU_INT3

CPU_SDQM#[3..0]

ETH_CTRL[4..0]

CPU_INT4

CPU_INT5

I2C_SDA_BI2C_SCL_B

I2C3 I2C_SDA_BI2C2 I2C_SCL_B

I2C

_SD

A

I2C1 I2C_SDAI2C0 I2C_SCL

I2C

_SC

L

SD_CARD_PWR_CTRL

SD_CARD_PWR_CTRL

USB_SLEEP#USB_PWREN#

US

B_P

WR

EN

#

US

B_S

LEE

P#

CPU_WE#ETH_CTRL1

GDC_WE3GDC_CTRL11 CPU_WR#2

CPU_SDCTRL3 CPU_SDRAS# CPU_AS#

F_WP#F_CTRL4

CPU_INT2ETH_CTRL3 ETH_IRQ

SRAM_LB#S_CTRL3 CPU_WR#1

SRAM_CS1#S_CTRL0

CPU_WR#3CPU_SDQM#0

GDC_WE2GDC_CTRL10 CPU_WR#3

F_BYTE#F_CTRL5

ETH_CTRL2 CPU_RD#

GDC_RACKGDC_CTRL8

SRAM_WE#S_CTRL2 CPU_WE#

F_CTRL0 F_CS#

GDC_DTACKGDC_CTRL7

CPU_RD#F_CTRL2 F_OE#

SRAM_OE#S_CTRL1 CPU_RD#

CPU_WR#1CPU_SDQM#2

F_RBSY#F_CTRL3

GDC_DREQGDC_CTRL6

CPU_WE#F_CTRL1 F_WE#

GDC_CTRL0 GDC_XCS

C PU_RDYGDC_XRDYGDC_CTRL4

GDC_CTRL1 GDC_RD CPU_RD#

ETH_CTRL4 ETH_PME

CPU_WR#2CPU_SDQM#1

CPU_SDCTRL0 CPU_SDCS#CPU_SDCTRL1 CPU_SDCKE

CPU_SDCTRL4 CPU_SDCAS#

GDC_XBS CPU_AS#GDC_CTRL5

GDC_CTRL[11..0]

CPU_WE#CPU_SDCTRL2 CPU_SDWE#

GDC_CTRL2 GDC_XWE0 CPU_WR#1

CPU_INT3GDC_XINTGDC_CTRL9

CP

U_I

NT6

S_CTRL[4..0]

CPU_WR#0CPU_SDQM#3

ETH_CTRL0 ETH_CS#

GDC_CTRL3 GDC_XWE1 CPU_WR#0

SRAM_UB#S_CTRL4 CPU_WR#0

USB_STAT1 USB_SLEEP#USB_STAT0 USB_PWREN#

USB_STAT[1..0]

PB

_DIA

G#3

CP

U_I

NT6

PB

_DIA

G#1

CP

U_I

NT2

SD

_CA

RD

_PW

R_C

TRL

CP

U_D

RE

QC

PU

_DE

OTX

0

GDC_A[25..2]

RESET#

CAN1_[1..0]

CPU_D[31..0]

CPU_SDD[31..0]

ETH_A[7..1]

F_A[27..2]

I2C[3..0]

CPU_SDCLK[1..0]

F_CTRL[5..0]

CAN0_[1..0]

S_CTRL[4..0]

UART0_[7..0]

CAN_CTRL[3..0]

GPIO[17..0]

UART1_[7..0]

UART2_[3..0]

SD_CARD[7..0]

CPU_SDA[21..0]

GDC_BCLKI

GDC_CTRL[11..0]

CPU_SDCTRL[4..0]

CPU_SDQM#[3..0]

ETH_CTRL[4..0]

EXT_GPIO[2..0]

RESET#0

MPLEX_CTRL

SD_CARD_PWR_CTRL

USB_STAT[1..0]

VCC33 VCC33

VCC33

VCC33

VCC33

Title


Date: Sheet o f

30420-009 PA3

467/GDC Evaluation Board: CPU Subsystem: CPU


A2

9 16Thursday, October 04, 2007

Place Capacitors directly tothe corresponding CPU pins!


Place R503- R504 directly to thecorresponding U500 pins!

PCB Label:DIAG 1

DIAG 2

DIAG 3

DIAG 4

PCB Label: ABORT PCB Label: TEST 1

PCB Label: TEST 2 PCB Label: TEST 3

D503 TLMC3100

C504100n

C52110p NP

C51410u

R51410k

SW5007813J-001-023E

SW504B3S1000

1 4

2 3

R502 0R NP

C515 27p

C50210u

R500 10k

C524 100n

R520 0R

RN

501

10kx

4

1 2 3 45678

R51110k

R524 470R

C507100n

C51010u

MB91F467D

U500MB91F467DAPFV

AV

SS

144

AV

RH

514

5

AV

CC

514

6

VD

D5R

_081

VD

D5R

_182

VC

C18

C80

P14_0 / ICU0 / TIN0 122P14_1 / ICU1 / TIN1 123P14_2 / ICU2 / TIN2 124P14_3 / ICU3 / TIN3 125P14_4 / ICU4 / TIN4 126P14_5 / ICU5 / TIN5 127P14_6 / ICU6 / TIN6 128P14_7 / ICU7 / TIN7 129

P15_0 / OCU0 / TOT0 118P15_1 / OCU1 / TOT1 119P15_2 / OCU2 / TOT2 120P15_3 / OCU3 / TOT3 121

P17_4 / PPG4 132P17_5 / PPG5 133P17_6 / PPG6 134P17_7 / PPG7 135P16_0 / PPG8 136P16_1 / PPG9 137

P16_2 / PPG10 138P16_3 / PPG11 139

P16_4 / PPG12 / SGA 140P16_5 / PPG13 / SGO 141P16_6 / PPG14 / PFM 142

P16_7 / PPG15 / ATGX 143

P23_0 / RX0 91P23_1 / TX0 92P23_2 / RX1 93P23_3 / TX1 94P23_4 / RX2 95P23_5 / TX2 96

P27_0 / SMC1P0 / AN16 158P27_1 / SMC1M0 / AN17 159P27_2 / SMC2P0 / AN18 160P27_3 / SMC2M0 / AN19 161P27_4 / SMC1P1 / AN20 164P27_5 / SMC1M1 / AN21 165P27_6 / SMC2P1 / AN22 166P27_7 / SMC2M1 / AN23 167P26_0 / SMC1P2 / AN24 168P26_1 / SMC1M2 / AN25 169P26_2 / SMC2P2 / AN26 170P26_3 / SMC2M2 / AN27 171P26_4 / SMC1P3 / AN28 174P26_5 / SMC1M3 / AN29 175P26_6 / SMC2P3 / AN30 176P26_7 / SMC2M3 / AN31 177

P25_0 / SMC1P4 178P25_1 / SMC1M4 179P25_2 / SMC2P4 180P25_3 / SMC2M4 181P25_4 / SMC1P5 184P25_5 / SMC1M5 185P25_6 / SMC2P5 186P25_7 / SMC2M5 187

P29_0 / AN0 148P29_1 / AN1 149P29_2 / AN2 150P29_3 / AN3 151P29_4 / AN4 152P29_5 / AN5 153P29_6 / AN6 154P29_7 / AN7 155

D0

192

D1

193

D2

194

D3

195

D4

196

D5

197

D6

198

D7

199

D8

200

D9

201

D10

202

D11

203

D12

204

D13

205

D14

206

D15

207

D16

2D

173

D18

4D

195

D20

6D

217

D22

8D

239

D24

10D

2511

D26

12D

2713

D28

14D

2915

D30

16D

3117

A0

18A

119

A2

20A

321

A4

22A

523

A6

24A

725

A8

28A

929

A10

30A

1131

A12

32A

1333

A14

34A

1535

A16

36A

1737

A18

38A

1939

A20

40A

2141

A22

42A

2343

A24

44A

2545

VD

D35

_026

VD

D35

_152

VD

D35

_220

8

VD

D5_

078

VD

D5_

110

4V

DD

5_2

130

VD

D5_

315

6

HV

DD

5_0

162

HV

DD

5_1

172

HV

DD

5_2

182

HV

SS

5_0

163

HV

SS

5_1

173

HV

SS

5_2

183

VS

S5_

01

VS

S5_

127

VS

S5_

253

VS

S5_

379

VS

S5_

410

5V

SS

5_5

131

VS

S5_

615

7V

SS

5_7

69V

SS

5_8

188

X0A75X1A74X077X176

INITX73

ALARM_0147

MD_072MD_171MD_270

P13_0 / DREQ189P13_1 / DACKX0190P13_2 / DEOTX0191P10_1 / ASX62P10_2 / BAAX63P10_3 / WEX64P10_4 / MCLK065P10_5 / MCLKI / /MCLKI66P10_6 / MCLKE67P09_0 / CSX056P09_1 / CSX157P09_2 / CSX258P09_3 / CSX359P09_6 / CSX660P09_7 / CSX761P08_0 / WRX046P08_1 / WRX147P08_2 / WRX248P08_3 / WRX349P08_4 / RDX50P08_5 / BGRNTX51P08_6 / BRQ54P08_7 / RDY55

P24_0 / INT083P24_1 / INT184P24_2 / INT285P24_3 / INT386P24_4 / INT487P24_5 / INT588P24_6 / INT689P24_7 / INT790

MONCLK68

P22_097P22_298P22_4 / SDA099P22_5 / SCL0100P20_0 / SIN2 / AIN0101P20_1 / SOT2 / BIN0102P20_2 / SCK2 / ZIN0/CK2103P19_0 / SIN4106P19_1 / SOT4107P19_2 / SCK4 / CK4108P19_4 / SIN5109P19_5 / SOT5110P19_6 / SCK5 / CK5111P18_0 / SIN6 / AIN2112P18_1 / SOT6 / BIN2113P18_2 / SCK6 / ZIN2/CK6114P18_4 / SIN7 / AIN3115P18_5 / SOT7 / BIN3116P18_6 / SCK7 / ZIN3/CK7117

SW503B3S1000

1 4

2 3R

529

10k

R527 470R

C516 27p

R504 0R

R518 0R

SW502B3S1000

1 4

2 3

D502 TLMC3100

Y501

MC306 32.768k

1

4

2

3

R528 1k

C51827p

C513100n

C519100n

R513 0R NP

RN

506

10kx

4

1 2 3 45678

C501100n

RN

502

10kx

4

1 2 3 45678

R519 0R NP

C508100n

R509 33R

C525 100n

R505 0R NP

C523 100n

RN

507

10kx

4

1 2 3 45678

R526 470R

R522 10k

C509100n

C52010u

R521 10k

D501 TLMC3100

R52310k

RN

505

10kx

4

1 2 3 45678

R501 4k7

R510 33R

IDT2305


U501

IDT2305-1DCGI

REF1

CLK22

CLK13

GND4 CLK3 5

VDD 6

CLK4 7

CLKOUT 8

R503 33R

RN

500

10kx

4

1 2 3 45678

L500

BLM18PG600SN1

C505100n

RN

503

10kx

4

1 2 3 45678

R53

010

k

C5001n

C522 100n

R517 33R

C5031n

C51110u

R5150R NP

RN

504

10kx

4

1 2 3 45678

Y500

4.000M HC49/4HSMX

1

2

R525 470R

SW501B3S1000

1 4

2 3

R512 33R

R50810k

C51727p

D500 TLMC3100

C506100n

R516 33R

C5121n

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CPU_SDA15 CPU_SDBA1

CPU_SDA14 CPU_SDBA0

CPU_SDA0

CPU_SDA1

CPU_SDA2

CPU_SDA3

CPU_SDA10

CPU_SDRAS#

CPU_SDCAS#

CPU_SDD16

CPU_SDD17

CPU_SDWE#

CPU_SDD18

CPU_SDD19

CPU_SDD20

CPU_SDQM#[3..0]

CPU_SDD21

CPU_SDA12

CPU_SDD22

CPU_SDCLK1

CPU_SDD23

CPU_SDA4

CPU_SDD31

CPU_SDD30

CPU_SDD29

CPU_SDA5

CPU_SDA6

CPU_SDD28

CPU_SDA7

CPU_SDD26

CPU_SDA8

CPU_SDA9

CPU_SDD25

CPU_SDA11

CPU_SDD24

CPU_SDD27

CPU_SDQM#1

CPU_SDQM#0

CPU_SDQM#1

CPU_SDQM#2

CPU_SDCLK0

CPU_SDA15 CPU_SDBA1

CPU_SDA14 CPU_SDBA0

CPU_SDQM#3

CPU_SDA0

CPU_SDA1

CPU_SDA2

CPU_SDA3

CPU_SDA10

CPU_SDRAS#

CPU_SDD0

CPU_SDCAS#

CPU_SDD1

CPU_SDWE#

CPU_SDD2

CPU_SDD3

CPU_SDD4

CPU_SDQM#0

CPU_SDD5

CPU_SDA12

CPU_SDD6

CPU_SDD7

CPU_SDA4

CPU_SDD15

CPU_SDD14

CPU_SDD13

CPU_SDA6

CPU_SDA5

CPU_SDD12

CPU_SDD10

CPU_SDA7

CPU_SDA8

CPU_SDA9

CPU_SDD9

CPU_SDD8

CPU_SDA11

CPU_SDD11

CPU_SDD[31..0]

CPU_SDQM#2

CPU_SDQM#3

CPU_SDCLK1

CPU_SDA[21..0]

CPU_SDCLK0

CPU_SDCLK[1..0]

CPU_SDCS#

CPU_SDCKE

CPU_SDCKE

CPU_SDCS#

CPU_SDCTRL[4..0]

CPU_SDCTRL1 CPU_SDCKECPU_SDCTRL2 CPU_SDWE#CPU_SDCTRL3 CPU_SDRAS#

CPU_SDCTRL0 CPU_SDCS#

CPU_SDCTRL4 CPU_SDCAS#

SRAM_OE#

SRAM_WE#

SRAM_CS1#

SRAM_UB#

SRAM_LB#SRAM_CS1#S_CTRL0SRAM_OE#S_CTRL1SRAM_WE#S_CTRL2

SRAM_UB#S_CTRL4SRAM_LB#S_CTRL3

S_CTRL[4..0]

CPU_SDA21

CPU_SDA20

CPU_SDA15CPU_SDA14CPU_SDA13CPU_SDA12CPU_SDA11CPU_SDA10CPU_SDA9CPU_SDA8CPU_SDA7CPU_SDA6CPU_SDA5CPU_SDA4CPU_SDA3CPU_SDA2CPU_SDA1

CPU_SDA16CPU_SDA17CPU_SDA18CPU_SDA19

CPU_SDD31

CPU_SDD22CPU_SDD21CPU_SDD20CPU_SDD19

CPU_SDD26CPU_SDD25CPU_SDD24CPU_SDD23

CPU_SDD30

CPU_SDD18CPU_SDD17CPU_SDD16

CPU_SDD29CPU_SDD28CPU_SDD27

CPU_SDCLK[1..0]

CPU_SDQM#[3..0]

CPU_SDA[21..0]

CPU_SDD[31..0]

CPU_SDCTRL[4..0]

S_CTRL[4..0]

VCC33

VCC33

VCC33 VCC33

Title


Date: Sheet o f

30420-010 PA3

467/GDC Evaluation Board: CPU Subsystem: RAM


A2


Place C's close to SDRAM power pins,one of each value to each SDRAM!

SRAM 512k x 16

for 1M x 16 type, NC for 512k x 16for 2M x 16 type, NC for 512k x 16 (???)

U592

SRAM 32Mbit (2M x 16)

A720 A621 A522 A423 A324 A225 A126 A027 DQ0 31

VCC1 14

DQ7 46

A1652 A151 A142 A133 A124 A115 A106 A97 A88

DQ1 33DQ2 35DQ3 37DQ4 40DQ5 42DQ6 44

A1719

DQ8 32DQ9 34

DQ10 36DQ11 38DQ12 41DQ13 43DQ14 45DQ15 47

CS110

OE30

WE11

A1818A199A2017

UB50

VSS1 29VSS2 49

LB48

CS215

BYTE51

NC1 12NC2 13NC3 16NC4 28NC5 39

C59110u

R592 10k

R590 0R

C594100n

SDRAM 128M (x16)TSOP 1 (54)

U591

K4S281632F-UCxx

VDD01

DQ02

VDDQ03

DQ14

DQ25

VSSQ06

DQ37

DQ48

VDDQ19

DQ510

DQ611

VSS012

DQ713

VDD114

LDQM15

WE16

CAS17

RAS18

CS19

BA020

BA121

A10/AP22

A023

A124

A225

A326

VDD227 VSS1 28

VSS2 54

DQ15 53

DQ14 51

VSSQ1 52

DQ13 50

A4 29

A5 30

A6 31

A7 32

A8 33

A9 34

A11 35

A12 36

CKE 37

CLK 38

UDQM 39

NC/RFU 40

VSS3 41

DQ8 42

DQ9 44

DQ10 45

DQ11 47

DQ12 48

VDDQ2 43

VSSQ2 46

VDDQ3 49

R591 0R

C598100n

C59010u

C595100n

C599100n

C5961n

C593100n

C5971n

C59210u

SDRAM 128M (x16)TSOP 1 (54)

U590

K4S281632F-UCxx

VDD01

DQ02

VDDQ03

DQ14

DQ25

VSSQ06

DQ37

DQ48

VDDQ19

DQ510

DQ611

VSS012

DQ713

VDD114

LDQM15

WE16

CAS17

RAS18

CS19

BA020

BA121

A10/AP22

A023

A124

A225

A326

VDD227 VSS1 28

VSS2 54

DQ15 53

DQ14 51

VSSQ1 52

DQ13 50

A4 29

A5 30

A6 31

A7 32

A8 33

A9 34

A11 35

A12 36

CKE 37

CLK 38

UDQM 39

NC/RFU 40

VSS3 41

DQ8 42

DQ9 44

DQ10 45

DQ11 47

DQ12 48

VDDQ2 43

VSSQ2 46

VDDQ3 49

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

F_A[27..2]F_A[27..2]

F_CS#

F_RBSY#

RESET#

F_WE#

F_RBSY#

F_BYTE#F_BYTE#

RESET#

F_WP#F_WP#

F_OE#

F_A2F_A3F_A4F_A5F_A6F_A7F_A8F_A9F_A10F_A11F_A12F_A13F_A14F_A15F_A16F_A17F_A18F_A19F_A20F_A21F_A22F_A23F_A24F_A25F_A26F_A27

CPU_D0

CPU_D22

CPU_D1

CPU_D24

CPU_D17

CPU_D26

CPU_D29

CPU_D31

CPU_D23

CPU_D16

CPU_D27

CPU_D21

CPU_D28

CPU_D18

CPU_D20

CPU_D[31..0]

CPU_D19

CPU_D25

CPU_D2CPU_D3

CPU_D30

F_A2F_A3F_A4F_A5F_A6F_A7F_A8F_A9F_A10F_A11F_A12F_A13F_A14F_A15F_A16F_A17F_A18F_A19F_A20F_A21F_A22F_A23F_A24F_A25F_A26F_A27

F_CTRL0 F_CS#F_CTRL1 F_WE#F_CTRL2 F_OE#

F_CTRL[5..0]

CPU_D4CPU_D5

CPU_D7CPU_D6

CPU_D8CPU_D9

CPU_D11CPU_D10

CPU_D12CPU_D13

CPU_D15CPU_D14

F_CS#

F_WE#

F_OE#

F_RBSY#F_CTRL3F_WP#F_CTRL4F_BYTE#F_CTRL5

RESET#

CPU_D[31..0]

F_A[27..2]

F_CTRL[5..0]

VCC33 VCC33

Title


Date: Sheet o f

30420-011 PA3

467/GDC Evaluation Board: CPU Subsystem: Flash


A3


high HW low HW

Place Cs directly toVCC/VIO and VSS pins!

Place Cs directly toVCC/VIO and VSS pins!

C583

10u

C580

100nC581

10u

SL29GLxxxM FPBGA 64

A23: 256 MbitA24: 512 MbitA25: 1 Gbit

U580

SL29GLxxxM

A7A3 A6C3 A5D3 A4B2 A3A2 A2C2 A1D2 A0E2 DQ0 E3

VC

CG

5

DQ7 E6

A16E7 A15D7 A14C7 A13A7 A12B7 A11D6 A10C6 A9A6 A8B6

DQ1 H3DQ2 E4DQ3 H4DQ4 H5DQ5 E5DQ6 H6

A17B3

DQ8 F3DQ9 G3

DQ10 F4DQ11 G4DQ12 F5DQ13 G6DQ14 F6DQ15 G7

CEF2

OEG2

WEA5

ResetB5

A18C4A19D5

VIO

1D

8

A20D4A21C5

WP/ACCB4

BYTEF7

A22B8A23C8A24F8

VS

S1

E8

VS

S3

H2

VS

S2

H7

VIO

2F1

RDY/BSYA4

NC1 A8

A25G8

NC2 H8NC3 A1NC4 B1NC5 C1NC6 D1NC7 E1

NC9 G1NC8 H1

C582

100n

SL29GLxxxM FPBGA 64

A23: 256 MbitA24: 512 MbitA25: 1 Gbit

U581

SL29GLxxxM

A7A3 A6C3 A5D3 A4B2 A3A2 A2C2 A1D2 A0E2 DQ0 E3

VC

CG

5

DQ7 E6

A16E7 A15D7 A14C7 A13A7 A12B7 A11D6 A10C6 A9A6 A8B6

DQ1 H3DQ2 E4DQ3 H4DQ4 H5DQ5 E5DQ6 H6

A17B3

DQ8 F3DQ9 G3

DQ10 F4DQ11 G4DQ12 F5DQ13 G6DQ14 F6DQ15 G7

CEF2

OEG2

WEA5

ResetB5

A18C4A19D5

VIO

1D

8

A20D4A21C5

WP/ACCB4

BYTEF7

A22B8A23C8A24F8

VS

S1

E8

VS

S3

H2

VS

S2

H7

VIO

2F1

RDY/BSYA4

NC1 A8

A25G8

NC2 H8NC3 A1NC4 B1NC5 C1NC6 D1NC7 E1

NC9 G1NC8 H1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CAN0_[1..0]

CAN0_[1..0]

CAN_CTRL[3..0]

UART0_[7..0]

UART1_[7..0]

ETH_CTRL[4..0]

CPU_D[31..0]

RESET#

ETH_A[7..1]

UART2_[3..0]

SD_CARD[7..0]

GPIO[17..0]

SD_CARD_PWR_CTRL

USB_STAT[1..0]

CAN0_[1..0]

CAN1_[1..0]

CAN_CTRL[3..0]

UART1_[7..0]

UART0_[7..0]

UART2_[3..0]

RESET#

CPU_D[31..0]

ETH_CTRL[4..0]

ETH_A[7..1]

SD_CARD[7..0]

GPIO[17..0]

SD_CARD_PWR_CTRL

USB_STAT[1..0]

Title


Date: Sheet o f

30420-012 PA3

467/GDC Evaluation Board: I/O


A3


Ethernet USB

CAN

UART

GPIO SD

Reference ID: 600

Reference ID: 700 Reference ID: 900

Reference ID: 800#13

#14

#15

#16

RESET#

CPU_D[31..0]

ETH_A[7..1]

ETH_CTRL[4..0]

UART2_[3..0]

USB_STAT[1..0]

UART0_[7..0]

UART1_[7..0]

GPIO[17..0]

SD_CARD[7..0]

SD_CARD_PWR_CTRL

CAN0_[1..0]

CAN1_[1..0]

CAN_CTRL[3..0]

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ETH_A[7..1]

CPU_D[31..0]

ETH_CTRL[4..0]

RESET#

SPD_SELFIFO_SELAMDIX_SEL

AMDIX_SELFIFO_SELSPD_SEL

ETH_A1ETH_A2ETH_A3ETH_A4ETH_A5

ETH_A7ETH_A6

CPU_D0CPU_D1CPU_D2CPU_D3CPU_D4CPU_D5CPU_D6CPU_D7CPU_D8CPU_D9CPU_D10CPU_D11CPU_D12CPU_D13CPU_D14CPU_D15

RESET#ETH_CTRL2 ETH_RD#ETH_CTRL1 ETH_WR#ETH_CTRL0 ETH_CS#

ETH_CTRL4 ETH_PMEETH_CTRL3 ETH_IRQ

CPU_D16CPU_D17CPU_D18CPU_D19CPU_D20CPU_D21CPU_D22CPU_D23CPU_D24CPU_D25CPU_D26CPU_D27CPU_D28CPU_D29CPU_D30CPU_D31

USBDMUSBDP

UART2_RTS USBDP

UART2_TXDUART2_1

UART2_RXDUART2_TXD

UART2_[3..0]

UART2_CTSUART2_2

UART2_CTS USBDM

UART2_RTSUART2_3

UART2_RXDUART2_0

RESET#

USB_STAT[1..0]

USB_STAT1 USB_SLEEP#USB_STAT0 USB_PWREN#

USB_PWREN#USB_SLEEP#

RESET#

ETH_CTRL[4..0]

ETH_A[7..1]

CPU_D[31..0]

UART2_[3..0]

USB_STAT[1..0]

VCC33

VCC33

VCC33VCC33VCC33

VCC33

VCC33

VCC33

VCC33

VCC33

VCC33

Title


Date: Sheet o f

30420-013 PA3

467/GDC Evaluation Board: I/O: Ethernet / USB


A2

13 16Thursday, October 04, 2007

16 bit mode32 bit mode (default)

CBUS pin defaultconfiguration

C624 10u

C620100n

10/100 Mbit Ethernet Tranceiver

LAN9218

U600LAN9218-MT

RDP 83RDM 82

TDP 79TDM 78

RBIAS 10

VR

EG

_33

2

VD

D_C

OR

E2

3

VD

D_I

O1

20

VD

D_P

LL_1

87

VD

D_P

LL_3

38

VD

D_C

OR

E1

65

A118A217A316A415A514A613A712

D064D163D262D359D458D557D656D753D852D951D1050D1149D1246D1345D1444D1543D1640D1739D1838D1937D2036D2133D2232D2331D2430D2529D2626D2725D2824D2923D3022D3121

RESET95RD92WR93CS94

PME70 IRQ72

VD

D_I

O2

28V

DD

_IO

335

VD

D_I

O4

42V

DD

_IO

548

VD

D_I

O6

55V

DD

_IO

761

VD

D_I

O8

97

VS

S_R

EF

11

VS

S_P

LL4

GN

D_C

OR

E1

66G

ND

_CO

RE

21

GN

D_I

O1

19G

ND

_IO

227

GN

D_I

O3

34G

ND

_IO

441

GN

D_I

O5

47G

ND

_IO

654

GN

D_I

O7

60G

ND

_IO

896

VS

SA

177

VS

SA

280

VS

SA

386

VS

SA

488

NC4 90NC5 91

ATEST 9

XTAL1 6

XTAL2 5

NC1 71

NC3 84NC2 75

EXRES1 87

EECS 68

EECLK_GPO4 69EEDIO_GPO3 67

GPIO0_LED1 98GPIO1_LED2 99GPIO2_LED3 100

SPD_SEL 74FIFO_SEL 76

AMDIX_EN 73

VD

D_A

181

VD

D_A

285

VD

D_A

389

C612

10u

R6120R NP

R6170R

C616100n

C601

100n

C609

100n

C615

10u

C604

100n

R60

349

R9

C618

27p

C621100n 0805

R6130R NP

R606 12k4

R615 10k

X600

HFJ11-2450E-L12RL

A_G9K_G10

1122334455667788

A_Y11K_Y12

SH

LD1

SH

LD1

SH

LD2

SH

LD2

C611

100n

C606

1n

R60

449

R9

C622 100n

R616 0R NP

C61710u

C605

10u

C602

10u

R601 120R

R6081M

R600 120R

C625 100n

R607 12k

L601

BLM18PG600SN1

FT232RL

U601FT232RL

VCCIO 4VCC 20

USBDM 16USBDP 15

NC1 8RESET# 19

NC2 24OSCI 27

OSCO 28

3V3OUT 17

TXD1RXD5RTS#3CTS#11DTR#2DSR#9DCD#10RI#6CBUS023CBUS122CBUS213CBUS314CBUS412 A

GN

D25

GN

D7

GN

D18

GN

D21

TES

T26

C619

27p

C608

100n

R60

549

R9

R60910k

C600

1n

C610

100n

Y600

FA-238 25.000

1

3

2

4

R61110k

C603

1n

C614

100n

C607

100n

C623 10u

C613

1n

R60

249

R9

R61010k

RN

600

10kx

4

1 2 3 45678

R6140R NP

X601

US

B-M

05-0

03VCC1D-2D+3

GND5 ID4

S1

6S

27

L600

BLM

18P

G60

0SN

1

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

EXT_CAN0H

CAN0_TX_STBY

EXT_CAN0HCAN0_RXDCAN0_TXD

CAN0_TX_ENEXT_CAN0L

EXT_CAN1LEXT_CAN1H

CAN1_RXDCAN1_TXD

CAN_CTRL[3..0]

CAN1_TX_STBYCAN_CTRL3CAN1_TX_ENCAN_CTRL2

CAN1_TX_EN

CAN0_TX_ENCAN_CTRL0CAN0_TX_STBYCAN_CTRL1

CAN1_TX_STBY

EXT_CAN0L

EXT_CAN1H

EXT_CAN1LCAN1_[1..0]

CAN1_1 CAN1_TXDCAN1_0 CAN1_RXD

CAN0_0 CAN0_RXD

CAN0_[1..0]

CAN0_1 CAN0_TXD

CAN_CTRL[3..0]

CAN1_[1..0]

CAN0_[1..0]

VCC33

VCC33

VCC50

VCC33

Title


Date: Sheet o f

30420-014 PA3

467/GDC Evaluation Board: I/O: CAN


A4


Place R704 directlyto U700 pin 4!

Place R705 directlyto U701 pin 4!

C700100p

C709100n

R704 33R

D70

0V

C08

0512

A25

0

U700

SN65HVD234DV

CC

3

RxD4 TxD1

EN5

GN

D2

CANH 7CANL 6

RS8

C705100p

L700744212100

13

54

2

C710 10u

C713 100n

D70

3V

C08

0512

A25

0

R703 120R 1206

D702

VC080512A250

R700 120R 1206X700

3-17

4019

4-2

594837261

1011

L701744212100

13

54

2

C711 100n

D705

VC080512A250

R7020R 0805 NP

C701100p NP

SW700

7813J-001-023E

C712 10u

SW701

7813J-001-023E

C706100p NP

D70

1V

C08

0512

A25

0

C702100p NP

C70310u

C704100n

D70

4V

C08

0512

A25

0

R701 0R 0805 NP

C70810u

C707100p NP

U701

SN65HVD234D

VC

C3

RxD4 TxD1

EN5

GN

D2

CANH 7CANL 6

RS8

R705 33R

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RS232_0_TXDRS232_0_CTS

RS232_0_RTSRS232_0_DSRRS232_0_RI

RS232_0_DTRRS232_0_CD

RS232_0_RXD

RS232_1_TXDRS232_1_CTS

RS232_1_RTSRS232_1_DSRRS232_1_RI

RS232_1_DTRRS232_1_CD

RS232_1_RXD

RS232_0_TXDRS232_0_RTSRS232_0_DTR

RS232_0_RXDRS232_0_CTSRS232_0_DSRRS232_0_CDRS232_0_RI

UART0_TXDUART0_RTSUART0_DTR

UART0_RXDUART0_CTSUART0_DSRUART0_CDUART0_RI

RS232_1_TXDRS232_1_RTSRS232_1_DTR

RS232_1_RXDRS232_1_CTSRS232_1_DSRRS232_1_CDRS232_1_RI

UART1_TXDUART1_RTSUART1_DTR

UART1_RXDUART1_CTSUART1_DSRUART1_CDUART1_RI

UART0_[7..0]

UART0_TXDUART0_0UART0_RXDUART0_1UART0_RTSUART0_2UART0_CTSUART0_3UART0_DTRUART0_4UART0_DSRUART0_5UART0_CDUART0_6UART0_RIUART0_7

UART1_[7..0]

UART1_TXDUART1_0UART1_RXDUART1_1UART1_RTSUART1_2UART1_CTSUART1_3UART1_DTRUART1_4UART1_DSRUART1_5UART1_CDUART1_6UART1_RIUART1_7

UART0_[7..0]

UART1_[7..0]

VCC33

VCC33

VCC33

VCC33

Title


Date: Sheet o f

30420-015 PA3

467/GDC Evaluation Board: I/O: UART


A3


auto powerdown

auto powerdown

X800

3-1740194-2

594837261

1011

C810 100n

U801MAX3243EIPW

C1+28C1-24

C2+1C2-2

INVALID21G

ND

25

VC

C26

V+ 27

V- 3

FORCEON23 FORCEOFF22

T3IN12

R1OUT19R2OUT18

T2IN13

ROUT2B20

T1OUT 9T2OUT 10T3OUT 11

R1IN 4R2IN 5R3IN 6

T1IN14

R3OUT17R4IN 7R5IN 8R4OUT16

R5OUT15

C802 100n

C800 10u

LN800BLA31BD121SN4

LN803BLA31BD121SN4

C803 100n

C805 100n

C801 100n

C808 100n

X801

3-1740194-2

594837261

1011

C806 10u

C804 100n

U800MAX3243EIPW

C1+28C1-24

C2+1C2-2

INVALID21

GN

D25

VC

C26

V+ 27

V- 3

FORCEON23 FORCEOFF22

T3IN12

R1OUT19R2OUT18

T2IN13

ROUT2B20

T1OUT 9T2OUT 10T3OUT 11

R1IN 4R2IN 5R3IN 6

T1IN14

R3OUT17R4IN 7R5IN 8R4OUT16

R5OUT15

C811 100n

C809 100n

LN801BLA31BD121SN4

LN802BLA31BD121SN4

C807 100n

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GPIO0GPIO2GPIO4GPIO6


GPIO[17..0]

GPIO0GPIO1GPIO2GPIO3GPIO4GPIO5GPIO6GPIO7

GPIO8GPIO9 GPIO10

GPIO12GPIO14GPIO16


GPIO8GPIO9GPIO10GPIO11GPIO12GPIO13GPIO14GPIO15GPIO16GPIO17

SD_CARD[7..0]

SD_CARD5 SD_DAT3

SD_DAT0

SD_CMD

SD_CARD6 SD_WP

SD_CARD3 SD_DAT1SD_CARD2 SD_DAT0

SD_DAT1

SD_XMCD

SD_CARD1 SD_CMD

SD_CARD7 SD_XMCD

SD_CARD0 SD_CLK

SD_DAT3

SD_WP

SD_CARD4 SD_DAT2

SD_CLK

SD_DAT2

SD_CARD_PWR_CTRL

GPIO[17..0]

SD_CARD[7..0]

SD_CARD_PWR_CTRL

VCC33

VCC33 SD_CARD_VCC

VCC33

VCC33

Title


Date: Sheet o f

30420-016 PA3

467/GDC Evaluation Board: I/O: GPIO / SD Card


A3


D90

5E

SD

9X3.

3ST5

G

100n

C902X900

FTSH-110-01-L-DV-K-A-P

1 23 45 67 89 10

11 1213 1415 1617 1819 20

D90

0E

SD

9X3.

3ST5

G

C900100n

D90

2E

SD

9X3.

3ST5

G

D90

6E

SD

9X3.

3ST5

G

SI3443DV

T900

SI3443BDV-T1-E3

D11

D22

G3 S 4

D3 5

D4 6

X901FPS009-2305

DAT18DAT07GND16CLK5VDD4GND03CMD2DAT31DAT29

CD

10C

OM

11W

P12

D90

4E

SD

9X3.

3ST5

G

10uC903

D90

1E

SD

9X3.

3ST5

G

R9014k7

D90

7E

SD

9X3.

3ST5

G

C901100n

R9024k7

R9004k7

D90

3E

SD

9X3.

3ST5

G

SD CARD PWR CTRL GDC CPU Subsystem I/O Subsystem · 5 5 4 4 3 3 2 2 1 1 d d c c b b a a avin0 avin1...

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