SC18 1999 .book : SC18 PREFACE 1999 i Wed May 12 … · Philips Semiconductors Discrete...

SC18_1999_.book : SC18_PREFACE_1999 i Wed May 12 11:40:55 1999

May 1999 i

Philips Semiconductors Discrete Semiconductor Packages

Preface

TABLE OF CONTENTS

Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii

Chapter 1 - Package overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 - 1

Packages in ascending order of SOD/SOT numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 - 2

Cross-reference from JEDEC to SOD/SOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 - 22

Cross-reference from EIAJ to SOD/SOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 - 22

Chapter 2 - Package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 1

Chapter 3 - Handling precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 - 1

Electrostatic charges. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 - 2

Workstation for handling electrostatic-sensitive devices. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 - 2

PCB assembly. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 - 2

Testing PCBs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 - 2

Chapter 4 - Soldering guidelines and SMD footprint design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 2

Axial and radial devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 2

Surface-mount devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 3

Recommended footprints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 - 14

Chapter 5 - Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 2

Part one: Thermal properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 2

Part two: Worked examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 7

Part three: Heat dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 - 15

Chapter 6 - Packing methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 - 1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 - 2

Glossary of terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 - 2

Packing methods in exploded view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 -3

Packing quantities, box dimensions and carrier shapes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 - 13

SC18_1999_.book : SC18_PREFACE_1999 ii Wed May 12 11:40:55 1999

May 1999 ii


Preface

Chapter 7 - Environmental information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 - 1

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 - 2

Explanation of the tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 - 2

General safety remarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 - 5

Substances not used by Philips Semiconductors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 - 6

Disposal and recycling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 - 7

General warnings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 - 7

Chemical content tables:

Diodes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 - 8

Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 - 13

Chapter 8 - Data handbook system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 1

SC18_1999_.book : SC18_PREFACE_1999 iii Wed May 12 11:40:55 1999

May 1999 iii


Preface

INTRODUCTION

Philips Semiconductors is one of the world’s leadingsuppliers of discretes. Our range stretches from small-signal diodes and transistors, through FET power-devicesand power rectifiers and triacs, to RF and microwavedevices and modules. Such a diverse range of devicesrequires an equally diverse range of package designs.These packages must not only protect the enclosed circuitand connect it to the outside world, but must also ensurethe device operates at its optimum performance in a widevariety of applications.

The discrete semiconductor package, which for manyyears was only an afterthought in the design andmanufacture of electronic systems, increasingly is beingrecognized as a critical factor in both cost andperformance. Indeed, in many applications, the package isoften as important as the circuit it encapsulates. And as thefunctional density of devices and systems increases, therole of the discrete semiconductor package and itsinterconnections becomes ever more important.

With this in mind, this publication consolidates all relevantdata for Philips Semiconductors discrete packages in onebook – from dimensional outline drawings and solderinginformation, to thermal design considerations, packingdata, and chemical content tables. It should be viewed asa logical extension to our Discrete Semiconductor DataHandbook series and, as such, is intended to serve as apractical data reference to all those involved in productionand engineering design, as well as a guide to packageselection and availability.

An innovative partner

The development of discrete semiconductor packages is adynamic technology as new and improved circuitprocesses become available. Applications that until only afew years ago were unattainable, are today commonplace. From mobile telecommunications and satellitebroadcasting to aerospace and automotive applications,each imposes its own individual demands on the electronicpackage.

To meet these, and future demands, it is essential that thecomponent manufacturer has an intimate knowledge ofthe multidisciplinary technologies involved to bring thecircuit and package together in an optimum design.

Here at Philips, we have been involved in discretesemiconductor package design and development sincethe early1950’s, during which time we have built up awealth of experience and know-how in advanced processtechnologies and assembly procedures. By fully exploitingthis expertise, and establishing close working partnershipswith our customers, we have developed many market-driven and innovative package designs.

How this book is organized

We organized this databook into the following chapters:

Chapter 1 gives an overview of our discretesemiconductor packages along with a 3-dimensionalillustration of each type. Packages are listed in ascendingorder of Philips outline code and followed by cross-reference lists from the JEDEC and EIAJ numbers to theequivalent Philips SOD/SOT number, where applicable.

Chapter 2 contains outline dimensional drawings for mostof our discrete packages.

Chapter 3 reviews discrete package handling precautionswith emphasis on ESD awareness at the assemblyworkstation.

Chapter 4 covers through-hole and SMD soldering andmounting techniques, and includes recommendedfootprint designs for many SMD packages.

Chapter 5 is divided into three parts covering: essentialthermal properties of discrete semiconductors, workedexamples of junction temperatures, and component heatdissipation and heatsink design.

Chapter 6 contains a survey of some of the packingmethods most frequently used and includes thedimensions and shapes of the packing boxes and reels aswell as their packing quantities.

Chapter 7 provides comprehensive data on the chemicalcomposition of our discrete devices with information ontheir disposal and safety.

For information about IC packages, refer to PhilipsSemiconductors’ Data Handbook IC26 Integrated CircuitPackages, order number 9398 652 90011.

SC18_1999_.book : SC18_PREFACE_1999 iv Wed May 12 11:40:55 1999

May 1999 iv


Preface

SC18_1999_.book : SC18_PACKAGE_OVERVIEW_1999_1.copy 1 Wed May 12 11:40:55 1999

CHAPTER 1

PACKAGE OVERVIEW


May 1999 1 - 2


Package overview Chapter 1

PACKAGE OVERVIEW

The following table contains a listing of discrete packages in ascending order. The list contains the description of thevarious packages with their 3-dimensional view and the page number on which the outline drawing can be found.Cross-references from the JEDEC and EIAJ numbers to the equivalent SOD/SOT numbers, where applicable, can befound after this table.

PACKAGES IN ASCENDING ORDER OF SOD/SOT NUMBERS

OUTLINE DESCRIPTION 3D VIEW (not to scale) PAGE

SOD27 Hermetically sealed glass package; axial leaded; 2 leads 2 - 2


SOD59 Plastic single-ended package; heatsink mounted;1 mounting hole; 2-lead TO-220

2 - 3

SOD61A Hermetically sealed glass package; axial leaded; 2 leads 2 - 4

SOD61AB to AK Hermetically sealed glass package; axial leaded; 2 leads 2 - 5

SOD61AB2 Hermetically sealed glass package; axial leaded; 2 leads 2 - 6

M3D176

handbook, 2 columns

M3D116

M3D306

handbook, halfpage

M3D189

handbook, 2 columns

M3D117

M3D354


May 1999 1 - 3



SOD61AC2 Hermetically sealed glass package; axial leaded; 2 leads 2 - 6

SOD61AD2 Hermetically sealed glass package; axial leaded; 2 leads 2 - 7

SOD61H2 Miniature hermetically sealed glass package; axial leaded;2 leads

2 - 7




SOD70 Plastic near cylindrical single-ended package;2 in-line leads

2 - 10

SOD80C Hermetically sealed glass surface mounted package;2 connectors

2 - 11


M3D354

M3D354

book, halfpage

M3D236

handbook, 2 columns

M3D118

handbook, halfpage

M3D130

handbook, halfpage

M3D050

andbook, halfpage

M3D239

fpage

M3D238


May 1999 1 - 4



SOD81 Hermetically sealed glass package; ImplotecTM(1)

technology; axial leaded; 2 leads2 - 11


SOD83B Hermetically sealed glass package; axial leaded; 2 leads 2 - 12

SOD87 Hermetically sealed glass surface mounted package;ImplotecTM(1) technology; 2 connectors

2 - 13





OUTLINE DESCRIPTION 3D VIEW (not to scale) PAGEhandbook, halfpage

M3D119

M3D352

dbook, halfpage

M3D353

lfpage

M3D121

M3D354

M3D355

book, halfpage

M3D356

dbook, halfpage

M3D357


May 1999 1 - 5



SOD91 Hermetically sealed glass package; ImplotecTM(1)

technology; axial leaded; 2 leads2 - 15

SOD95 Plastic single-ended package; 2-lead low-profile TO-220 2 - 16

SOD100 Plastic single-ended package; isolated heatsink mounted;1 mounting hole; 2-lead TO-220F exposed tabs

2 - 17

SOD106 Transfer-moulded thermo-setting plastic small rectangularsurface mounted package; 2 connectors

2 - 18

SOD107A Hermetically sealed plastic package; axial leaded; 2 leads 2 - 19

SOD107B Hermetically sealed plastic package; axial leaded; 2 leads 2 - 19

SOD110 Very small ceramic rectangular surface mounted package 2 - 20

SOD113 Plastic single-ended package; isolated heatsink mounted;1 mounting hole; 2-lead TO-220 'full pack'

2 - 21


M3D122

handbook, halfpage

M3D140

M3D318

handbook, halfpage

M3D168

M3D350

M3D351

handbook, halfpage

M3D042

ZA

ndbook, halfpage

M3D295


May 1999 1 - 6



SOD117 Plastic single-ended through-hole package; mountable toheatsink; 1 mounting hole; 3 in-line leads (one leadcropped)

2 - 22

SOD118A Hermetically sealed plastic package; axial leaded; 2 leads 2 - 23

SOD118B Hermetically sealed plastic package; axial leaded; 2 leads 2 - 23

SOD119AB Hermetically sealed glass package; axial leaded; 2 leads 2 - 24


SOD121AB toAJ Hermetically sealed glass package; axial leaded; 2 leads 2 - 25

SOD323 Plastic surface mounted package; 2 leads 2 - 26

SOD523 Plastic surface mounted package; 2 leads 2 - 27


M3D443

M3D350

M3D351

M3D354

halfpage

M3D423

ook, halfpage

M3D424

dbook, halfpage

M3D049

M3D319


May 1999 1 - 7



SOT23 Plastic surface mounted package; 3 leads 2 - 28

SOT32 Plastic single-ended leaded (through hole) package;mountable to heatsink, 1 mounting hole; 3 leads

2 - 29

SOT54 Plastic single-ended leaded (through hole) package;3 leads

2 - 30

SOT54 variant Plastic single-ended leaded (through hole) package;3 leads (on-circle)

2 - 31

SOT54A Plastic single-ended leaded (through hole) package;3 leads (wide pitch)

2 - 32

SOT78 Plastic single-ended package; heatsink mounted;1 mounting hole; 3-lead TO-220AB

2 - 33

SOT82 Plastic single-ended package; 3 leads (in-line) 2 - 34

SOT89 Plastic surface mounted package; collector pad for goodheat transfer; 3 leads

2 - 35


book, halfpage

M3D088

halfpage

M3D100

handbook, halfpage

M3D186

ok, halfpage

M3D106

dbook, halfpage

M3D296

M3D307

M3D135

book, halfpage

M3D109


May 1999 1 - 8



SOT96-1(SO8)

Plastic small outline package; 8 leads; body width 3.9 mm 2 - 36

SOT100A Surface mounted ceramic hermetic package; 4 leads 2 - 37

SOT115D Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extrahorizontal mounting holes; 9 gold-plated in-line leads

2 - 38

SOT115G Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extrahorizontal mounting holes; 8 gold-plated in-line leads

2 - 39

SOT115J Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extrahorizontal mounting holes; 7 gold-plated in-line leads

2 - 40

SOT115L Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 7 gold-plated in-line leads

2 - 41

SOT115N Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extrahorizontal mounting holes; optical input with connector;7 gold-plated in-line leads

2 - 42

SOT115P Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extrahorizontal mounting holes; optical input with connector;7 gold-plated in-line leads

2 - 43


M3D144

M3D055

handbook, halfpage

M3D248

handbook, halfpage

M3D250

handbook, halfpage

M3D252

handbook, halfpage

M3D253

handbook, halfpage

M3D112

handbook, halfpage

M3D112


May 1999 1 - 9



SOT115R Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extrahorizontal mounting holes; optical input with connector;7 gold-plated in-line leads

2 - 44

SOT115T Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extrahorizontal mounting holes; optical input; 8 gold-platedin-line leads

2 - 45

SOT115U Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extrahorizontal mounting holes; optical input; 7 gold-platedin-line leads

2 - 46

SOT115V Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extrahorizontal mounting holes; optical input with connector;7 gold-plated in-line leads

2 - 47

SOT115W Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extrahorizontal mounting holes; optical input with connector;8 gold-plated in-line leads

2 - 48

SOT119A Flanged ceramic package; 2 mounting holes; 6 leads 2 - 49

SOT120A Studded ceramic package; 4 leads 2 - 50

SOT121B Flanged ceramic package; 2 mounting holes; 4 leads 2 - 51

OUTLINE DESCRIPTION 3D VIEW (not to scale) PAGEhandbook, halfpage

M3D112

handbook, halfpage

M3D294

handbook, halfpage

M3D112

handbook, halfpage

M3D389

handbook, halfpage

M3D428

M3D058

M3D255

M3D060


May 1999 1 - 10




SOT122D Studless ceramic package; 4 leads 2 - 53


SOT128B Plastic single-ended leaded (through hole) package; withcooling fin, mountable to heatsink, 1 mounting hole;3 leads (in-line)

2 - 55

SOT137-1(SO24)


SOT143B Plastic surface mounted package; 4 leads 2 - 57

SOT143R Plastic surface mounted package; reverse pinning; 4 leads 2 - 58



M3D061

ge

M3D062

M3D065

handbook, halfpage

M3D067

M3D385

M3D071

M3D072

book, halfpage

M3D074


May 1999 1 - 11




SOT163-1(SO20)



SOT172A1 Studded ceramic package; 4 leads 2 - 63

SOT172A2 Studded ceramic package; 4 leads 2 - 64

SOT172D Studless ceramic package; 4 leads 2 - 65

SOT186 Plastic single-ended package; isolated heatsink mounted;1 mounting hole; 3 lead TO-220 exposed tabs

2 - 66

SOT186A Plastic single-ended package; isolated heatsink mounted;1 mounting hole; 3 lead TO-220

2 - 67


handbook, halfpage

M3D075

M3D184

M3D076

andbook, halfpage

M3D077

M3D079

M3D309

M3D308


May 1999 1 - 12



SOT195 Plastic single-ended flat package; 4 in-line leads 2 - 68

SOT199 Plastic single-ended package; heatsink mounted;1 mounting hole; 3 leads (in-line)

2 - 69

SOT223 Plastic surface mounted package; collector pad for goodheat transfer; 4 leads

2 - 70

SOT226 Plastic single-ended package; 3 lead low-profile TO-220 2 - 71

SOT262A1 Flanged double-ended ceramic package; 2 mountingholes; 4 leads

2 - 72

SOT262A2 Flanged double-ended ceramic package; 2 mountingholes; 4 leads

2 - 73

SOT262B Flanged double-ended ceramic package; 2 mountingholes; 4 leads

2 - 74

SOT263 Plastic single-ended package; heatsink mounted;1 mounting hole; 5-lead TO-220

2 - 75


handbook, halfpage

M3D329

M3D134

ok, halfpage

M3D087

M3D311

M3D091

M3D091

M3D172

M3D312


May 1999 1 - 13



SOT263-01 Plastic single-ended package; heatsink mounted;1 mounting hole; 5-lead TO-220 lead form option

2 - 76

SOT268A Flanged double-ended ceramic package; 2 mountingholes; 4 leads

2 - 77


SOT279A Flanged double-ended ceramic package; 2 mountingholes; 4 leads

2 - 79

SOT281 Plastic single-ended package; 5-lead low-profile TO-220 2 - 80



SOT324B Flanged ceramic package; 2 mounting holes; 4 leads 2 - 83


M3D317

M3D092

book, halfpage

M3D093

M3D096

M3D313

handbook, halfpage

M3D099

book, halfpage

M3D102

M3D170


May 1999 1 - 14



SOT338-1(SSOP16)

Plastic shrink small outline package; 16 leads;body width 5.3 mm

2 - 84

SOT339-1(SSOP20)


2 - 85

SOT340-1(SSOP24)


2 - 86

SOT341-1(SSOP28)


2 - 87

SOT343N Plastic surface mounted package; 4 leads 2 - 88

SOT343R Plastic surface mounted package; reverse pinning; 4 leads 2 - 89


SOT347 Ceramic single-ended flat package; heatsink mounted;2 mounting holes; 12 in-line tin (Sn) plated leads

2 - 91


M3D573

M3D574

M3D575

M3D576

book, halfpage

M3D123

M3D124

ok, halfpage

M3D114

ok, halfpage

M3D156


May 1999 1 - 15



SOT347B Ceramic single-ended flat package; heatsink mounted;2 mounting holes; 12 in-line tin (Sn) plated leads

2 - 92

SOT347C Ceramic single-ended flat package; heatsink mounted;2 mounting holes; 12 in-line tin (Sn) plated leads

2 - 93



SOT365A Plastic rectangular single-ended flat package; flangemounted; 2 mounting holes; 4 in-line leads

2 - 96

SOT365B Plastic rectangular single-ended flat package; flangemounted; 2 mounting holes; 4 in-line leads

2 - 97




M3D387

M3D435

ok, halfpage

MBD127

ook, halfpage

MBD128

handbook, halfpage

M3D167

handbook, halfpage

M3D444

M3D171

M3D150


May 1999 1 - 16



SOT391B Flangeless ceramic package; 2 leads 2 - 100

SOT399 Plastic single-ended through-hole package; mountable toheatsink; 1 mounting hole; 3 in-line leads

2 - 101

SOT404 Plastic single-ended surface mounted package (Philipsversion of D2-PAK); 3 leads (one lead cropped)

2 - 102

SOT409A Ceramic surface mounted package; 8 leads 2 - 103

SOT409B Ceramic surface mounted package; 8 leads 2 - 104


SOT422A Flanged hermetic ceramic package; 2 mounting holes;2 leads

2 - 106


M3D174

M3D321

M3D166

M3D175

M3D175

M3D173

handbook, halfpage

M3D259


May 1999 1 - 17




2 - 107

SOT426 Plastic single-ended surface mounted package (Philipsversion of D2-PAK); 5 leads (one lead cropped)

2 - 108

SOT427 Plastic single-ended package (Philips version of D2-PAK);7 leads (one lead cropped)

2 - 109

SOT428 Plastic single-ended surface mounted package (Philipsversion of D-PAK); 3 leads (one lead cropped)

2 - 110

SOT429 Plastic single-ended through-hole package; heatsinkmounted; 1 mounting hole; 3 lead TO-247

2 - 111

SOT430 Plastic single-ended package; heatsink mounted;1 mounting hole; 3 lead JUMBO TO-247

2 - 112



2 - 114


handbook, halfpage

M3D260

M3D322

M3D323

ok, halfpage

M3D300

M3D314

M3D358

M3D159

handbook, halfpage

M3D039


May 1999 1 - 18




2 - 115

SOT441A Studless ceramic package; 4 leads 2 - 116



2 - 118


2 - 119

SOT445B Flanged hermetic ceramic package; 2 mounting holes;2 leads

2 - 120

SOT445C Flanged hermetic ceramic package; 2 mounting holes;2 leads

2 - 121


2 - 122


handbook, halfpage

M3D031

handbook, halfpage

M3D032

M3D033

handbook, halfpage

M3D034

ndbook, halfpage

M3D301

book, halfpage

M3D199

M3D324

handbook, halfpage

M3D039


May 1999 1 - 19



SOT451A Ceramic single-ended flat package; heatsink mounted;1 mounting hole; 11 in-line gold-metallized leads

2 - 123

SOT453A Plastic single-ended combined package; magnetoresistivesensor element; bipolar IC; magnetized ferrite magnet(3.8 x 2 x 0.8 mm); 2 in-line leads

2 - 124

SOT453B Plastic single-ended combined package; magnetoresistivesensor element; bipolar IC; magnetized ferrite magnet(8 x 8 x 4.5 mm); 2 in-line leads

2 - 125

SOT453C Plastic single-ended combined package; magnetoresistivesensor element; bipolar IC; magnetized ferrite magnet(5.5 x 5.5 x 3 mm); 2 in-line leads

2 - 126



SOT467A Flanged LDMOST package; 2 mounting holes; 2 leadsPackage under development (2)

2 - 129

SOT468A Flanged ceramic (AIN) package; 2 mounting holes; 2 leads 2 - 130


k, halfpage

M3D299

ndbook, halfpage

M3D281

handbook, halfpage

M3D282

handbook, halfpage

M3D283

ok, halfpage

M3D302

M3D285

M3D381

M3D372


May 1999 1 - 20



SOT473A Flanged ceramic package; 2 mounting holes; 2 leadsPackage under development (2)

2 - 131

SOT477B Plastic single-ended combined package; magnetoresistivesensor element; bipolar IC; magnetized ferrite magnet(8 x 8 x 4.5 mm); 3 in-line leads

2 - 132

SOT482B Leadless surface mounted package; plastic cap;4 terminations

2 - 133


SOT494A Flanged double-ended ceramic (AIN) package; 2 mountingholes; 4 leadsPackage under development (2)

2 - 135

SOT501A Plastic rectangular single-ended flat package; flangemounted; 2 mounting holes; 4 in-line leads

2 - 136


2 - 137



M3D447

M3D391

handbook, halfpage

M3D373

M3D425

andbook, halfpage

M3D374

andbook, halfpage

M3D388

handbook, halfpage

M3D379

handbook, halfpage

M3D426


May 1999 1 - 21



Notes

1. Implotec is a trademark of Philips.

2. Philips Semiconductors reserves the right to make changes without notice.

SOT530-1(TSSOP8)

Plastic thin shrink small outline package; 8 leads; bodywidth 4.4 mm

2 - 139

SOT533 Plastic single-ended package (Philips version of I-PAK);3 leads (in-line)

2 - 140

SOT538A Ceramic surface mounted package; 2 leadsPackage under development (2)

2 - 141

SOT539A Flanged balanced LDMOST package; 2 mounting holes;4 leadsPackage under development (2)

2 - 142

SOT540A Flanged balanced LDMOST package; 2 mounting holes;4 leadsPackage under development (2)

2 - 143


2 - 144

SOT551A Plastic surface mounted package; 5 leadsPackage under development (2)

2 - 145


M3D647

handbook, halfpage

M3D445

alfpage

M3D438

M3D427

M3D392

M3D390

M3D452


May 1999 1 - 22



CROSS-REFERENCE FROM JEDEC TO SOD/SOT

JEDEC OUTLINE PAGE

DO-34 SOD68 2 - 9

DO-35 SOD27 2 - 2

DO-41 SOD66 2 - 8

DO-214AC SOD106 2 - 18

MO-150AC SOT338-1 / SSOP16 2 - 84

MO-150AE SOT339-1 / SSOP20 2 - 85

MO-150AG SOT340-1 / SSOP24 2 - 86

MO-150AH SOT341-1 / SSOP28 2 - 87

MO-153AA SOT530-1 / SSOP28 2 - 139

MS-012AA SOT96-1 / SO8 2 - 36

MS-013AC SOT163-1 2 - 61

MS-013AD SOT137-1 / SO24 2 - 56

TO-92 SOT54 2 - 30

TO-126 SOT32 2 - 29

TO-202AA SOT128B 2 - 55

TO-220 SOD95 2 - 16

TO-220 SOT226 2 - 71

TO-220 SOT263 2 - 75

TO-220 SOT263-01 2 - 76

TO-220 SOT281 2 - 80

TO-220AB SOT78 2 - 33

TO-220AC SOD59 2 - 3

TO-220F SOD100 2 - 17

TO-220F SOD113 2 - 21

TO-220F SOT186 2 - 66

TO-220F SOT186A 2 - 67

TO-236 SOT346 2 - 90

TO-236AB SOT23 2 - 28

TO-243 SOT89 2 - 35

TO-247 SOT429 2 - 111

CROSS-REFERENCE FROM EIAJ TO SOD/SOT

EIAJ OUTLINE PAGE

SC-40 SOD27 2 - 2

SC-43 SOT54 2 - 30

SC-46 SOT78 2 - 33

SC-53 SOT128B 2 - 55

SC-59 SOT346 2 - 90

SC-61B SOT143R 2 - 58

SC-62 SOT89 2 - 35

SC-63 SOT428 2 - 110

SC-67 SOT186 2 - 66

SC-70 SOT323 2 - 82

SC-73 SOT223 2 - 70

SC-74 SOT457 2 - 127

SC-75 SOT416 2 - 105

SC-76 SOD323 2 - 26

SC-79 SOD523 2 - 27

SC-88 SOT363 2 - 95

SC-88A SOT353 2 - 94

SC-89 SOT490 2 - 134

SC18_1999_.book : SC18_PACKAGE_OUTLINES_1999_1.copy 1 Wed May 12 11:40:55 1999

CHAPTER 2

PACKAGE OUTLINES


May 1999 2-2


Package outlines Chapter 2

REFERENCESOUTLINEVERSION

EUROPEANPROJECTION ISSUE DATE

IEC JEDEC EIAJ

Note

1. The marking band indicates the cathode.

SOD27 DO-35A24 SC-40 97-06-09

Hermetically sealed glass package; axial leaded; 2 leads SOD27

UNIT bmax.

mm 0.56

Dmax.

G1max.

25.44.251.85

Lmin.

DIMENSIONS (mm are the original dimensions)

G1LD L

b

(1)

0 1 2 mm

scale



IEC JEDEC EIAJ

Note


SOD57 97-10-14


UNIT bmax.

mm 0.81

Dmax.

Gmax.

284.573.81

Lmin.


GLD L

b

0 2.5 5 mm

scale

k a(1)


May 1999 2-3





IEC JEDEC EIAJ

SOD59 97-06-112-lead TO-220

D

D1

q

P

L

1 2

L2(1)

b1

e

Q

b

0 5 10 mm

scale

Plastic single-ended package; heatsink mounted; 1 mounting hole; 2-lead TO-220 SOD59

UNIT A1 b1 D1 e P

mm 5.08

q Q


A b Dc L2(1)

3.0 3.83.6

15.013.5

3.302.79

3.02.7

2.62.2

0.70.4

15.815.2

0.90.7

1.31.0

4.54.1

1.391.27

6.45.9

10.39.7

L1E L

AE

A1

c

L1

Note

1. Terminals in this zone are not tinned.


May 1999 2-4





IEC JEDEC EIAJ

Note


SOD61A 97-06-09

Hermetically sealed glass package; axial leaded; 2 leads SOD61A

UNIT b

mm 0.6

Dmax.

Gmax.

32.54.92.5

Lmin.

3

L1max.


GL

L1

L

b(1)

0 2.5 5 mm

scale

k a

D


May 1999 2-5





IEC JEDEC EIAJ

Note

1. The marking bands indicate the cathode.

SOD61AB to AK 97-06-20

Hermetically sealed glass package; axial leaded; 2 leads SOD61AB to AK

GL

L1

L2

L

b(1)k a

D

OUTLINEVERSION

UNIT bD

max.G

max.L

min.L1

max.

SOD61AB mm 0.6 31.85.52.5 3 5

L2max.


SOD61AC mm 0.6 30.48.32.5 3 5

SOD61AD mm 0.6 30.28.72.5 3 5

SOD61AE mm 0.6 30.09.12.5 3 5

SOD61AF mm 0.6 29.89.52.5 3 5

SOD61AG mm 0.6 29.69.92.5 3 5

SOD61AH mm 0.6 29.310.52.5 3 5

SOD61AI mm 0.6 28.811.52.5 3 5

SOD61AJ mm 0.6 28.312.52.5 3 5

SOD61AK mm 0.6 27.813.52.5 3 n.a


May 1999 2-6





IEC JEDEC EIAJ

SOD61AB2 98-12-04

Hermetically sealed glass package; axial leaded; 2 leads SOD61AB2

UNIT b

mm 0.6

Dmax.

Gmax.

31.85.52.5

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


(1)k a



IEC JEDEC EIAJ

SOD61AC2 98-12-04

Hermetically sealed glass package; axial leaded; 2 leads SOD61AC2

UNIT b

mm 0.6

Dmax.

Gmax.

30.48.32.5

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


(1)k a


May 1999 2-7





IEC JEDEC EIAJ

SOD61AD2 97-12-04

Hermetically sealed glass package; axial leaded; 2 leads SOD61AD2

UNIT b

mm 0.6

Dmax.

Gmax.

30.28.72.5

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


(1)k a



IEC JEDEC EIAJ

Note


SOD61H2 97-06-09

Miniature hermetically sealed glass package; axial leaded; 2 leads SOD61H2

UNIT b

mm 0.6

Dmax.

Gmax.

32.532.2

Lmin.

3

L1max.


GLD

L1

L

b(1)

0 2.5 5 mm

scale

k a


May 1999 2-8





IEC JEDEC EIAJ

Note


SOD64 97-10-14


UNIT bmax.

mm 1.35

Dmax.

Gmax.

285.04.5

Lmin.


GLD L

b

(1)

0 2.5 5 mm

scale

k a



IEC JEDEC EIAJ

Note


SOD66 DO-41 97-06-20


UNIT bmax.

mm 0.81

Dmax.

G1max.

284.82.6

Lmin.


G1LD L

b

(1)

0 2 4 mm

scale

k a


May 1999 2-9





IEC JEDEC EIAJ

Note


SOD68 DO-34 97-06-09


UNIT bmax.

mm 0.55

Dmax.

G1max.

25.43.041.6

Lmin.


G1LD L

b

(1)

0 2 4 mm

scale


May 1999 2-10



UNIT A



IEC JEDEC EIAJ

mm5.25.0

b

0.480.40

c

0.450.40

D

4.84.4

d

1.71.4

E

4.23.6

L

14.512.7

0.70.5

e

2.54

L2L1

(1)

max.

2.5

b1

0.660.56


Note

1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.

SOD70 98-05-25

A L

0 2.5 5 mm

scale

b

c

D

b1

L1

L2

d

E

Plastic near cylindrical single-ended package; 2 in-line leads SOD70

1

2

e


May 1999 2-11





IEC JEDEC EIAJ

Note


SOD80C 100H01 97-06-20

Hermetically sealed glass surface mounted package; 2 connectors SOD80C

UNIT D

mm 1.601.45

3.73.3

0.3

H L


H

D

L L

(1)

0 1 2 mm

scale

k a



IEC JEDEC EIAJ

Notes



SOD81 97-06-20

Hermetically sealed glass package;ImplotecTM(1) technology; axial leaded; 2 leads SOD81

UNIT bmax.

mm 0.81

Dmax.

G1max.

5 28

G

3.82.15

Gmax.

Lmin.


G1

LD L

b

(2)

0 1 2 mm

scale

k a


May 1999 2-12



REFERENCESOUTLINE

VERSIONEUROPEAN

PROJECTION ISSUE DATE IEC JEDEC EIAJ

SOD83A 97-06-11


UNIT bmax.

mm 1.35

Dmax.

Gmax.

30.77.54.5

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


(1)

REFERENCESOUTLINE

VERSIONEUROPEAN


SOD83B 97-06-27

Hermetically sealed glass package; axial leaded; 2 leads SOD83B

UNIT bmax.

mm 1.35

Dmax.

Gmax.

29114.5

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


(1)


May 1999 2-13





IEC JEDEC EIAJ

SOD87 100H03 99-03-31

Hermetically sealed glass surface mounted package;ImplotecTM(1) technology; 2 connectors SOD87

UNIT D

mm 2.12.0

2.01.8

3.73.3 0.3

D1 H L

DIMENSIONS (mm are the original dimensions)H

DD1

L L

(2)

0 1 2 mm

scale

Notes


2. The marking indicates the cathode.

k a



IEC JEDEC EIAJ

SOD88A 97-06-20


UNIT bmax.

mm 0.81

Dmax.

Gmax.

30.583.8

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


(1)k a


May 1999 2-14





IEC JEDEC EIAJ

SOD88B 97-06-20


UNIT bmax.

mm 0.81

Dmax.

Gmax.

29113.8

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


(1)k a



IEC JEDEC EIAJ

SOD89A 97-06-20


UNIT bmax.

mm 1.35

Dmax.

Gmax.

317

L1max.

35.5

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


L1(1)k a


May 1999 2-15





IEC JEDEC EIAJ

SOD89B 97-06-20


UNIT bmax.

mm 1.35

Dmax.

Gmax.

29.510

L1max.

35.5

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


L1(1)k a



IEC JEDEC EIAJ

Note



SOD91 97-06-09

Hermetically sealed glass package; ImplotecTM(1) technology; axial leaded; 2 leads SOD91

UNIT bmax.

mm 0.55

Dmax.

G1max.

3.5 29

G

3.01.7

Gmax.

Lmin.


G1

LD L

b

(2)

0 1 2 mm

scale


May 1999 2-16





IEC JEDEC EIAJ

SOD95 97-06-11low-profile

2-lead TO-220

D

D1

L

1 2

L2L1

b1

e

Q

b

0 5 10 mm

scale

Plastic single-ended package; 2-lead low-profile TO-220 SOD95

UNIT A1 b1 D1 e Q

mm 5.08

L1

2.62.2

3.302.79

15.013.5

10.39.7

1.51.1

11.010.0

0.70.4

1.31.0

0.90.7

1.391.27

4.54.1


A b Dc

3.0

L2(1)

maxE L

A

E A1

c

Note



May 1999 2-17





IEC JEDEC EIAJ

SOD100 97-06-112-lead TO-220F

0 5 10 mm

scale

Plastic single-ended package; isolated heatsink mounted;1 mounting hole; 2-lead TO-220F exposed tabs SOD100

A

A1

Q

c

Note

1. Terminal dimensions within this zone are uncontrolled. Terminals in this zone are not tinned.

D

D1

L

L1

m

q

e

b w M

1 2

E1

E

P

b1

UNIT Db1 D1 e qQPLcA

mm 4.44.0

A1

2.92.5

b

0.90.7

1.51.3

0.550.38

17.016.4

7.97.5

E

10.29.6

5.75.3

E1

5.0814.313.5 0.4

L1(1)

4.84.0

1.41.2

4.44.0

w

3.23.0

m

0.90.5



May 1999 2-18





IEC JEDEC EIAJ

SOD106 97-06-09DO-214AC

0 2.5 5 mm

scale

Transfer-moulded thermo-setting plastic small rectangular surface mounted package;2 connectors SOD106

UNIT bA1 c D E Q

mm 1.61.4

0.20.05 2.82.4

4.54.3

H

5.55.1

3.32.7


A

2.32.0

D

H

A

E b (1)

A1

Q

c

Note



May 1999 2-19



REFERENCESOUTLINE

VERSIONEUROPEAN


SOD107A 98-08-04

Hermetically sealed plastic package; axial leaded; 2 leads SOD107A


GLD L

b

0 2.5 5 mm

scaleUNIT b

mm 0.6

D G

308.57.5

3.12.9

Lmin.

Note


(1)

k a

REFERENCESOUTLINE

VERSIONEUROPEAN


SOD107B 98-08-05

Hermetically sealed plastic package; axial leaded; 2 leads SOD107B


GLD L

b

0 2.5 5 mm

scaleUNIT b

mm 0.6

D G

2910.59.5

3.12.9

Lmin.

Note


(1)

k a


May 1999 2-20



UNIT Amax.



IEC JEDEC EIAJ

mm 1.6

D

2.101.90

y

0.1

E

1.401.10


SOD110 97-04-14

Very small ceramic rectangular surface mounted package SOD110

cathodeidentifier

A

21

D

y

E

0 0.5 1 mm

scale


May 1999 2-21





IEC JEDEC EIAJ

SOD113 2-lead TO-220

0 10 20 mm

scale

Plastic single-ended package; isolated heatsink mounted;1 mounting hole; 2-lead TO-220 'full pack' SOD113

w M

1 2

b

EP

e

A

A1

b1 c

Q

k

j

q

D

T

HE

L

L1(1)

m

z

Notes

1. Terminals are uncontrolled within zone L1.

2. z is depth of T.

UNIT A1 Db E e wTqQPmLj k z(2)b1 c L1(1)HE

max.


A

mm 0.80.44.64.0

2.92.5

1.10.9

0.90.7

0.70.4

15.815.2

10.39.7 5.08 19.0

14.413.5

3.32.8

6.56.3

2.62.3

2.6 2.552.72.3

0.60.4

3.23.0

97-06-11


May 1999 2-22





IEC JEDEC EIAJ

SOD117

D

m

L

b1

L1

0 5 10 mm

scale

Plastic single-ended through-hole package; mountable to heatsink; 1 mounting hole;3 in-line leads (one lead cropped) SOD117

α

27°23°

A

A1

Q

c

k

Note

1. Tinning of terminals are uncontrolled within zone L1.

e e

b ∅ w M

1

2

3

P

q

q1

D2

D1

E

α

UNIT D1 e qQPLcA

mm 5.84.8

A1

3.32.7

k

2.21.8

b

1.20.9

b1

2.21.8

b2

4.74.2

0.90.6

22.521.5

D2

10.29.9

D

2726

E

1615 5.45

19.118.1 0.4

L1(1)

5.44.8

L2

3.01.0

3.43.2

m

0.80.6

4.74.3

q1

25.725.1

w

3.43.1


L2

b2

98-11-06


May 1999 2-23



REFERENCESOUTLINE

VERSIONEUROPEAN


SOD118A 98-05-28

Hermetically sealed plastic package; axial leaded; 2 leads SOD118A

UNIT b

mm 0.5

D G

316.76.3

2.62.4

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


(1)

k a



IEC JEDEC EIAJ

SOD118B 98-05-28

Hermetically sealed plastic package; axial leaded; 2 leads SOD118B


GLD L

b

0 2.5 5 mm

scaleUNIT b

mm 0.5

D G

2910.59.5

2.62.4

Lmin.

Note


(1)

k a


May 1999 2-24





IEC JEDEC EIAJ

SOD119AB 98-12-04

Hermetically sealed glass package; axial leaded; 2 leads SOD119AB

UNIT b

mm 0.8

Dmax.

Gmax.

31.85.52.5

Lmin.


GLD L

b

0 2.5 5 mm

scale

Note


(1)k a



IEC JEDEC EIAJ

Note


SOD120 98-05-25


UNIT b

mm 0.6

Dmax.

G1max.

283.02.15

Lmin.


G1LD L

b

(1)

0 2 4 mm

scale


May 1999 2-25





IEC JEDEC EIAJ

SOD121AB to AJ 99-01-28

Hermetically sealed glass package; axial leaded; 2 leads SOD121AB to AJ

OUTLINEVERSION b

Dmax.

Gmax.

Lmin.

SOD121AB 0.5 31.85.52.0


SOD121AC 0.5 30.48.32.0

SOD121AD 0.5 30.28.72.0

SOD121AE 0.5 30.09.12.0

SOD121AF 0.5 29.89.52.0

SOD121AG 0.5 29.69.92.0

SOD121AH 0.5 29.310.52.0

SOD121AI 0.5 28.811.52.0

SOD121AJ 0.5 28.312.52.0

L1max.

L2max.

53

53

53

53

53

53

53

53

53

Note


GLD L

b

L1

L2(1)k a


May 1999 2-26





IEC JEDEC EIAJ

SOD323 98-09-14

0 1 2 mm

scale

SOD323

UNIT bp c D E Q v

mm 0.400.25

+ 0.05− 0.05

0.250.10

0.21.351.15

1.81.6

A

1.10.8

HE

2.72.3

0.250.15

Lp

0.450.15


D

1 2

HE

Lp

A

E bp

A1

Q

Note

1. The marking bar indicates the cathode.

A1max.

Plastic surface mounted package; 2 leads

v M A

A

c

(1)


May 1999 2-27





IEC JEDEC EIAJ

SOD523 SC-79 98-11-25

Plastic surface mounted package; 2 leads SOD523

0 0.5 1 mm

scale

D

1 2

HE

E bp

A

c

v M A

A

UNIT bp c D E v

mm 0.350.25

0.20.1

0.150.90.7

1.31.1

A

0.70.5

HE

1.71.5


Note

1. The marking bar indicates the cathode.

(1)


May 1999 2-28



UNITA1

max.bp c D E e1 HE Lp Q wv



97-02-28

IEC JEDEC EIAJ

mm 0.1 0.480.38

0.150.09

3.02.8

1.41.2

0.95

e

1.9 2.52.1

0.550.45 0.10.2


0.450.15

SOT23

bp

D

e1

e

A

A1

Lp

Q

detail X

HE

E

w M

v M A

B

AB

0 1 2 mm

scale

A

1.10.9

c

X

1 2

3

Plastic surface mounted package; 3 leads SOT23


May 1999 2-29



UNIT bp c D E e1 L Q w



IEC JEDEC EIAJ

mm 0.880.65

2.72.3

0.600.45

11.110.5

7.87.2

2.29

e

4.58 0.254

P

3.23.0

P1

3.93.6


Note


16.515.3

1.50.9

L1(1)

max

2.54

SOT32 TO-126 97-03-04

0 2.5 5 mm

scale

A

Plastic single-ended leaded (through hole) package; mountable to heatsink, 1 mounting hole; 3 leads SOT32

D

P1

P

E

e1

A

L

Q

cbp

1 2 3

L1

w M

e


May 1999 2-30



UNIT A



IEC JEDEC EIAJ

mm5.25.0

b

0.480.40

c

0.450.40

D

4.84.4

d

1.71.4

E

4.23.6

L

14.512.7

e

2.54

e1

1.27

L1(1)

2.5

b1

0.660.56


Note


SOT54 TO-92 SC-43 97-02-28

A L

0 2.5 5 mm

scale

b

c

D

b1 L1

d

E

Plastic single-ended leaded (through hole) package; 3 leads SOT54

e1e

1

2

3


May 1999 2-31



UNIT A



IEC JEDEC EIAJ

mm5.25.0

b

0.480.40

c

0.450.40

D

4.84.4

d

1.71.4

E

4.23.6

L

14.512.7

e

2.54

e1

1.27

L1(1)

maxL2

max

2.5 2.5

b1

0.660.56


Notes


SOT54 variant TO-92 variant SC-43

A L

0 2.5 5 mm

scale

b

c

D

b1 L1

d

E

Plastic single-ended leaded (through hole) package; 3 leads (on-circle) SOT54 variant

1

2

3

L2

e1e

98-03-26


May 1999 2-32



UNIT A



IEC JEDEC EIAJ

mm5.25.0

b

0.480.40

c

0.450.40

D

4.84.4

d

1.71.4

E

4.23.6

L

14.512.7

e

5.08

e1

2.54

L1(1)

2.5

b1

0.660.56


Note


SOT54A TO-92 SC-43 97-05-13

A L

0 2.5 5 mm

scale

b

c

D

b1

L1

d

E

Plastic single-ended leaded (through hole) package; 3 leads (wide pitch) SOT54A

e1

e

1

2

3


May 1999 2-33





IEC JEDEC EIAJ

SOT78 TO-220AB

D

D1

q

P

L

1 2 3

L2(1)

b1

e e

b

0 5 10 mm

scale

Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78


AE

A1

c

Note


Q

L1

UNIT A1 b1 D1 e P

mm 2.54

q QA b Dc L2(1)

max.

3.0 3.83.6

15.013.5

3.302.79

3.02.7

2.62.2

0.70.4

15.815.2

0.90.7

1.31.0

4.54.1

1.391.27

6.45.9

10.39.7

L1E L

97-06-11


May 1999 2-34





IEC JEDEC EIAJ

Note

1. Terminal dimensions within this zone are uncontrolled to allow for body and terminal irregularities.

SOT82 97-06-11

0 2.5 5 mm

scale

Plastic single-ended package; 3 leads (in-line) SOT82

D

L1

q

E A

P

L

Q

321

c

e1

e

b

UNIT Db E e wqQPLc L1(1)

max.e1

0.254


A

4.58mm 2.82.3

0.880.65

0.580.47

11.110.5

7.87.2 2.29

16.515.3

2.541.50.9

3.93.5

3.12.5

w M


May 1999 2-35





IEC JEDEC EIAJ


SOT89 97-02-28

w M

e1

e

EHE

B

0 2 4 mm

scale

b3

b2

b1

c

D

L

A

Plastic surface mounted package; collector pad for good heat transfer; 3 leads SOT89

1 2 3

UNIT A

mm1.61.4

0.480.35

c

0.440.37

D

4.64.4

E

2.62.4

HE

4.253.75

e

3.0

w

0.13

e1

1.5

Lmin.

0.8

b2b1

0.530.40

b3

1.81.4


May 1999 2-36



UNITA

max. A1 A2 A3 bp c D(1) E(2) (1)e HE L Lp Q Zywv θ



IEC JEDEC EIAJ

mm

inches

1.750.250.10

1.451.25 0.25

0.490.36

0.250.19

5.04.8

4.03.8

1.276.25.8 1.05

0.70.6

0.70.3 8

0

o

o

0.25 0.10.25

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.


1.00.4

SOT96-1

X

w M

θ

AA1

A2

bp

D

HE

Lp

Q

detail X

E

Z

e

c

L

v M A

(A )3

A

4

5

pin 1 index

1

8

y

076E03S MS-012AA

0.0690.0100.004

0.0570.049 0.01

0.0190.014

0.01000.0075

0.200.19

0.160.15

0.0500.2440.228

0.0280.024

0.0280.0120.010.010.041 0.004

0.0390.016

0 2.5 5 mm

scale

SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1

95-02-0497-05-22


May 1999 2-37



UNIT c



IEC JEDEC EIAJ

mm 0.160.07

0.560.45

1.070.96

1.310.81

2.602.40

2.642.34

2.642.34

9.989.83

inches 0.0060.003

0.0230.017

0.0430.037

0.0520.032

0.1020.094

0.1040.092

0.1040.092

0.3930.387

DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

SOT100A 99-03-29

0 2.5 5 mm

scale

HED1Db1bA

Surface mounted ceramic hermetic package; 4 leads SOT100A

D

D1

cA

b1

b

E

H

H

1

2

3

4


May 1999 2-38



UNITA2

max.c e e1 q

Qmax. q1

U1max.

U2 W



IEC JEDEC EIAJ

mm 20.8 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 12.7 8.84.153.85

2.4 38.1 25.4

q2

10.2 4.2 44.75 8 0.25 0.1 3.8

b F ∅ P

6-32UNC

ywS


SOT115D

0 5 10 mm

scale

Amax.

Dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange; 2 vertical mounting holes;2 x 6-32 UNC and 2 extra horizontal mounting holes; 9 gold-plated in-line leads SOT115D

D

U1 q

q1

b

F

S

A

ZE

A2

L

c

d

QU2

Mw

7 8 92 3

W e

e1

5 64

P

y M B

y M B

1

B

dmax.

97-04-10

q2 y M B


May 1999 2-39



UNITA2

max.c e e1 q

Qmax. q1

U1max.

U2 W



IEC JEDEC EIAJ

mm 20.8 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 12.7 8.84.153.85

2.4 38.1 25.4

q2

10.2 4.2 44.75 8 0.25 0.1 3.8

b F p

6-32UNC

ywS


SOT115G

0 5 10 mm

scale

Amax.

Dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange; 2 vertical mounting holes;2 x 6-32 UNC and 2 extra horizontal mounting holes; 8 gold-plated in-line leads SOT115G

D

U1 q

q1

b

F

S

A

ZE

A2

L

c

d

QU2

Mw

76 8 92 3 5

W e

e1

p

y M B

y M B

1

B

dmax.

99-04-13

q2 y M B


May 1999 2-40



UNITA2

max.c e e1 q

Qmax. q1 q2

U1max.

U2 W



IEC JEDEC EIAJ

mm 20.8 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 12.7 8.84.153.85

2.4 38.1 25.4 10.2 4.2 44.75 8 0.25 0.1 3.8

b F p

6-32UNC

ywS


SOT115J

0 5 10 mm

scale

Amax.

Dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange; 2 vertical mounting holes;2 x 6-32 UNC and 2 extra horizontal mounting holes; 7 gold-plated in-line leads SOT115J

D

U1 q

q2

q1

b

F

S

A

Z pE

A2

L

c

d

QU2

Mw

7 8 92 3

W e

e1

5

p

1

dmax.

y M B

y M B

B

99-02-06

y M B


May 1999 2-41



UNITA2

max.c e e1 q

Qmax.

U1max.

U2



IEC JEDEC EIAJ

mm 11.5 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 3.2 8.84.153.85

2.4 38.1 44.75 8 0.25 3.8

b F p w

0.1

y


SOT115L

0 5 10 mm

scale

Amax.

Dmax.

dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange; 2 vertical mounting holes;7 gold-plated in-line leads SOT115L

D

U1 q

b

F

A

ZE

A2

L

c

d

QU2

Mw

7 8 92 3

e

e1

5

p

1

99-02-06

y M B

B


May 1999 2-42



UNITA2

max.c e e1 q

Qmax. q1

q2U1

max.U2 W



99-04-28

IEC JEDEC EIAJ

mm 20.8 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 12.7 8.8 627577

4.153.85

2.4 38.1 25.4

10.2 4.2 44.75 8 0.25 0.1

connector

12

b F

2.5

M

1.6

M1

0.9

M2

3

M3 N

12777

N1

10.78.7

N2

51

N3

16.716.1

S1

4.954.55

S2

p

6-32UNC

ywS


SOT115N

0 5 10 mm

scale

Amax.

Dmax.

dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extra horizontal mounting holes;optical input with connector; 7 gold-plated in-line leads SOT115N

D

U1 q

q2

q1

b

F

S

S1

S2

A

Z p

NN1

N2N3

M M1 M2M3

E

A2

L

cd

QU2

Mw

7 8 92 3

W e

e1

5

p

1

y M B

y M By M B

B


May 1999 2-43



UNITA2

max.c e e1 q

Qmax. q1

q2U1

max.U2 W



99-02-06

IEC JEDEC EIAJ

mm 20.8 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 12.7 8.8 917817

4.153.85

2.4 38.1 25.4

10.2 4.2 44.75 8 0.25 0.1

connector

12

b F

2.5

M

1.6

M1

0.9

M2

3

M3 N

15.38.7

N1

10.78.7

N2

51

N3

16.716.1

S1

4.954.55

S2

p

6-32UNC

ywS


SOT115P

0 5 10 mm

scale

Amax.

Dmax.

dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extra horizontal mounting holes;optical input with connector; 7 gold-plated in-line leads SOT115P

D

U1 q

q2

q1

b

F

S

S1

S2

A

Z p

NN1

N2N3

M M1 M2M3

E

A2

L

cd

QU2

Mw

7 8 92 3

W e

e1

5

p

1

y M B

y M By M B

B


May 1999 2-44



UNITA2

max.c e e1 q

Qmax. q1

q2U1

max.U2 W



99-02-06

IEC JEDEC EIAJ

mm 20.8 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 12.7 8.8 917817

4.153.85

2.4 38.1 25.4

10.2 4.2 44.75 8 0.25 0.1

connector

12

b F

2.5

M

1.6

M1

0.9

M2

3

M3 N

15.38.7

N1

10.78.7

N2

51

N3

16.716.1

S1

4.954.55

S2

p

6-32UNC

ywS


SOT115R

0 5 10 mm

scale

Amax.

Dmax.

dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extra horizontal mounting holes;optical input with connector; 7 gold-plated in-line leads SOT115R

D

U1 q

q2

q1

b

F

S

S1

S2

A

Z p

NN1

N2N3

M M1 M2M3

E

A2

L

cd

QU2

Mw

7 8 92 3

W e

e1

5

p

1

y M B

y M By M B

B


May 1999 2-45



UNITA2

max.c e e1 q

Qmax. q1 q2

U1max.

U2 W



IEC JEDEC EIAJ

mm 20.8 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 12.7 8.8 10004.153.85

2.4 38.1 25.4 10.2 4.2

44.75 8 0.25 0.1 12

b F

2.5

M

1.6

M1

0.9

M2N

min.

10.78.7

N1

51

N2

16.716.1optical input

S1

4.954.55

S2

p

6-32UNC

yw

S


SOT115T

0 5 10 mm

scale

Amax.

Dmax.

dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange; 2 vertical mounting holes;2 x 6-32 UNC and 2 extra horizontal mounting holes; optical input; 8 gold-plated in-line leads SOT115T

D

U1 q

q2

q1

b

F

S

S1

S2

A

Z p

NN1

N2

M M1 M2

E

A2

L

c

d

QU2

Mw

7 8 92 3 4

W e

e1

5

p

1

y M B

y M B

y M B

B

99-04-13


May 1999 2-46



UNITA2

max.c e e1 q

Qmax. q1 q2

U1max.

U2 W



IEC JEDEC EIAJ

mm 20.8 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 12.7 8.8 10004.153.85

2.4 38.1 25.4 10.2 4.2

44.75 8 0.25 0.1 12

b F

2.5

M

1.6

M1

0.9

M2N

min.

10.78.7

N1

51

N2

16.716.1optical input

S1

4.954.55

S2

p

6-32UNC

yw

S


SOT115U

0 5 10 mm

scale

Amax.

Dmax.

dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange; 2 vertical mounting holes;2 x 6-32 UNC and 2 extra horizontal mounting holes; optical input; 7 gold-plated in-line leads SOT115U

D

U1 q

q2

q1

b

F

S

S1

S2

A

Z p

NN1

N2

M M1 M2

E

A2

L

c

d

QU2

Mw

7 8 92 3

W e

e1

5

p

1

y M B

y M B

y M B

B

99-04-13


May 1999 2-47



UNITA2

max.c e e1 q

Qmax. q1

q2U1

max.U2 W



99-02-06

IEC JEDEC EIAJ

mm 20.8 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 12.7 8.8 917817

4.153.85

2.4 38.1 25.4

10.2 4.2 44.75 8 0.25 0.1

connector

12

b F

2.5

M

1.6

M1

0.9

M2

3

M3 N

15.38.7

N1

10.78.7

N2

51

N3

16.716.1

S1

4.954.55

S2

p

6-32UNC

ywS


SOT115V

0 5 10 mm

scale

Amax.

Dmax.

dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extra horizontal mounting holes;optical input with connector; 7 gold-plated in-line leads SOT115V

D

U1 q

q2

q1

b

F

S

S1

S2

A

Z p

NN1

N2N3

M M1 M2M3

E

A2

L

cd

QU2

Mw

7 8 92 3 4

W e

e1

5

p

1

y M B

y M By M B

B


May 1999 2-48



UNITA2

max.c e e1 q

Qmax. q1

q2U1

max.U2 W



99-04-13

IEC JEDEC EIAJ

mm 20.8 9.1 0.510.38

0.25 27.2 2.54 13.75 2.54 5.08 12.7 8.8 627577

4.153.85

2.4 38.1 25.4

10.2 4.2 44.75 8 0.25 0.1

connector

12

b F

2.5

M

1.6

M1

0.9

M2

3

M3 N

12777

N1

10.78.7

N2

51

N3

16.716.1

S1

4.954.55

S2

p

6-32UNC

ywS


SOT115W

0 5 10 mm

scale

Amax.

Dmax.

dmax.

Lmin.

Emax.

Zmax.

Rectangular single-ended package; aluminium flange;2 vertical mounting holes; 2 x 6-32 UNC and 2 extra horizontal mounting holes;optical input with connector; 8 gold-plated in-line leads SOT115W

D

U1 q

q2

q1

b

F

S

S1

S2

A

Z p

NN1

N2N3

M M1 M2M3

E

A2

L

cd

QU2

Mw

7 8 92 3

W e

e1

5

p

1

y M B

y M By M B

B

4


May 1999 2-49





IEC JEDEC EIAJ

SOT119A 99-03-29

0 5 10 mm

scale

Flanged ceramic package; 2 mounting holes; 6 leads SOT119A

U2H

A

F

A

b Mw3b1

b2

p

w1 A BM M M

D1 DU3

Q

c

q

U1

C

B

1

2

3

4

5

6

e

M MCw2H1

UNIT A

mm

Db

5.595.33

0.150.10

12.8612.59

6.4821.9721.21

6.486.22

12.3212.07

7.396.32

c e U2

0.2518.42

q w1

0.250.51

w3w2U3H1

18.5518.28

U1

24.8924.64

4.073.81

b2b1

5.345.08

p

3.303.05

Q

4.574.06

F H

12.8312.57

D1

2.542.29

inches0.2200.210

0.0060.004

0.5050.496

0.2550.8650.835

0.2550.245

0.4850.475

0.2910.249

0.0100.725 0.0100.0200.7300.720

0.9800.970

0.1600.150

0.2100.200

0.1300.120

0.1800.160

0.5050.495

0.1000.090



May 1999 2-50





IEC JEDEC EIAJ

8-32UNC

SOT120A 99-03-29

H

b

H

detail X

0 5 10 mm

scale

M W

QA

N

N3

M1

D

c

X

1

4

3

2

Studded ceramic package; 4 leads SOT120A

A

w1 AM MD1

D2

UNIT A W

mm

Db

5.855.58

0.180.10

9.739.47

8.398.12

27.4425.78

3.412.92

3.312.54

5.974.74

c D1 N3

4.344.04

Q

0.38

w1M1

1.661.39

N

12.8311.17

D2

9.669.39

inches 0.2300.220

0.0060.004

0.3830.373

0.3300.320

1.0801.015

0.1340.115

0.1300.100

0.2830.248

0.1710.159

0.0150.0650.055

0.5050.440

0.3800.370

MH



May 1999 2-51





IEC JEDEC EIAJ

SOT121B 99-03-29

0 5 10 mm

scale

Flanged ceramic package; 2 mounting holes; 4 leads SOT121B

1 2

4 3

U3

D1

U2

H

H

b

Q

D

U1

q

A

F

c

p

w1 M M M

M Mw2

B

C

C

A

A B

α

0.25

UNIT A

mm

Db

5.825.56

0.160.10

12.8612.59

12.8312.57

28.4525.52

3.303.05

6.486.22

7.276.17

c D1 U3U2

12.3212.06

0.51

w1 w2

45°

αU1

24.9024.63

Q

4.453.91

q

18.42

F

2.672.41

0.01inches0.2290.219

0.0060.004

0.5060.496

0.5050.495

1.1201.005

0.1300.120

0.2550.245

0.2860.243

0.4850.475

0.020.980.97

0.1750.154

0.7250.1050.095

pH



May 1999 2-52



UNIT A D1 W



IEC JEDEC EIAJ

mm

SOT122A 99-03-29

H

b

H

detail X

Db

5.855.58

0.150.10

5.924.80

c M1M N N3

12.9512.70

w1

0.38

Q

3.352.79

3.682.92

H

27.4325.78

3.182.67

1.661.39

7.507.23

7.246.93

6.486.22

inches

8-32UNC0.230

0.2200.0060.004

0.2330.189

0.5100.500

0.0150.1320.110

0.1450.115

1.0801.015

0.1250.105

0.0650.055

0.2950.285

0.2850.273

0.2550.245

0 5 10 mm

scale

D2

M W

QA

N

N3

M1

D

c

X

1

4

3

2



A

D1

D2

w1 AM M


May 1999 2-53



UNIT A D1



IEC JEDEC EIAJ

mm

SOT122D 99-03-29

H

b

H

Db

5.855.58

4.143.27

0.150.10

7.507.23

7.246.99

c Q

1.571.32

H

27.4325.78

inches 0.2300.220

0.1630.129

0.0060.004

0.2950.285

0.2850.275

0.0620.052

1.0801.015

0 5 10 mm

scale

QA

D1

D

c

1

4

3

2

Studless ceramic package; 4 leads SOT122D



May 1999 2-54





99-03-29

IEC JEDEC EIAJ

SOT123A

0 5 10 mm

scale


1

2

4 3

U3U2

H

Hb

Q

D

D1

U1

q

A

F

c

p

B

C

A

w1 M MA MB

α

UNIT A

mm

Db

5.825.56

0.180.10

9.739.47

9.789.42

20.7119.93

3.333.04

6.486.22

7.476.37

c D1 U2 U3

9.789.39

0.510.25

w2w1

45°

αU1

24.8724.64

Q

4.634.11

q

18.42

F

2.722.31

inches0.2290.219

0.0070.004

0.3830.373

0.3850.371

0.8150.785

0.1310.120

0.2550.245

0.2940.251

0.3850.370

0.0200.0100.9800.970

0.1820.162

0.7250.1070.091

pH


w2 CM M


May 1999 2-55



UNIT bp D E1 L1L2(1)

maxLc c1 E P Q w



IEC JEDEC EIAJ

mm 0.80.6

0.650.5

0.560.46

8.68.4

10.19.9

10.410.0 2.54

13.312.2

e1

5.08

e HE

24.223.8

2.42.0

3.83.6

P1

3.93.7

0.251.71.5


2.5

SOT128B TO-202 97-02-28

A

c1

D

E

L1L2

L

bpc

E1

HE

P

Q

A

P1

4.64.4

Plastic single-ended leaded (through hole) package; with cooling fin, mountable to heatsink,1 mounting hole; 3 leads (in-line) SOT128B

e

e1

1 2 3

0 5 10 mm

scale

w M

Note

1. Plastic flash allowed within this zone


May 1999 2-56



UNITA

max. A1 A2 A3 bp c D (1) E (1) (1)e HE L Lp Q Zywv θ



IEC JEDEC EIAJ

mm

inches

2.65 0.300.10

2.452.25

0.490.36

0.320.23

15.615.2

7.67.4 1.27

10.6510.00

1.11.0

0.90.4 8

0

o

o

0.25 0.1


Note


1.10.4

SOT137-1

X

12

24

w M

θ

AA1

A2

bp

D

HE

Lp

Q

detail X

E

Z

c

L

v M A

13

(A )3

A

y

0.25

075E05 MS-013AD

pin 1 index

0.10 0.0120.004

0.0960.089

0.0190.014

0.0130.009

0.610.60

0.300.29 0.050

1.4

0.0550.4190.394

0.0430.039

0.0350.0160.01

0.25

0.01 0.0040.0430.0160.01

e

1

0 5 10 mm

scale


95-01-2497-05-22


May 1999 2-57



UNIT A



IEC JEDEC EIAJ

mm1.10.9

A1max

0.1

b1

0.880.78

c

0.150.09

D

3.02.8

E

1.41.2

HE ywvQ

2.52.1

0.450.15

0.550.45

e

1.9

e1

1.7

Lp

0.1 0.10.2

bp

0.480.38


SOT143B 97-02-28

0 1 2 mm

scale

Plastic surface mounted package; 4 leads SOT143B

D

HE

E AB

v M A

X

A

A1

Lp

Q

detail X

c

y

w M

e1

e

B

21

34

b1

bp


May 1999 2-58



UNIT A



IEC JEDEC EIAJ

mm1.10.9

A1max

0.1

b1

0.880.78

c

0.150.09

D

3.02.8

E

1.41.2

HE ywvQ

2.52.1

0.550.25

0.450.25

e

1.9

e1

1.7

Lp

0.1 0.10.2

bp

0.480.38


SOT143R 97-03-10

0 1 2 mm

scale

Plastic surface mounted package; reverse pinning; 4 leads SOT143R

D

HE

E AB

v M A

X

A

A1

Lp

Q

detail X

c

y

w M

e1

e

B

12

43

b1

bp


May 1999 2-59





IEC JEDEC EIAJ

SOT160A 99-03-29

0 5 10 mm

scale


U2H

A

F

A

b2

p U3 DD1

Q

c

q

U1

C

B

1

2

3

4

5

6

UNIT A

mm

Db

5.214.95

0.160.10

9.739.47

6.60 24.3923.87

6.486.22

9.789.52

7.326.40

c e U2

0.2518.42

q w1

0.250.51

w3w2U3H1

18.4218.16

U1

24.9024.63

4.704.44

b2b1

5.725.46

p

3.313.04

Q

4.504.14

F H

9.669.39

D1

2.852.23

inches0.2050.195

0.0040.006

0.3830.373

0.260 0.9600.940

0.2550.245

0.3850.375

0.2880.252

0.0100.725 0.0100.0200.7250.715

0.9800.970

0.1850.175

0.2250.215

0.1300.120

0.1770.163

0.3800.370

0.1120.088


b Mw3b1

e

w1 A BM M M

M MCw2H1


May 1999 2-60





IEC JEDEC EIAJ

SOT161A 99-03-29

0 5 10 mm

scale


U2H

D

D1

A

F

A

b

Mw3b1

H1 M MCw2

w1p A BM M M

EE1

Q

c

q

U1

e e1

C

B

8

7

6

5

2

1

4

3

UNIT A

mm

Db

2.041.77

b1

2.932.66

0.180.10

10.2210.00

E

10.2110.00

e

3.50 16.8116.21

10.3410.08

7.276.47

c e1 U2

0.250.25 0.51

w3

18.42

q w2w1F

2.702.08

U1

24.9724.71

H1

12.8312.57

p

3.333.07

Q

4.324.06

3.80

inches0.0800.070

0.1150.105

0.0070.004

0.4020.394

D1

10.219.94

0.4020.391

0.4020.394

E1

10.219.94

0.4020.391

0.138 0.6620.638

0.4070.397

0.2860.255

0.0100.010 0.0200.7250.1060.082

0.9830.973

0.5050.495

0.1310.121

0.1700.160

0.150

H



May 1999 2-61



UNITA

max. A1 A2 A3 bp c D (1) E (1) (1)e HE L Lp Q Zywv θ



IEC JEDEC EIAJ

mm

inches

2.65 0.300.10

2.452.25

0.490.36

0.320.23

13.012.6

7.67.4 1.27

10.6510.00

1.11.0

0.90.4 8

0

o

o

0.25 0.1


Note


1.10.4

SOT163-1

10

20

w Mbp

detail X

Z

e

11

1

D

y

0.25

075E04 MS-013AC

pin 1 index

0.10 0.0120.004

0.0960.089

0.0190.014

0.0130.009

0.510.49

0.300.29 0.050

1.4

0.0550.4190.394

0.0430.039

0.0350.0160.01

0.25

0.01 0.0040.0430.0160.01

0 5 10 mm

scale

X

θ

AA1

A2

HE

Lp

Q

E

c

L

v M A

(A )3

A


95-01-2497-05-22


May 1999 2-62





IEC JEDEC EIAJ

SOT171A 99-03-29

0 5 10 mm

scale


1

2

3

4

5

6

U2 E

E1

H

Q

D

D1

A

F

c

A

b

Mw3

H1 M M

b1

Cw2

e

U1

q

p

C

w1 A BM M M

B

UNIT A

mm

Db

2.131.88

b1

3.182.92

0.160.07

9.259.04

D1

9.279.02

E

5.955.74

3.58 11.3110.54

5.975.72

6.816.07

c E1 U2

0.250.25 0.51

w3

18.42

q w2w1F

3.052.54

U1

24.9024.63

H1

9.279.01

p

3.433.17

Q

4.324.11

e

5.975.72

inches0.0840.074

0.1250.115

0.0060.003

0.3640.356

0.3650.355

0.2340.226

0.140 0.4450.415

0.2350.225

0.2680.239

0.0100.010 0.0200.7250.1200.100

0.9800.970

0.3650.355

0.1350.125

0.1700.162

0.2350.225

H



May 1999 2-63





IEC JEDEC EIAJ

SOT172A1 99-03-29

H

b

b1

H

detail X

0 5 10 mm

scale

M W

QA

N

N3

M1

D

c

X

Studded ceramic package; 4 leads SOT172A1

1

2

3

4

A

w1 AM M

D1

D2

8-32UNC

UNIT A W

mm

Db

3.313.04

b1

0.890.63

0.160.10

5.204.95

5.335.08

26.1724.63

3.052.79

3.692.92

5.314.34

c D1 N3

2.742.34

Q

0.38

w1M1

1.661.39

N

11.8210.89

D2

5.335.08

inches0.1300.120

0.0350.025

0.0060.004

0.2050.195

0.2100.200

1.0300.970

0.1200.110

0.1450.115

0.2090.171

0.1080.092

0.0150.0650.055

0.4650.429

0.2100.200

MH



May 1999 2-64





IEC JEDEC EIAJ

SOT172A2 99-03-29

H

b

b1

H

detail X

0 5 10 mm

scale

M W

QA

N

N3

M1

D

c

X

Studded ceramic package; 4 leads SOT172A2

1

2

3

4

A

w1 AM M

D1

D2

8-32UNC

UNIT A W

mm

Db

1.661.39

b1

0.890.63

0.160.10

5.204.95

5.315.05

23.3722.35

3.052.79

3.433.18

5.514.45

c D1 N3

2.952.43

Q

0.38

w1M1

1.661.39

N

11.5611.05

D2

5.335.08

inches0.0650.055

0.0350.025

0.0060.004

0.2050.195

0.2090.199

0.9200.880

0.1200.110

0.1350.125

0.2170.175

0.1160.096

0.0150.0650.055

0.4550.435

0.2100.200

MH



May 1999 2-65





IEC JEDEC EIAJ

SOT172D 97-06-28

H

b

b1

H

0 5 10 mm

scale

QA

D

D1

c

Studless ceramic package; 4 leads SOT172D

1

2

3

4

UNIT A

mm

Db

3.313.04

b1

0.890.63

0.160.10

5.204.95

5.335.08

1.150.88

3.712.89

c D1 H

26.1724.63

inches0.130.12

0.0350.025

0.0060.004

0.2050.195

0.2100.200

0.0450.035

0.1460.114

1.030.97

Q



May 1999 2-66





IEC JEDEC EIAJ

SOT186 TO-220

0 5 10 mm

scale

Plastic single-ended package; isolated heatsink mounted;1 mounting hole; 3 lead TO-220 exposed tabs SOT186

A

A1

Q

c

Note


D

D1

L

L2

L1

m

q

e1

e

b w M

1 2 3

E1

E

P

b1

UNIT Db1 D1 e qQPLc L2e1A

5.08mm 4.44.0

A1

2.92.5

b

0.90.7

1.51.3

0.550.38

17.016.4

7.97.5

E

10.29.6

5.75.3

E1

2.5414.313.5 10 0.4

L1(1)

4.84.0

1.41.2

4.44.0

w

3.23.0

m

0.90.5


97-06-11


May 1999 2-67





IEC JEDEC EIAJ

SOT186A TO-220

0 5 10 mm

scale

Plastic single-ended package; isolated heatsink mounted; 1 mounting hole; 3 lead TO-220 SOT186A

A

A1

Q

c

K

j

Notes


2. Both recesses are ∅ 2.5 × 0.8 max. depth

D

D1

L

L2 L1

b1

b2

e1

e

b w M

1 2 3

q

E

P

T

UNIT Db1 D1 e qQPLc L2(1)

max.e1A

5.08 3mm 4.64.0

A1

2.92.5

b

0.90.7

1.10.9

b2

1.41.2

0.70.4

15.815.2

6.56.3

E

10.39.7 2.54

14.413.5

T(2)

2.5 0.4

L1

3.302.79

j

2.72.3

K

0.60.4

2.62.3

3.02.6

w

3.23.0


97-06-11


May 1999 2-68





IEC JEDEC EIAJ

SOT195 97-06-02

D

L1

L

1 2 3 4

e1

e

bp

E

0 1 4 mm

scale

Plastic single-ended flat package; 4 in-line leads SOT195

UNIT bp b1 e1

mm 0.480.40

1.81.6

0.70.5

0.450.39

5.25.0 1.25

e

3.75

Q


A D

4.84.4

0.80.7

E

14.512.7

Lc

2

L1(1)

max.

chip

A

Q

b1

c

Notes



May 1999 2-69





IEC JEDEC EIAJ

SOT199 97-06-27

D

m

L

L1

b1

0 5 10 mm

scale

Plastic single-ended package; heatsink mounted; 1 mounting hole; 3 leads (in-line) SOT199

α

45°

A

A1

Q

c

Note


e1

e b w M

1 2 3

P

E1

q

E

α

UNIT D e qQPLc e1A

10.9mm 5.24.8

A1

3.43.0

b

1.21.0

b1

2.11.9

0.60.5

21.520.5

E1

7.86.8

E

15.314.7 5.45

16.515.7 0.4

L1(1)

3.73.3

2.11.9

m

0.80.6

6.25.8

w

3.33.1



May 1999 2-70



UNIT A1 bp c D E e1 HE Lp Q ywv



IEC JEDEC EIAJ

mm 0.100.01

1.81.5

0.800.60

b1

3.12.9

0.320.22

6.76.3

3.73.3

2.3

e

4.6 7.36.7

1.10.7

0.950.85

0.1 0.10.2


SOT223 96-11-1197-02-28

w Mbp

D

b1

e1

e

A

A1

Lp

Q

detail X

HE

E

v M A

AB

B

c

y

0 2 4 mm

scale

A

X

1 32

4

Plastic surface mounted package; collector pad for good heat transfer; 4 leads SOT223


May 1999 2-71





IEC JEDEC EIAJ

SOT226low-profile

TO-220

D

D1

L

1 2 3

L2L1

mountingbase

b1

e e

Q

b

0 5 10 mm

scale

Plastic single-ended package; 3 lead low-profile TO-220 SOT226


A

E A1

c

Note


UNIT A1 b1 D1 e Q

mm 2.54

L1

2.62.2

3.302.79

15.013.5

10.39.7

1.51.1

11.010.0

0.70.4

1.31.0

0.90.7

1.391.27

4.54.1

A b Dc

3.0

L2(1)

maxE L

97-06-11


May 1999 2-72





99-03-29

IEC JEDEC EIAJ

SOT262A1

0 5 10 mm

scale

Flanged double-ended ceramic package; 2 mounting holes; 4 leads SOT262A1

p

A

F

b

e

D

q

U1

D1

H1

U2H

Q

c

5

1 2

43

EE1

C

A w1 A BM M M

B

Mw3

M Mw2 C

UNIT A

mm

Db

5.855.58

0.160.10

22.1721.46

11.0510.2910.03

21.0819.56

9.919.65

5.775.00

c e U2

0.250.25 0.51

w3

27.94

q w2w1F

1.781.52

U1

34.1733.90

H1

17.0216.51

p

3.283.02

Q

2.852.59

E E1D1

10.2710.05

inches0.2300.220

0.0060.004

0.8730.845

21.9821.71

0.8650.855

0.4350.4050.396

0.8300.770

0.3900.380

0.2270.197

0.0100.010 0.0201.1000.0700.060

1.3451.335

0.6700.650

0.1290.119

0.1120.102

0.4040.396

H



May 1999 2-73





99-03-29

IEC JEDEC EIAJ

SOT262A2

0 5 10 mm

scale

Flanged double-ended ceramic package; 2 mounting holes; 4 leads SOT262A2

p

A

F

b

e

D

q

U1

D1

H1

U2H

Q

c

5

1 2

43

EE1

C

A w1 A BM M M

B

Mw3

M Mw2 C

UNIT A

mm

Db

5.855.58

0.160.10

22.1721.46

11.0510.2910.03

21.0819.56

9.919.65

5.394.62

c e U2

0.250.25 0.51

w3

27.94

q w2w1F

1.781.52

U1

34.1733.90

H1

17.0216.51

p

3.283.02

Q

2.472.20

E E1D1

10.2710.05

inches0.2300.220

0.0060.004

0.8730.845

21.9821.71

0.8650.855

0.4350.4050.396

0.8300.770

0.3900.380

0.2120.182

0.0100.010 0.0201.1000.0700.060

1.3451.335

0.6700.650

0.1290.119

0.0970.087

0.4040.396

H



May 1999 2-74





99-03-29

IEC JEDEC EIAJ

SOT262B

0 5 10 mm

scale

Flanged double-ended ceramic package; 2 mounting holes; 4 leads SOT262B

p

A

F

b

e

D

q

U1

D1

H1

U2H

Q

c

5

1 2

43

EE1

C

A w1 A BM M M

B

Mw3

M Mw2 C

UNIT A

mm

Db

8.518.25

0.160.10

22.1721.46

11.0510.2910.03

15.4914.99

9.919.65

5.394.62

c e U2

0.250.25 0.51

w3

27.94

q w2w1F

1.781.52

U1

34.1733.90

H1

19.6919.17

p

3.283.02

Q

2.472.20

E E1D1

10.2710.05

inches0.3350.325

0.0060.004

0.8730.845

21.9821.71

0.8650.855

0.4350.4050.396

0.610.59

0.3900.380

0.2120.182

0.0100.010 0.0201.1000.0700.060

1.3451.335

0.7750.755

0.1290.119

0.0970.087

0.4040.396

H



May 1999 2-75





IEC JEDEC EIAJ

SOT263 5-lead TO-220

D

D1

q

P

L

1 5

L1

mountingbase

L2

L3

m

e

Q

b

0 5 10 mm

scale

Plastic single-ended package; heatsink mounted; 1 moumting hole; 5-lead TO-220 SOT263


AE

A1

c

Notes

1. Terminal dimensions are uncontrolled in this zone.

2. Positional accuracy of the terminals is controlled in this zone.


w M

UNIT A1 D1 e P

mm 1.7

q QA b Dc L2(2)

0.5

L3(3)

max.

3.5 3.83.6

m

0.80.6

15.013.5

2.41.6

3.02.7

2.62.2

w

0.40.70.4

15.815.2

0.90.7

4.54.1

1.391.27

6.45.9

10.39.7

L1(1)

E L

97-06-11


May 1999 2-76





IEC JEDEC EIAJ

SOT263-01 5-lead (option)TO-220

D

D1

q

P

L

1 5

L4

mountingbase

L5

L3

m

e Qb

0 5 10 mm

scale

Plastic single-ended package; heatsink mounted; 1 mounting hole;5-lead TO-220 lead form option SOT263-01

UNIT A1 D1 e L P

mm 1.7

L1 L2 q

3.02.7

4.54.1

1.391.27

0.900.75

0.70.4

15.815.2

6.45.9

10.39.7

9.89.7

5.95.3

5.25.0

2.41.6

0.80.6

3.83.6

Q1Q

2.0 4.5

Q2

8.2

R

0.5

w

0.4


A b Dc

0.53.5

L3(1)

max.L4(2) L5(3)

max.E m

AE

A1

c

Q1

Q2

Notes




L1

L2

R

R

w M

97-06-11


May 1999 2-77





99-03-29

IEC JEDEC EIAJ

SOT268A

0 5 10 mm

scale

Flanged double-ended ceramic package; 2 mounting holes; 4 leads SOT268A

D

U1

H1

1

2

4

3

5

A

U2H EP

b Q

F

c

M

C

A

w3

e

q

B

M MCw2

w1 A BM M M

UNIT A

mm

Db

1.661.39

0.130.07

12.9612.44

6.45 17.0216.00

6.616.35

4.914.19

c E U2

0.250.25 0.51

w3

18.42

q w2w1F

2.041.77

U1

24.9024.63

H1

8.237.72

p

3.433.17

Q

2.672.41

e

6.486.22

inches0.0650.055

0.0050.003

0.5100.490

0.254 0.6700.630

0.2600.250

0.1930.165

0.0100.010 0.0200.7250.0800.070

0.9800.970

0.3240.304

0.1350.125

0.1050.095

0.2550.245

H



May 1999 2-78





99-03-29

IEC JEDEC EIAJ

SOT273A

0 5 10 mm

scale


U2H

D

A

F

A

b Mw3

b1

M MCw2

E

Q

c

H1

E1

q

U1

D1

e

C

B

6

5

4

3

2

1

p w1 A BM M M

UNIT A

mm

Db

2.231.98

b1

3.162.92

0.150.10

10.8710.67

4.35 15.7514.73

10.2910.03

7.266.45

c E U2

0.250.25 0.51

w3

18.42

q w2w1F

3.303.05

U1D1 E1

24.8924.64

H1

10.9210.67

p

3.303.05

Q

4.344.04

e

10.2610.06

inches0.0880.078

0.1250.115

0.0060.004

0.4280.420

0.171 0.6200.580

0.4050.395

0.2860.254

0.0100.010 0.0200.7250.1300.120

0.9800.970

0.4300.420

0.1300.120

0.1710.159

0.4040.396

10.9210.67

10.2910.03

0.4300.420

0.4050.395

H



May 1999 2-79





99-03-29

IEC JEDEC EIAJ

SOT279A

0 5 10 mm

scale

Flanged double-ended ceramic package; 2 mounting holes; 4 leads SOT279A

D

U1

E1

D1

H1

1

2

4

3

5

A

U2H E

b Q

F

c

M

C

A

w3

M MCw2

q

e

B

w1 A Bp M M M

UNIT A

mm

Db

1.651.40

0.150.10

9.259.04

3.05 12.9611.94

5.975.72

6.846.01

c E U2

0.250.25 0.51

w3

18.42

q w2w1F

3.052.54

U1

24.9024.64

H1D1 E1

4.964.19

p

3.483.23

Q

4.344.04

e

5.945.74

inches0.0650.055

0.0060.004

0.3640.356

0.120 0.5100.470

0.2350.225

0.2690.237

0.0100.010 0.0200.7250.1200.100

0.9800.970

0.1950.165

0.1370.127

0.1710.159

0.2340.226

9.279.02

5.975.72

0.3650.355

0.2350.225

H



May 1999 2-80





IEC JEDEC EIAJ

SOT281 low-profile5-lead TO-220

D

D1

L

1 5

L1

mountingbase

L2

L3

m

e

Q

b

0 5 10 mm

scale

Plastic single-ended package; 5-lead low-profile TO-220 SOT281

UNIT A1 D1 e

mm 1.7

Q w

0.4


A b Dc

0.5

L2(2)L1(1)

3.5

L3(3)

max.E L

0.80.6

2.41.6

15.013.5

1.51.1

11.010.0

0.70.4

0.90.7

1.391.27

4.54.1

10.39.7

2.62.2

m

A

E A1

c

Notes




w M

97-06-11


May 1999 2-81





99-03-29

IEC JEDEC EIAJ

SOT289A

0 5 10 mm

scale


D

U1

D1

H1

1

3

2

4

5

A

U2H Ep

b Q

F

c

M

A

w3

M MCw2

q

e

C

B

w1 A BM M M

UNIT A

mm

Db

3.333.07

0.100.05

13.1012.90

4.60 19.8119.05

11.8111.56

4.653.92

c E U2

0.250.51 1.02

w3

21.44

q w2w1F

1.651.40

U1

28.0727.81

H1D1

4.854.34

p

3.433.17

Q

2.312.06

e

11.5311.33

inches0.1310.121

0.0040.002

0.5160.508

11.2511.00

0.4430.433

0.181 0.7800.750

0.4650.455

0.1830.154

0.010.02 0.040.8440.0650.055

1.1051.095

0.1910.171

0.1350.125

0.0910.081

0.4540.446

H



May 1999 2-82



UNITA1

maxbp c D E e1 HE Lp Q wv



IEC JEDEC EIAJ

mm 0.11.10.8

0.40.3

0.250.10

2.21.8

1.351.15

0.65

e

1.3 2.22.0

0.230.13

0.20.2


0.450.15

SOT323 SC-70

w Mbp

D

e1

e

A

B

A1

Lp

Q

detail X

c

HE

E

v M A

AB

y

0 1 2 mm

scale

A

X

1 2

3


97-02-28


May 1999 2-83





IEC JEDEC EIAJ

SOT324B 99-03-29

Flanged ceramic package; 2 mounting holes; 4 leads SOT324B

0.130.08

1.651.40

8.188.08

1.651.40

4.834.32


3.433.18

4.934.19

2.312.01

UNIT Qc D

6.406.30

E F L p q

mm

inches

b

19.0218.77

U2U1D1 E1 H1

6.436.17

0.25 0.514.22

w1 w2

0.25

0.0050.003

0.0650.055

0.3220.318

8.268.00

0.3250.315

0.0650.055

0.190.17

5.594.57

0.2200.180

0.1350.125

0.1940.165

0.0910.079

0.2520.248

6.486.22

0.2550.245

0.7490.739

0.2530.243

0.010 0.0200.560

e

3.05

0.120 0.010

w4A

0 5 10 mm

scale

D

q

U1

5

A

U2 E

p

F

C

A

w1 A BM M M

B

c

Q

D1

E1

H1

1

2 3

4

b

e

Mw4

M MCw2

L

L


May 1999 2-84



UNIT A1 A2 A3 bp c D(1) E (1) e HE L Lp Q Zywv θ



IEC JEDEC EIAJ

mm 0.210.05

1.801.65 0.25

0.380.25

0.200.09

6.46.0

5.45.2 0.65 1.25

7.97.6

1.030.63

0.90.7

1.000.55

80

o

o0.130.2 0.1


Note


SOT338-194-01-1495-02-04

(1)

w Mbp

D

HE

E

Z

e

c

v M A

XA

y

1 8

16 9

θ

AA1

A2

Lp

Q

detail X

L

(A )3

MO-150AC

pin 1 index

0 2.5 5 mm

scale

SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1

Amax.

2.0


May 1999 2-85



UNIT A1 A2 A3 bp c D(1) E(1) e HE L Lp Q (1)Zywv θ



IEC JEDEC EIAJ

mm 0.210.05

1.801.65

0.380.25

0.200.09

7.47.0

5.45.2 0.65

7.97.6

0.90.7

0.90.5

80

o

o0.131.25 0.2 0.1


Note


1.030.63

SOT339-1 MO-150AE93-09-0895-02-04

X

w M

θ

AA1

A2

bp

D

HE

Lp

Q

detail X

E

Z

e

c

L

v M A

(A )3

A

1 10

20 11

y

0.25

pin 1 index

0 2.5 5 mm

scale


Amax.

2.0


May 1999 2-86



UNIT A1 A2 A3 bp c D(1) E(1) (1)e HE L Lp Q Zywv θ



IEC JEDEC EIAJ

mm 0.210.05

1.801.65

0.380.25

0.200.09

8.48.0

5.45.2 0.65 1.25

7.97.6

0.90.7

0.80.4

80

o

o0.13 0.10.2


Note


1.030.63

SOT340-1 MO-150AG93-09-0895-02-04

X

w M

θ

AA1

A2

bp

D

HE

Lp

Q

detail X

E

Z

e

c

L

v M A

(A )3

A

1 12

24 13

0.25

y

pin 1 index

0 2.5 5 mm

scale


Amax.

2.0


May 1999 2-87



UNIT A1 A2 A3 bp c D(1) E(1) (1)e HE L Lp Q Zywv θ



IEC JEDEC EIAJ

mm 0.210.05

1.801.65

0.380.25

0.200.09

10.410.0

5.45.2 0.65 1.25

7.97.6

0.90.7

1.10.7

80

o

o0.13 0.10.2


Note


1.030.63

SOT341-1 MO-150AH93-09-0895-02-04

X

w M

θ

AA1

A2

bp

D

HE

Lp

Q

detail X

E

Z

e

c

L

v M A

(A )3

A

1 14

28 15

0.25

y

pin 1 index

0 2.5 5 mm

scale


Amax.

2.0


May 1999 2-88



UNITA1

maxbp c D Eb1 HE Lp Q wv



IEC JEDEC EIAJ

mm 0.11.10.8

0.40.3

0.250.10

0.70.5

2.21.8

1.351.15

e

2.22.0

1.3

e1

0.2

y

0.10.21.15


0.450.15

0.230.13

SOT343N

D

e1

A

A1

Lp

Q

detail X

c

HE

E

v M A

AB

0 1 2 mm

scale

A

X

1 2

34

Plastic surface mounted package; 4 leads SOT343N

e

w M B

97-05-21

bp

y

b1


May 1999 2-89





IEC JEDEC EIAJ

SOT343R

D

A

A1

Lp

Q

detail X

c

HE

E

v M A

AB

0 1 2 mm

scale

X

2 1

43

Plastic surface mounted package; reverse pinning; 4 leads SOT343R

w M B

97-05-21

bp

UNITA1

maxbp c D Eb1 HE Lp Q wv

mm 0.11.10.8

0.40.3

0.250.10

0.70.5

2.21.8

1.351.15

e

2.22.0

1.3

e1

0.2

y

0.10.21.15


0.450.15

0.230.13

e1

A

e

y

b1


May 1999 2-90



UNIT A1 bp c D E e1 HE Lp Q wv



IEC JEDEC EIAJ

mm 0.500.35

0.260.10

3.12.7

1.71.3

0.95

e

1.9 3.02.5

0.330.23 0.20.2


0.60.2

SOT346 TO-236 SC-59

bp

D

e1

e

A

A1

Lp

Q

detail X

HE

E

w M

v M A

B

A

B

0 1 2 mm

scale

A

1.31.0

0.10.013

c

X

1 2

3


98-07-17


May 1999 2-91



UNIT cbA e



97-06-28

IEC JEDEC EIAJ

mm 4.153.85

0.25 2.54 2.00.510.38

6.05.6

36.235.8

18.217.8

25.524.5

3.53.4

34.434.0

22.221.8

6

Q

191.8

qF S U1 v

0.250.3

w

0.1

y

4.1

Zmax.


SOT347

0 5 10 mm

scale

E UD GL

min. P

Ceramic single-ended flat package; heatsink mounted; 2 mounting holes;12 in-line tin (Sn) plated leads SOT347

q

U

e b cZ

L

G

S

D

P

A

Q

w M

1 12

F

E

U1

v A

y

A


May 1999 2-92



UNIT cbA e



99-01-05

IEC JEDEC EIAJ

mm 4.153.85

0.25 2.54 2.00.510.38

6.05.6

36.235.8

18.217.8

25.524.5

3.53.4

34.434.0

22.221.8

9

Q

191.8

qF S U1 v

0.250.3

w

0.1

y

4.1

Zmax.


SOT347B

0 5 10 mm

scale

E UD GL

min. P

Ceramic single-ended flat package; heatsink mounted; 2 mounting holes;12 in-line tin (Sn) plated leads SOT347B

q

U

e b cZ

L

G

S

D

P

A

Q

w M

1 12

F

E

U1

v A

y

A


May 1999 2-93



UNIT cbA e



99-01-05

IEC JEDEC EIAJ

mm 4.153.85

2.051.55

19.218.8

5.95.3

0.25 2.54 2.00.510.38

6.05.6

36.235.8

18.217.8

25.524.5

3.53.4

34.434.0

22.221.8

Q qF S U1 v

0.250.3

w

0.1

y

4.1

Zmax.


SOT347C

0 5 10 mm

scale

E UD G L P

Ceramic single-ended flat package; heatsink mounted; 2 mounting holes;12 in-line tin (Sn) plated leads SOT347C

q

U

e b cZ

L

G

S

D

P

A

Q

w M

1 12

F

E

U1

v A

y

A


May 1999 2-94





IEC JEDEC EIAJ

SOT353

w BMbp

D

e1

e

A

A1

Lp

Q

detail X

HE

E

v M A

AB

y

0 1 2 mm

scale

c

X

1 32

45


UNITA1

maxbp c D E (2) e1 HE Lp Q ywv

mm 0.10.300.20

2.21.8

0.250.10

1.351.15

0.65

e

1.3 2.22.0

0.2 0.10.2


0.450.15

0.250.15

A

1.10.8

97-02-28SC-88A


May 1999 2-95





IEC JEDEC EIAJ

SOT363 SC-88

w BMbp

D

e1

e

pin 1index A

A1

Lp

Q

detail X

HE

E

v M A

AB

y

0 1 2 mm

scale

c

X

1 32

456


UNITA1

maxbp c D E e1 HE Lp Q ywv

mm 0.10.300.20

2.21.8

0.250.10

1.351.15

0.65

e

1.3 2.22.0

0.2 0.10.2


0.450.15

0.250.15

A

1.10.8

97-02-28


May 1999 2-96



UNIT Qbp Zc e U2U1UF p q



99-02-06

IEC JEDEC EIAJ

mm 4.03.8

0.560.46

A

9.59.0

0.30.2

D

30.129.9

E

18.618.4

12.812.6

4.13.9

40.7440.54

2.54

e1

17.78 3.253.15

L

6.56.1

7.757.55

15.415.2

48.048.4

0.3 0.25

v w

0.1

y


SOT365A

0 10 20 mm

scale

Plastic rectangular single-ended flat package; flange mounted; 2 mounting holes; 4 in-line leads SOT365A

p

U2

F

A

U1

U

D

q

E

L

y

Q

cv A

A

w Mbp

Z

2 3 41

e1 ee


May 1999 2-97



UNIT Qbp Zc e U2U1UF p q



99-02-06

IEC JEDEC EIAJ

mm 4.03.8

0.560.46

A

9.59.0

0.30.2

D

30.129.9

E

18.618.4

12.812.6

4.13.9

40.7440.54

2.54

e1

17.78 3.253.15

L

2.82.3

7.757.55

15.415.2

48.048.4

0.3 0.25

v w

0.1

y


SOT365B

0 10 20 mm

scale

Plastic rectangular single-ended flat package; flange mounted; 2 mounting holes; 4 in-line leads SOT365B

p

U2

F

A

U1

U

D

q

E

L

y

Q

cv A

A

w Mbp

Z

2 3 41

e1 ee


May 1999 2-98





IEC JEDEC EIAJ

SOT390A 99-03-29

0 5 10 mm

scale


0.160.10

5.725.46

8.188.08

1.661.39

6.105.33


3.433.17

5.034.22

2.322.00

D

q

U1

1

3

2

A

U2 E

p

b

F

UNIT Qc D

6.406.30

8.268.00

6.436.17

E F L p q

mm

inches

b

19.0318.77

U2U1D1 E1

6.436.17

0.2514.22

w1

0.51

0.0060.004

0.2250.215

0.3220.318

0.0650.055

0.240.21

0.1350.125

0.1980.166

0.0910.079

0.2520.248

0.3250.315

0.2530.243

0.7490.739

0.2530.243

0.0100.560 0.020

w2A

M MC

C

A

w1

w2

A BM M M

B

c

Q

D1

E1

L

L


May 1999 2-99





IEC JEDEC EIAJ

SOT391A 97-05-29

0 5 10 mm

scale


0.160.10

5.855.58

11.5410.51

10.939.90

2.292.03

16.51


3.433.17

5.364.29

1.661.39

D

U1

1

3

2

A

U2 Ep

b

L

L

Q

F

c

UNIT Qc D E F

2.792.29

L p q

mm

b

22.9922.73

U2U1

9.919.65

0.51

w1

1.02

w2A

M C

C

A

w2

q

B

w1 A BM


May 1999 2-100





IEC JEDEC EIAJ

SOT391B 97-05-29

0 5 10 mm

scale

Flangeless ceramic package; 2 leads SOT391B

0.160.10

5.855.58

11.5410.51

10.939.90

1.020.76

DIMENSIONS (millimetre dimensions are derivedfrom the original inch dimensions)

4.093.02

D

1

2

A

E

b

L

L

Q

c

UNIT Qc D E

2.792.29

L

mm

bA


May 1999 2-101





IEC JEDEC EIAJ

SOT399

D

m

L

b1

L1

0 5 10 mm

scale

Plastic single-ended through-hole package; mountable to heatsink; 1 mounting hole; 3 in-line leads SOT399

α

27°23°

A

A1

Q

c

k

Note


e e

b w M

1 2 3

P

q

q1

D2

D1

E

α

UNIT D1 e qQPLcA

mm 5.84.8

A1

3.32.7

k

2.21.8

b

1.20.9

b1

2.21.8

b2

4.74.2

0.90.6

22.521.5

D2

10.29.9

D

2726

E

1615 5.45

19.118.1

L1(1)

5.44.8

q1

25.725.1

3.43.2

m

0.80.6

4.74.3

0.4

w

3.43.1


b2

98-11-06


May 1999 2-102



UNIT A



IEC JEDEC EIAJ

mm

A1 D1D E e Lp HD Qc

2.54 2.602.20

15.414.8

2.92.1

9.658.65

1.61.2

10.39.7

4.54.1

1.401.27

0.850.60

0.640.46

b


SOT404 98-12-14

0 2.5 5 mm

scale

Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads(one lead cropped) SOT404

e e

E

b

D1

HD

D

Q

Lp

c

A1

A

1 3

2

mountingbase


May 1999 2-103





IEC JEDEC EIAJ

SOT409A

0 2.5 5 mm

scale

A

Q1

L

Ceramic surface mounted package; 8 leads SOT409A

UNIT cb D E E2 H H1 L Q1 α

α

w1 w2

mm 0.230.18

0.580.43

4.934.01

5.945.03

D2

5.165.00

4.143.99

e

1.27 4.394.24

7.477.26

0.25 7°0°0.25


1.020.51

0.100.00

A

2.362.06

inches 0.0090.007

0.0230.017

0.1940.158

0.2340.198

0.2030.197

0.1630.157

0.050 0.1730.167

0.2940.286

0.010 7°0°0.0100.040

0.0200.0040.000

0.0930.081

98-01-27

c

H

1 4

8 5

E

A

E2

b

H1

D

D2

e

Bw2

w1

B


May 1999 2-104





IEC JEDEC EIAJ

SOT409B

0 2.5 5 mm

scale

A

Q1

L

Ceramic surface mounted package; 8 leads SOT409B

UNIT cb D E E2 H H1 L Q1 α

α

w1 w2

mm 0.150.10

0.580.43

4.934.01

5.945.03

D2

5.165.00

4.143.99

e

1.27 4.394.24

7.477.26

0.25 2°0°0.25


0.840.69

0.100.00

A

2.362.06

inches 0.0060.004

0.0230.017

0.1940.158

0.2340.198

0.2030.197

0.1630.157

0.050 0.1730.167

0.2940.286

0.010 2°0°0.0100.033

0.0270.0040.000

0.0930.081

98-01-27

c

H E

A

E2

b

H1

D

D2

e

Bw2

w1

B

1 4

8 5


May 1999 2-105



UNITA1

maxbp c D E e1 HE Lp Q w



IEC JEDEC EIAJ

mm 0.1 0.300.15

0.250.10

1.81.4

0.90.7 0.5

e

11.751.45 0.2

v

0.2


0.450.15

0.230.13

SOT416 SC-75

w Mbp

D

e1

e

A

A1

Lp

Q

detail X

HE

E AB

B

v M A

0 0.5 1 mm

scale

A

0.950.60

c

X

1 2

3


97-02-28


May 1999 2-106





IEC JEDEC EIAJ

SOT422A 99-03-29

0 5 10 mm

scale

Flanged hermetic ceramic package; 2 mounting holes; 2 leads SOT422A

UNIT Qc D E1E F H p q

mm 0.130.08

b

5.214.95

10.2910.03

9.939.68

8.768.51

D1

10.2910.03

1.581.47

19.1817.65


3.433.18

16.51 22.9922.73

U2U1

9.919.65

0.25

w2w1

0.76

A

5.724.83

3.352.92

inches 0.0050.003

0.2050.195

0.4050.395

0.3910.381

0.3450.335

0.4050.395

0.0620.058

0.7550.695

L

4.523.74

0.1780.147

0.1350.125

0.65 0.9050.895

0.3900.380

0.01 0.030.2250.190

0.1320.115

D

D1

q

U1

A

U2 E1 Ep

b

1

3

2

Q

F

c

M MC

C

A

w2

B

w1 A BM M M

L

L

H


May 1999 2-107





99-03-29

IEC JEDEC EIAJ

SOT423A

SOT423AFlanged hermetic ceramic package; 2 mounting holes; 2 leads

D

D1

q

U1

A

U2 E1 Ep

b

H

1

3

2

Q

F

c

M MC

C

A

w2

B

w1 A BM M M

0 5 10 mm

scale


mm 0.100.05

b

9.539.27

10.2910.03

12.0911.71

8.848.56

D1

12.8312.57

1.581.47

19.8118.29


3.433.18

16.51 22.9922.73

U2U1

9.919.65

0.25

w2w1

0.76

A

5.724.90

3.352.95

inches 0.0040.002

0.3750.365

0.4050.395

0.4760.461

0.3480.337

0.5050.495

0.0620.058

0.780.72

0.1350.125

0.65 0.9050.895

0.3900.380

0.01 0.030.2250.193

0.1320.116


May 1999 2-108





IEC JEDEC EIAJ

SOT426

0 2.5 5 mm

scale

Plastic single-ended surface mounted package (Philips version of D2-PAK); 5 leads(one lead cropped) SOT426

e e ee

E

b

HE

D

L1

c

A1

A

A1 L1b c Dmax.

eAUNIT


E

11mm 4.504.10

1.401.27

0.850.60

0.640.46

2.902.10

HE

15.8014.80

10.309.70

1.70

98-12-14

1

3

2 4 5

mountingbase


May 1999 2-109





IEC JEDEC EIAJ

SOT427 98-12-14

0 2.5 5 mm

scale

Plastic single-ended suface mounted package (Philips version of D2-PAK);7 leads (one lead cropped) SOT427

e e e eee

E

b

HE

D

L1

c

A1

A

A1 L1b c eAUNIT


E

mm 4.504.10

1.401.27

0.70.4

0.640.46

2.902.10

HE

15.8014.80

10.309.70

1.27

Dmax.

11

1

4

7

mountingbase


May 1999 2-110





IEC JEDEC EIAJ

SOT428 98-04-07

0 10 20 mm

scale

Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads(one lead cropped) SOT428

E

b2 D1

w AMb cb1

L1L

1 3

2

D

E1

HE

L2

Note

1. Measured from heatsink back to lead.

e1

e

A A2

A

A1

y

seating plane

mountingbase

A1(1) D

max.b

D1max.

Emax.

HEmax.

wy

max.A2 b2

b1max.

cE1

min.e e1

L1min.

L2LA

max.UNIT


0.2 0.2mm 2.382.22

0.650.45

0.890.71

0.890.71

1.10.9

5.365.26

0.40.2

6.225.98

4.814.45

2.285 4.57 10.49.6

0.5 0.70.5

6.736.47

4.0 2.952.55


May 1999 2-111





IEC JEDEC EIAJ

SOT429 TO-247 98-04-07

0 10 20 mm

scale

Plastic single-ended through-hole package; heatsink mounted; 1 mounting hole; 3-lead TO-247 SOT429

EP

A

A1

β

w Mb

1 2 3

ee

b1

b2

c

Q

q

L

Y

R

D

S

L1(1)

α

UNIT A1 Db E e wSRqQPL Yb2b1 c L1(1)


A βα

mm 17°13°

6°4°

5.34.7

1.91.7

2.21.8

1.20.9

3.22.8

0.90.6

2120

1615

5.45 3.73.3

2.62.4

5.3 7.57.1

0.4 15.715.3

1615

4.03.6

3.53.3

Note



May 1999 2-112





IEC JEDEC EIAJ

SOT430 97-06-23

0 10 20 mm

scale

Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead JUMBO TO-247 SOT430

w Mb

1 2 3

ee

b1

c

R

L1(1)

R1

R2

R2

Note

1. Terminals are uncontrolled within zone L1.

q

L

Y

D

S

A

A1

UNIT A1 Db Emax.

e wSRqQmax.

PLmin.

Yb2

max.

b1max.

cmax. L1


Amax.

mm 5.3 2.3 2.51.00.8

3.5 0.8 26.525.5

20.5 5.45 3.53.1

3.0 6.0 16 0.4 20.519.5

19.5 2.5 4.0

R1

3.0

R2

1.5

Q

E

P

b2


May 1999 2-113





IEC JEDEC EIAJ

SOT437A 99-03-29

0 5 10 mm

scale


0.130.08

1.661.40

6.486.22

1.651.40

17.0216.00


3.433.18

4.984.32

2.292.03

D

D1

U1

1

3

2

A

U2 E

E1

p

b

H

Q

F

c

UNIT Qc D

6.486.22

E F H p q

mm

b

14.2219.0218.77

U2U1

6.486.22

0.25

w1

0.51

0.0050.003

0.0650.055

0.2550.245

0.0650.055

0.670.63

0.1350.125

0.1960.170

0.900.80

0.2550.245

6.486.22

D1

6.486.22

E1

0.2550.245

0.2550.245

inches 0.560 0.7490.739

0.2550.245

0.010 0.020

w2A

M MC

C

A

w1

w2

A BM M M

q

B


May 1999 2-114





99-03-29

IEC JEDEC EIAJ

SOT439A

0 5 10 mm

scale


0.130.05

3.693.42

12.8512.55

1.581.47

17.2715.75


3.433.17

6.055.23

3.332.97

D

D1

U1

1

3

2

A

U2 EE1p

b

H

Q

F

c

UNIT Qc D

10.3110.01

E F H p q

mm

b

16.5122.9422.73

U2U1

9.919.65

0.25

w1

0.79

0.0050.002

0.1450.135

0.5060.494

0.620.58

0.6800.620

0.1350.125

0.2380.206

0.1310.117

0.4060.394

12.8312.57

D1

10.2610.06

E1

0.5050.495

0.4040.396

inches 0.6500.9050.895

0.3900.380

0.010 0.031

w2A

M MC

C

A w1

w2

A BM M M

q

B


May 1999 2-115





99-03-29

IEC JEDEC EIAJ

SOT440A

0 5 10 mm

scale


0.140.09

2.161.90

5.705.50

1.651.39

16.2414.24


3.182.92

4.253.32

3.482.93

D

U1

D1

1

3

2

A

U2 E

p

b

H

Q

F

c

UNIT Qc D

3.903.70

E F H p q

mm

b

1.150.89

b1

14.2220.4520.19

U2U1D1 E1

5.184.98

0.25

w1

0.51

0.0060.004

0.0850.075

0.2240.217

5.695.39

0.2240.212

0.0650.055

0.6390.560

0.1250.115

0.1670.131

0.1370.115

0.1540.146

5.315.01

0.2090.197

inches 0.0450.035

0.6000.8050.795

0.2040.196

0.010 0.020

w2A

M MC

C

A

E1

w2

b1

q

B

w1 A BM M M


May 1999 2-116



UNIT



IEC JEDEC EIAJ

mm

SOT441A 99-03-29

b1

H

D

3.383.08

bA b1 c QH

1.150.89

D1

5.345.08

inches 0.1330.121

2.481.60

0.0980.063

0.810.71

0.0320.028

3.233.13

0.1270.123

0.160.10

0.0060.004

0.0450.035

0.2100.200

1917

0.750.67

0 5 10 mm

scale

QA

D

D1

c

1

4

3

2

Studless ceramic package; 4 leads SOT441A

Hb


Note

1. This device contains bare beryllium oxide, the dust of witch is toxic.


May 1999 2-117



UNIT D1 W



IEC JEDEC EIAJ

mm8-32UNC

SOT442A 99-03-29

detail X

DbA b1 c M1 w1

1.631.42

M NH

3.052.79

N3

3.682.92

Q

2.722.36

D2

0 5 10 mm

scale

5.285.12

3.383.08

5.235.13

inches0.0640.056

0.1200.110

1917

0.750.67

11.9210.70

0.4700.421

0.1450.115

0.1070.093

0.015

0.38

0.2080.202

0.1330.121

0.160.10

0.0060.004

3.233.13

0.1270.123

0.810.71

0.0320.028

4.053.07

0.1590.121

0.2060.202

M W

A

N

N3

D2

M1

X



Note

1. This device contains bare beryllium oxide, the dust of witch is toxic.

Q

D

D1

c

b

H1

4

3

2

H

b1

w1 AM M

A


May 1999 2-118





IEC JEDEC EIAJ

SOT443A 99-03-29

0 5 10 mm

scale


0.150.09

3.202.90

10.009.70

1.601.40

6.255.75


3.403.20

6.324.90

3.662.84

D

D1

q

U1

1

3

2

A

U2 E1 E

p

b Q

F

c

UNIT Qc D

10.219.91

E1D1

8.157.85

E F L p q

mm

b

16.5023.1022.70

U2U1

9.909.70

0.41

w1

0.94

0.0060.004

0.1260.114

0.3940.382

10.219.91

0.4020.390

0.0630.055

0.2460.226

0.1340.126

0.2490.193

0.1440.112

0.4020.390

0.3210.309

inches 0.6500.9090.894

0.3900.382

0.016 0.037

w2A

M MC

C

w1

w2

A BM M MA

B

L

L


May 1999 2-119





99-03-29

IEC JEDEC EIAJ

SOT445A

0 5 10 mm

scale


0.150.09

3.152.95

5.315.01

7.97.7

4.13.9

1.671.37

15.8414.64


3.353.05

4.013.36

3.333.03

D

D2

D1

q

U1

1

3

2

A

U2 E1E2 E

p

b

H

Q

F

c

UNIT Qc D E2

4.253.95

E1

7.657.35

D1

8.157.85

D2 E F H p q

mm

inches

b

20.4720.17

U2U1

5.184.98

0.30

w1

0.5114.22

0.0060.003

0.1250.115

0.2100.197

0.3120.303

0.1620.153

0.0660.054

0.6240.576

0.1320.120

0.1580.132

0.1320.119

0.1680.155

0.3020.289

0.3210.309

0.8060.794

0.2040.196

0.012 0.0200.56

w2A

M MC

C

A w1

w2

A BM M M

B


May 1999 2-120





99-03-29

IEC JEDEC EIAJ

SOT445B

0 5 10 mm

scale

Flanged hermetic ceramic package; 2 mounting holes; 2 leads SOT445B

0.150.09

3.152.95

5.315.01

7.857.74

3.973.86

1.671.37

15.8414.64


3.353.05

5.274.50

3.333.03

D2

D1

q

U1

1

3

2

A

U2 E1E2

p

b

H

Q

F

c

UNIT Qc D E2

4.253.95

E1

7.657.35

D1

8.157.85

D2 E F H p q

mm

inches

b

20.4720.17

U2U1

5.184.98

0.30

w1

0.5114.22

0.0060.003

0.1250.115

0.2100.197

0.3090.305

0.1560.152

0.0660.054

0.6240.576

0.1320.120

0.2080.177

0.1320.119

0.1680.155

0.3020.289

0.3210.309

0.8060.794

0.2040.196

0.012 0.0200.56

w2A

M MC

C

A w1

w2

A BM M M

B

D

E


May 1999 2-121





99-03-29

IEC JEDEC EIAJ

SOT445C

0 5 10 mm

scale

Flanged hermetic ceramic package; 2 mounting holes; 2 leads SOT445C

0.150.09

3.152.95

5.315.01

8.137.87

4.203.93

1.671.37

15.8414.64


3.353.05

5.574.70

3.333.03

D2

D1

q

U1

1

3

2

A

U2 E1E2

p

b

H

Q

F

c

UNIT Qc D E2

4.253.95

E1

7.657.35

D1

8.157.85

D2 E F H p q

mm

inches

b

20.4720.17

U2U1

5.184.98

0.31

w1

0.5114.22

0.0060.003

0.1250.115

0.2100.197

0.320.31

0.1650.155

0.0660.054

0.6240.576

0.1320.120

0.2200.185

0.1320.119

0.1680.155

0.3020.289

0.3210.309

0.8060.794

0.2040.196

0.012 0.0200.56

w2A

M MC

C

A w1

w2

A BM M M

B

D

E


May 1999 2-122





99-03-29

IEC JEDEC EIAJ

SOT448A

0 5 10 mm

scale


0.130.05

3.693.42

15.6815.16

8.087.82

1.631.52

17.0216.00


3.312.79

6.175.31

3.423.00

D

D1

q

U1

1

3

2

A

U2 E1 Ep

b

H

Q

F

c

UNIT Qc D

10.2910.03

E1E F H p q

mm

b

25.5325.27

U2U1

9.919.65

0.2520.32

w1

0.79

0.0050.002

0.1450.135

0.6050.599

15.4215.16

D1

0.6070.597

0.3160.310

0.0640.060

0.670.63

0.0650.055

0.2430.209

0.1340.118

0.4050.395

inches 1.0050.995

0.3900.380

0.0100.800 0.031

w2A

M MC

C

A

w2

B

w1 A BM M M


May 1999 2-123



UNIT c DbA e



97-06-26

IEC JEDEC EIAJ

mm 0.25 2.540.560.46

28.327.9

13.913.5

2.21.8

23.823.4

6.25.8

25.425.0

5.95.5

4.23.8

2.01.6

5.24.8

QF S U

20.420.0

U1 v

0.250.3

w

0.1

y


SOT451A

0 5 10 mm

scale

E G L p

Ceramic single-ended flat package; heatsink mounted; 1 mounting hole;11 in-line gold-metallized leads SOT451A

U

e b c

L

G

S

D

p

A

Q

w M

1 11

F

E

U1

v A

y

A


May 1999 2-124



UNIT bp c QL2L1 v



IEC JEDEC EIAJ

mm 1.71.4

0.80.7

bp1

1.51.4

5.75.5

4.13.9

0.30.24

1.20.9

3.93.5

M1

3.93.7

M2

2.11.9

M3

0.90.75

L

7.557.25

D(1) D1(1)

4.54.3

E(1)

5.75.5

4.64.4

E1(1)

18.217.8

HE

5.65.5

HE1K

max.

1.67

e

0.250.750.65


SOT453A 97-02-2898-03-26

0 2.5 5 mm

scale

A

Plastic single-ended combined package; magnetoresistive sensor element; bipolar IC;magnetized ferrite magnet (3.8 x 2 x 0.8 mm); 2 in-line leads SOT453A

e

E

E1

HE1

L1

D

L

bp1

D1

HE

M1

M3 K

Note


L2

bp c

1 2

v M A B

v M A B

Q

A

M2

B

A


May 1999 2-125



UNIT bp c QL2L1 v



IEC JEDEC EIAJ

mm 1.71.4

0.80.7

bp1

1.51.4

5.75.5

4.13.9

0.30.24

1.20.9

3.93.5

M1

8.157.85

M2

8.157.85

M3

4.74.3

L

7.557.25

D(1) D1(1)

4.54.3

E(1)

5.75.5

4.64.4

E1(1)

18.217.8

HE

5.65.5

HE1K

max.

5.37

e

0.250.750.65


SOT453B97-02-2898-03-26

0 2.5 5 mm

scale

A

Plastic single-ended combined package; magnetoresistive sensor element; bipolar IC;magnetized ferrite magnet (8 x 8 x 4.5 mm); 2 in-line leads SOT453B

e

E

E1

HE1

L1

D

L

bp1

D1

HE

M1

Note


L2

bp c

1 2

v M A B

v M A B

Q

AK

M2

M3

B

A


May 1999 2-126



UNIT bp c QL2L1 v



IEC JEDEC EIAJ

mm 1.71.4

0.80.7

bp1

1.51.4

5.75.5

4.13.9

0.30.24

1.20.9

3.93.5

M1

5.655.35

M2

5.655.35

M3

3.152.85

L

7.557.25

D(1) D1(1)

4.54.3

E(1)

5.75.5

4.64.4

E1(1)

18.217.8

HE

5.65.5

HE1K

max.

3.87

e

0.250.750.65


SOT453C97-02-2898-03-26

0 2.5 5 mm

scale

A

Plastic single-ended combined package; magnetoresistive sensor element; bipolar IC;magnetized ferrite magnet (5.5 x 5.5 x 3 mm); 2 in-line leads SOT453C

e

E

E1

HE1

L1

D

L

bp1

D1

HE

M1

Note


L2

bp c

1 2

v M A B

v M A B

Q

AK

M2

M3

B

A


May 1999 2-127





IEC JEDEC EIAJ

SOT457 SC-74

w BMbp

D

e

pin 1index

A

A1

Lp

Q

detail X

HE

E

v M A

AB

y

0 1 2 mm

scale

c

X

1 32

456


UNIT A1 bp c D E HE Lp Q ywv

mm 0.10.013

0.400.25

3.12.7

0.260.10

1.71.3

e

0.95 3.02.5

0.2 0.10.2


0.60.2

0.330.23

A

1.10.9

97-02-28


May 1999 2-128





IEC JEDEC EIAJ

SOT460A 99-03-29

0 5 10 mm

scale


0.160.07

9.789.52

12.4511.68

6.946.22

1.661.39

6.105.33


3.283.02

5.394.49

2.371.95

D

q

U1

D1

E1

1

3

2

A

U2

L

E

p

b

L

Q

F

c

UNIT Qc D E F L p q

mm

b

22.9922.73

U2U1D1 E1

6.436.17

0.2517.98

w1

0.51

0.0060.003

0.3850.375

0.4700.460

12.4511.68

0.4700.460

0.2510.245

6.436.17

0.2530.243

0.0650.055

0.240.21

0.1290.119

0.1980.166

0.0930.077

inches 0.9050.895

0.2530.243

0.0100.708 0.020

w2A

M MC

C

Aw1

w2

A BM M M

B


May 1999 2-129



Package underdevelopment

Philips Semiconductors reserves theright to make changes without notice.



IEC JEDEC EIAJ

SOT467A 99-03-31

0 5 10 mm

scale

Flanged LDMOST package; 2 mounting holes; 2 leads

0.150.10

5.595.33

9.259.04

1.651.40

18.2917.27


3.433.18

4.673.94

2.211.96

D

D1

U1

1

3

2

A

U2

L

E

E1

p

b

H

Q

F

c

UNIT Qc D

9.279.02

D1

5.925.77

E

5.975.72

E1 F H L p q

mm

0.1840.155

inch

b

14.27 20.4520.19

U2U1

5.975.72

0.25

w1

0.51

0.0060.004

0.2200.210

0.3640.356

0.0650.055

0.720.68

0.2450.225

6.225.71

0.1350.125

0.0870.077

0.3650.355

0.2330.227

0.2350.225

0.562 0.8050.795

0.2350.225

0.010 0.020

w2A

M MC

C

A w1

w2

A BM M M

q

B

SOT467A


May 1999 2-130





IEC JEDEC EIAJ

SOT468A 97-12-24

0 5 10 mm

scale

Flanged ceramic (AIN) package; 2 mounting holes; 2 leads SOT468A

D

D1

U1

1

3

2

A

U2H EE1p

b Q

F

c

M C

C

A

w2

q

B

w1 A BM


mm 0.150.10

b

11.8111.58

10.2910.03

D1

15.3715,11

1.651.60

16.7416.48


3.303.05

20.32 25.5325.27

U2U1

9.919.65

0.254

w2w1

0.508

A

5.234.62

2.212.06

inches 0.0060.004

0.4650.455

0.4050.395

10.2610.06

0.4040.396

0.6050.595

15.3915,09

0.6060.594

0.0650.063

0.6590.649

0.1300.120

0.800 1.0050.995

0.3900.380

0.01 0.020.2060.182

0.0870.081


May 1999 2-131







IEC JEDEC EIAJ

SOT473A 99-03-31

0 5 10 mm

scale


p

A

F

b

D

U2H

Q

c

1

3

2

D1

E

A

w1 A BM M M

C

q

U1

C

B

E1

M Mw2

UNIT A

mm

Db

3.683.43

0.130.05

12.8512.55

10.2910.03

17.2715.75

9.919.65

6.255.18

c U2

0.25 0.5116.51

q w2w1F

1.571.47

U1

22.9922.73

p

3.433.18

Q

3.332.97

E E1

10.3110.01

inches0.1450.135

0.0050.002

0.5060.494

D1

12.8312.57

0.5050.495

0.4050.395

0.6800.620

0.3900.380

0.2460.204

0.010 0.0200.6500.0620.058

0.9050.895

0.1350.125

0.1310.117

0.4060.396

H



May 1999 2-132



UNIT bp c QL2L1 v



IEC JEDEC EIAJ

mm 1.71.4

0.80.7

bp1

1.571.47

5.75.5

4.13.9

0.30.24

1.20.9

3.93.5

M1

8.157.85

M2

8.157.85

M3

4.74.3

L

7.557.25

D(1) D1(1)

4.54.3

E(1)

5.75.5

4.64.4

E1(1)

18.217.8

HE

5.65.5

HE1K

max.

5.37

e

2.352.15

e1

0.250.750.65


SOT477B 99-02-16

0 2.5 5 mm

scale

A

Plastic single-ended combined package; magnetoresistive sensor element; bipolar IC;magnetized ferrite magnet (8 x 8 x 4.5 mm); 3 in-line leads SOT477B

e

1 2 3

e1

E

E1

HE1

L1

D

L

bp1

D1

HE

M1

Note


L2

bp c

v M A B

Q

v M A B

AK

M2

M3

B

A


May 1999 2-133



Leadless surface mounted package; plastic cap; 4 terminations SOT482B



99-02-05

IEC JEDEC EIAJ

SOT482B

0 5 10 mm

scale

UNIT b1 b2 b3b c D D1 d E E1 e e1 L L1 L2

mm 2.001.59

1.91.7

1.41.2

0.60.4

0.700.57

13.713.3

13.3513.05

8.27.8

7.857.55

2.62.4

4.64.4

1.150.85

3.853.55

0.80.6

2.0 2.652.35


A

A

b3

b3b2

d

L

L2

L1

c

E1

b2b1b(4×)

D

1 2 3

5

4

D1

E

ee e1

pin 1 index


May 1999 2-134



UNIT bp c D E e1 HE Lp wv



98-10-23

IEC JEDEC EIAJ

mm 0.330.23

0.20.1

1.71.5

0.950.75

0.5

e

1.0 1.71.5 0.10.1


0.50.3

SOT490 SC-89

bp

D

e1

e

A

Lp

detail X

HE

E

w M

v M A

B

AB

0 1 2 mm

scale

A

0.80.6

c

X

1 2

3



May 1999 2-135







IEC JEDEC EIAJ

SOT494A 99-03-30

0 5 10 mm

scale

Flanged double-ended ceramic (AIN) package; 2 mounting holes; 4 leads SOT494A

p

AF

b

e

D

U2H

Q

c

5

1 2

43

D1

E

A

w1 A BM

q

U1

H1

C

B

Mw2 C

E1

Mw3

UNIT A

mm

Db

11.8111.56

0.150.10

33.9628.02

31.3730.61

10.2910.03

16.7416.48

10.2910.03

5.264.60

c D1 U2

0.250.25 0.51

w3q w2w1F

1.661.60

U1

41.2841.02

36.07

H1

27.8127.05

p

3.303.05

Q

2.212.06

E E1

10.2610.06

e

15.75

0.4650.455

0.0060.004

1.3371.103

1.2351.205

0.4050.395

0.6590.649

0.4050.395

0.2070.181

0.010.01 0.020.0650.063

1.6251.615

1.421.0951.065

0.1300.120

0.0870.081

0.4040.396 0.62inches

H



May 1999 2-136



UNIT Q Ubp dcA D E e e2 U1 U2F L P q



98-10-28

IEC JEDEC EIAJ

mm 4.13.7

0.560.46

9.48.9

52.151.7

0.30.2

10.910.5

18.718.3

3.63.4

61.261.0

67.467.0

15.24 2.54

e1

27.94 3.12.9

6.56.1

15.515.1

6.96.5

0.2 0.25

v w

0.1

y

0.3

z


SOT501A

0 10 20 mm

scale

Plastic rectangular single-ended flat package; flange mounted; 2 mounting holes; 4 in-line leads SOT501A

w Mbp

Q

c

P

U2

F

A

U1

e2d

U

D

q

e e1

E

L

z A

4321

B

CA

y

v Bv C

v B


May 1999 2-137







IEC JEDEC EIAJ

SOT502A 99-03-30

0 5 10 mm

scale

Flanged LDMOST package; 2 mounting holes; 2 leads SOT502A

p

L

AF

b

D

U2H

Q

c

1

3

2

D1

E

A

C

q

U1

C

B

E1

M Mw2

UNIT A

mm

Db

12.8312.57

0.150.08

20.0219.61

9.509.25

19.9418.92

9.919.65

4.723.99

c U2

0.25 0.5127.94

q w2w1F

1.140.89

U1

34.1633.91

L

5.334.32

p

3.383.12

Q

1.701.45

E E1

9.509.30

inches0.5050.495

0.0060.003

0.7880.772

D1

19.9619.66

0.7860.774

0.3740.364

0.7850.745

0.3900.380

0.1860.157

0.01 0.021.1000.0450.035

1.3451.335

0.2100.170

0.1330.123

0.0670.057

0.3740.366

H


w1 A BM M M


May 1999 2-138





99-03-29

IEC JEDEC EIAJ

SOT504A

0 5 10 mm

scale


D

D1

U1

1

3

2

A

U2H EE1p

b Q

F

c

M C

C

A

w2

q

B

w1 M

M

B MA M


mm 0.180.10

b

5.595.33

5.975.72

D1

10.5410.29

1.651.40

18.5417.02


3.433.18

14.22 20.4520.19

U2U1

5.975.72

0.25

w2w1

0.51

A

5.844.85

3.432.92

inches 0.0070.004

0.2200.210

0.2350.225

5.795.64

0.2280.222

0.4150.405

10.2610.06

0.4040.396

0.0650.055

0.730.67

0.1350.125

0.56 0.8050.795

0.2350.225

0.010 0.0200.2300.191

0.1350.115


May 1999 2-139



UNIT A1A

max.A2 A3 bp LHE Lp w yvc eD(1) E(2) Z(1) θ



IEC JEDEC EIAJ

mm 0.150.05

0.950.85

0.300.19

0.200.13

3.102.90

4.504.30 0.65

6.506.30

0.700.35

8°0°0.10 0.100.100.94


Notes



0.700.50

SOT530-1 MO-153AA 98-11-25

w Mbp

D

Z

e

0.65

1 4

8 5

θ

AA2

A1

Lp

(A3)

detail X

L

HE

E

c

v M A

X

A

y

2.5 5 mm0

scale

TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4.4 mm SOT530-1

1.10

pin 1 index


May 1999 2-140





IEC JEDEC EIAJ

SOT533 99-02-18TO-251

0 2.5 5 mm

scale

Plastic single-ended package (Philips version of I-PAK); 3 leads (in-line) SOT533

UNIT D e QLc e1A

2.285mm 2.382.22

7.286.94

A1

0.890.71

b

0.890.71

0.560.46

E1D1

1.060.96

E

6.736.47

5.365.26 4.57

9.89.4

1.001.10


D

D1

L

1 2 3

mountingbase

e1

e

Q

b

AE

E1 A1

cw M


May 1999 2-141







IEC JEDEC EIAJ

SOT538A

0 2.5 5 mm

scale

A

Q

Ceramic surface mounted package; 2 leads SOT538A

UNIT cb D E H L Q α

α

w1

mm 0.230.18

1.351.19

5.415.00

5.165.00

D1 D2 E1 E2

4.654.50

4.143.99

7.497.24

4.143.99

7°0°0.25


2.031.27

0.100.00

A

2.952.29

inches 0.0090.007

0.0530.047

0.2130.197

0.2030.197

0.1830.177

0.1630.157

3.633.48

0.1430.137

0.2950.285

0.1630.157

7°0°0.0100.080

0.0500.0040.000

0.1160.090

99-03-30

H EE2 E1

c

b

L

D

D2

D1

B

2

1

3

w1 BM M


May 1999 2-142







IEC JEDEC EIAJ

SOT539A 99-05-10

0 5 10 mm

scale

Flanged balanced LDMOST package; 2 mounting holes; 4 leads SOT539A

p

AF

b

e

D

U2

L

H

Q

c

5

1 2

43

D1

E

A

w1 A BM M M

q

U1

H1

C

B

M Mw2 C

E1

Mw3

UNIT A

mm

Db

11.8111.56

0.150.08

31.5530.94

13.729.539.27

17.1216.10

10.2910.03

5.334.55

c e U2

0.250.25 0.51

w3

35.56

q w2w1F

1.751.50

U1

41.2841.02

H1

25.5325.27

p

3.303.05

Q

2.312.01

E E1

9.509.20

inches0.4650.455

0.0060.003

1.2421.218

D1

31.6530.96

1.2461.219

0.5400.3750.365

0.6740.634

0.4050.395

0.2100.179

0.0100.010 0.0201.4000.0690.059

1.6251.615

1.0050.995

0.1300.120

0.0910.079

0.3740.366

H

3.732.72

0.1470.107

L



May 1999 2-143







IEC JEDEC EIAJ

SOT540A 99-03-30

0 5 10 mm

scale

Flanged balanced LDMOST package; 2 mounting holes; 4 leads SOT540A

p

A

F

b

e

D

U2H

Q

c

5

1 2

43

D1

E

A

w1 A BM M M

q

U1

H1

C

B

M Mw2 C

E1

Mw3

UNIT A

mm

Db

8.518.26

0.150.10

22.0521.64

10.2110.3110.01

15.7514.73

9.919.65

5.775.00

c e U2

0.250.25 0.51

w3

27.94

q w2w1F

1.781.52

U1

34.1633.91

H1

18.7218.47

p

3.383.12

Q

2.722.46

E E1

10.2610.06

inches0.3350.325

0.0060.004

0.8680.852

D1

22.0521.64

0.8680.852

0.4020.4060.394

0.6200.580

0.3900.380

0.2270.197

0.0100.010 0.0201.1000.0700.060

1.3451.335

0.7370.727

0.1330.123

0.1070.097

0.4040.396

H



May 1999 2-144







IEC JEDEC EIAJ

SOT541A 99-04-08

0 5 10 mm

scale

Flanged LDMOST package; 2 mounting holes; 2 leads SOT541A

p

A

F

b

D

U2H

Q

c

1

3

2

D1

E

A

w1 A BM M M

C

q

U1

C

B

E1

M Mw2

UNIT A

mm

Db

11.0510.80

0.180.10

15.3915.09

10.2910.03

20.8319.81

9.919.65

5.134.34

c U2

0.25 0.5122.10

q w2w1F

1.781.52

U1

27.3127.05

p

3.433.18

Q

2.692.44

E E1

10.2610.06

inches0.4350.425

0.0070.004

0.6060.594

D1

15.3915.09

0.6060.594

0.4050.395

0.8200.780

0.3900.380

0.2020.171

0.01 0.020.870.0700.060

1.0751.065

0.1350.125

0.1060.096

0.4040.396

H



May 1999 2-145







IEC JEDEC EIAJ

SOT551A

w BMbp

D

e1

e2

e

pin 1index A

A1

Lp

Q

detail X

HE

E

v M A

AB

0 1 2 mm

scale

c

X

1 32

45

Plastic surface mounted package; 5 leads SOT551A

UNITA1

maxbp c D E e1 HE Lp Q ywv

mm 0.10.30.2

b1

0.81.0

2.21.8

0.250.10

1.351.15

1.3

e2

0.975

e

0.65 2.22.0

0.2 0.10.2


0.450.15

0.250.15

A

1.10.9

1999-05-07

y

b1

SC18_1999_.book : Blank1 146 Wed May 12 11:40:55 1999

SC18_1999_.book : SC18_CHAPTER_3_1999 1 Wed May 12 11:40:55 1999

CHAPTER 3

HANDLING PRECAUTIONS

page

Electrostatic charges 3 - 2

Workstation for handling electrostatic-sensitive devices 3 - 2

Receipt and storage of components 3 - 2

PCD assembly 3 - 2

Testing PCBs 3 - 2


May 1999 3 - 2


Handling precautions Chapter 3

ELECTROSTATIC CHARGES

Electrostatic charges can be stored in many things; forexample, man-made fibre clothing, moving machinery,objects with air blowing across them, plastic storage bins,sheets of paper stored in plastic envelopes, paper fromelectrostatic copying machines, and people (see Fig.1).The charges are caused by friction between two surfaces,at least one of which is non-conductive. The magnitudeand polarity of the charges depend on the differentaffinities for electrons of the two materials rubbingtogether, the friction force and the humidity of surroundingair.

Electrostatic discharge (ESD) is the transfer of anelectrostatic charge between bodies at different potentialsand occurs with direct contact or when induced by anelectrostatic field. All pins of Philips semiconductordevices are protected against electrostatic discharge.However we recommend that the following ESDprecautions are complied with when handling suchcomponents.

WORKSTATION FOR HANDLINGELECTROSTATIC-SENSITIVE DEVICES

Figure 1 shows a working area suitable for safely handlingelectrostatic-sensitive devices. It has a workbench, thesurface of which is conductive and anti-static. The floorshould also be covered with anti-static material.

The following precautions should be observed:

• Persons at a workbench should be earthed via a wriststrap and a resistor.

• All mains-powered equipment should be connected tothe mains via an earth-leakage switch.

• Equipment cases should be grounded.

• Relative humidity should be maintained between 40%and 50%.

• An ionizer should be used to neutralize objects withimmobile static charges in case other solutions fail.

• Keep static materials, such as plastic envelopes andplastic trays etc., away from the workbench. If there areany such static materials on the workbench, removethem before handling the semiconductor devices.

• Refer to the current version of the handbook EN 100015(CECC 00015) “Protection of Electrostatic SensitiveDevices”, which explains in more detail how to arrangean ESD protective area for handling ESD sensitivedevices.

RECEIPT AND STORAGE OF COMPONENTS

Electrostatic-sensitive devices are packed for despatch inanti-static/conductive containers, usually boxes, tubes orblister tape. Warning labels on both primary andsecondary packing show that the contents are sensitive toelectrostatic discharge.

Such devices should be kept in their original packing whilstin storage. If a bulk container is partially unpacked, theunpacking should be done at a protected workstation. Anycomponents that are stored temporarily should be packedin conductive or anti-static packing or carriers.

PCB ASSEMBLY

Electrostatic-sensitive devices must be removed from theirprotective packing with grounded component-pincers orshort-circuit clips. Short-circuit clips must remain in placeduring mounting, soldering and cleansing/dryingprocesses. Don’t remove more components from thestorage packing than are needed at any one time.Production/assembly documents should state that theproduct contains electrostatic sensitive devices and thatspecial precautions need to be taken. During assembly,ensure that the electrostatic-sensitive devices are the lastof the components to be mounted and that this is done ata protected workstation.

All tools used during assembly, including soldering toolsand solder baths, must be grounded. All hand-tools shouldbe of conductive or anti-static material and, wherepossible, should not be insulated.

TESTING PCBs

Completed PCBs must be tested at a protectedworkstation. Place the soldered side of the circuit board onconductive or anti-static foam and remove the short-circuitclips. Remove the circuit board from the foam, holding theboard only at the edges. Make sure the circuit boarddoesn’t touch the conductive surface of the workbench.After testing, replace the PCB on the conductive foam toawait packing.

Assembled circuit boards containing electrostatic-sensitive devices should always be handled in the sameway as unmounted components. They should also carrywarning labels and be packed in conductive or anti-staticpacking.


May 1999 3 - 3



Fig.1 Poor working environment for electronic component handling showing potential ESD hazards.

handbook, full pagewidth

plastic trays

Nylon overall

Plastic table top

Plastic storage bins

Air blowing over table top

Nylon carpet or plastic flooring

Plastic envelopes

MSB430


May 1999 3 - 4



Fig.2 Essential features of an ESD-protected workstation.


MSB431

Supplyearth

Conductivebench top

1 MΩ

1 MΩ

1 MΩ

Ground

Commonreference

point

Conductive floor mat

Strap (resistancebetween 0.9 and 5.0 MΩ)

Conductive stool

Conductive bootsor heel grounding

protectors

Cotton overall

Electrostaticvoltage sensor

Conductivecompartment

trays

Distributionsupply boxSafety

isolationtransformer

RCCB

SPECIAL HANDLING AREA

AUTHORIZED

PERSONNEL ONLY


CHAPTER 4

SOLDERING GUIDELINES ANDSMD FOOTPRINT DESIGN

page

Introduction 4 - 2

Axial and radial leaded devices 4 - 2

Surface-mount devices 4 - 3

Recommended footprints 4 - 14


May 1999 4 - 2


Soldering guidelines and SMDfootprint design

Chapter 4

INTRODUCTION

There are two basic forms of electronic componentconstruction, those with leads for through-hole mountingand microminiature types for surface mounting.Through-hole mounting gives a very rugged constructionand uses well established soldering methods. Surfacemounting has the advantages of high packing density plushigh-speed automated assembly.

AXIAL AND RADIAL LEADED DEVICES

The following general rules are for the safe handling andsoldering of axial and radial leaded diodes. Special rulesfor particular types may apply and, for these, instructionsare given in the individual data sheets. With allcomponents, excessive forces or heat can cause seriousdamage and should always be avoided.

Handling

• Avoid perpendicular forces on the body of the diode

• Avoid sudden forces on the leads or body. These forcesare often much greater than allowed

• Avoid high acceleration as a result of any shock, e.g.dropping the device on a hard surface

• During bending, support the leads between body or studand the bending point

• During the bending process, axial forces on the bodymust not exceed 20 N

• Bending the leads through 90° is allowed at anydistance from the body when it is possible to support theleads during bending without contacting the body orweldings

• Bending close to the body or stud without supporting theleads is only allowed if the bend radius is greater than0.5 mm

• Twisting the leads is allowed at any distance from thebody or stud only if the lead is properly clampedbetween body or stud and the twisting point

• Without clamping, twisting the leads is allowed only at adistance of greater than 3 mm from the body; the torqueangle must not exceed 30°

• Straightening bent leads is allowed only if the appliedpulling force in the axial direction does not exceed 20 Nand the total pull duration is not longer than 5 s.

Soldering

• Avoid any force on the body or leads during orimmediately after soldering

• Do not correct the position of an already soldered deviceby pushing, pulling or twisting the body

• Avoid fast cooling after soldering.

The maximum allowable soldering time is determined by:

• Package type

• Mounting environment

• Soldering method

• Soldering temperature

• Distance between the point of soldering and the seal ofthe component body.

The maximum permissible temperature of the solder is260 °C; this temperature must not be in contact with thejoint for more than 5 s. The total contact time of successivesolder waves must not exceed 5 s.

The component may be mounted up to the seating plane,but the temperature of the plastic body must not exceedthe specified storage maximum. If the PCB has beenpreheated, forced cooling may be necessary immediatelyafter soldering to keep the temperature within thepermissible limit.

Mounting

If the rules for handling and soldering are observed, thefollowing mounting or process methods are allowed:

• Preheating of the printed-wiring board before solderingup to a maximum of 100 °C

• Flat mounting with the diode body in direct contact withthe printed-wiring board with or without metal tracks onboth sides and/or plated-through holes

• Flat mounting with the diode body in direct contact withhot spots or hot tracks during soldering

• Upright mounting with the diode body in direct contactwith the printed-wiring board if the body is not in contactwith metal tracks or plated-through holes.

Repairing soldered joints

Apply the soldering iron to the component pin(s) below theseating plane, or not more than 2 mm above it. If thetemperature of the soldering iron bit is below 300 °C, itmay remain in contact for up to 10 s. If it is over 300 °C butbelow 400 °C, it may only remain in contact for up to 5 s.


May 1999 4 - 3



Chapter 4

SURFACE-MOUNT DEVICES

Since the introduction of surface mount devices (SMDs),component design and manufacturing techniques havechanged almost beyond recognition. Smaller pitch,minimum footprint area and reduced component volumeall contribute to a more compact circuit assembly. As aconsequence, when designing PCBs, the dimensions ofthe footprints are perhaps more crucial than ever before.

One of the first steps in this design process is to considerwhich soldering method, either wave or reflow, will be usedduring production. This determines not only the solderfootprint dimensions, but also the minimum spacingbetween components, the available area underneath thecomponent where tracks may be laid, and possibly therequired component orientation during soldering.

Although reflow soldering is recommended for SMDs,many manufacturers use, and will continue to use for sometime to come, a mixture of surface-mount and through-holecomponents on one substrate (a mixed print).

The mix of components affects the soldering methods thatcan be applied. A substrate having SMDs mounted on oneor both sides but no through-hole components is likely tobe suitable for reflow or wave soldering. A double sidedmixed print that has through-hole components and someSMDs on one side and densely packed SMDs on the othernormally undergoes a sequential combination of reflowand wave soldering. When the mixed print has onlythrough-hole components on one side and all SMDs on theother, wave soldering is usually applied.

To help with your circuit board design, this guideline givesan overview of both reflow and wave soldering methods,and is followed by some useful hints on hand soldering forrepair purposes, and the recommended footprints for ourSMD discrete semiconductor packages.

Reflow soldering process

There are three basic process steps for single-sided PCBreflow soldering, these are:

1. Applying solder paste to the PCB

2. Component placement

3. Reflow soldering.

APPLYING SOLDER PASTE TO THE PCB

Solder paste can be applied to the PCBs solder lands byone of either three methods: dispensing, screen or stencilprinting.

Dispensing is flexible but is slow, and only suitable forpitches of 0.65 mm and above.

With screen printing, a fine-mesh screen is placed over thePCB and the solder paste is forced through the mesh ontothe solder lands of the PCB. However, because of meshaperture limitations (emulsion resolution), this method isonly suitable for solder paste deposits of 300 µm andwider.

Stencil printing is similar to screen printing, except that ametal stencil is used instead of a fine-mesh screen. Thestencil is usually made of stainless steel or bronze andshould be 150 to 200 µm thick. A squeegee is passedacross the stencil to force solder paste through theapertures in the stencil and onto the solder lands on thePCB (see Fig.1). It does not suffer from the samelimitations as the other two printing methods and so is thepreferred method currently available.

It is recommended that for solder paste printing, theequipment is located in a controlled environmentmaintained at a temperature of 23 ±2 °C, and a relativehumidity between 45% and 75%.


May 1999 4 - 4



Chapter 4

Stencil printing

The printing process must be able to apply the solderpaste deposits to the PCB:

• In the correct amounts

• At the correct position on the lands

• With an acceptable height and shape.

Fig.1 Applying solder paste by stencilling.

handbook, halfpage

MSB905

solder pastestencilsolder land

board

filling

levelling

release

squeegee

The amount of solder paste used must be sufficient to givereliable soldered joints. This amount is controlled by thestencil thickness, aperture dimensions, process settings,and the volume of paste pressed through the apertures bythe squeegee.

The downward force of the squeegee is counteracted bythe hydrodynamic pressure of the paste, and so themachine should be set to ensure that the stencil is just‘cleaned’ by the squeegee.

Suitable aperture dimensions depend on the stencilthickness. The solder paste deposits must have a flat parton the top (Fig.2, examples 4 and 5), which can beachieved by correct process settings. The footprints givenin this book were designed for these correct deposit types.Stencil apertures that are too small result in irregular dotson the lands (Fig.2, examples 1 to 3). If the apertures aretoo large, solder paste can be scooped out, particularly if arubber squeegee is used (Fig.2, example 6).

Ideally, the deposited solder paste should sit entirely onthe solder land. The tolerated misplacement of solderpaste with respect to the solder land is determined by themost critical component. The solder paste deposit must bedeposited within 100 µm with respect to the solder land.

Furthermore, the tackiness (tack strength) of the solderpaste must be sufficient to hold surface-mount devices onthe PCB during assembly and during transport to thereflow oven. Tack strength depends on factors such aspaste composition, drying conditions, placement pressure,dwell time and contact area. As a general rule, componentplacement should be within four hours after the pasteprinting process.

Squeegee

The squeegee can be either metal or rubber. A metalsqueegee gives better overall results and so isrecommended, however with step stencils, a rubbersqueegee has to be used. The footprints given in thischapter were designed for application by both types ofsqueegee.

Fig.2 Shapes of solder deposits for increasingstencil apertures (left to right).

MSB904

21 3 4 5 6


May 1999 4 - 5



Chapter 4

Stencil apertures

Stencil apertures can be made by either:

• Etching

• Laser cutting

• Electroforming.

Of the three methods, etching is less accurate as thedeviation in aperture dimensions with respect to the targetis relatively large (target is +50 µm at squeegee side and0 µm at PCB side).

Laser-cut and electroformed stencils have smallerdeviations in dimensions and are therefore more suitablefor small and fine-pitch components (see Fig.3).

A useful method of controlling the stencil printing processduring production is by monitoring the weight of solderpaste on the board which may vary between 80% and110% of the theoretical amount according to the target(designed) apertures. Smearing and clogging of a smallaperture cannot be detected with this method.

Solder paste

Reflow soldering uses a paste consisting of small nodulesof solder and a flux with binder, solvents and additives tocontrol rheological properties. The flux in the solder pastecan be rosin mildly activated or rosin activated.

The requirements of the solder paste are:

• Good rolling behaviour

• No slump during heat-up

• Low viscosity during printing

• High viscosity after printing

• Sufficient tackiness to hold the components

• Removal of oxides during reflow soldering.

Fig.3 Specifications of laser-cut stencil aperturesfor discrete and passive components.

A = B +0/−30 (µm).

B = X ±30 (µm).

X = nominal apertures size.

handbook, halfpage

MSB906B

A

stencil

Suitable solder paste types have the followingcompositions:

• Sn62Pb36Ag2

• Sn63Pb37

• Sn60Pb40.

COMPONENT PLACEMENT

The position of the component with respect to the solderlands is an important factor in the final result of theassembly process. A misaligned component can lead tounreliable joints, open circuits and/or bridges betweenleads.

The placement accuracy is defined as the maximumpermissible deviation of the component outline orcomponent leads, with respect to the actual position of thesolder land pattern belonging to that component orcomponent leads on the circuit board (see Fig.4).

A maximum placement deviation (P) of 0.25 mm is used inthese guidelines, which relates to the accuracy of alow-end placement machine. A higher placement accuracyis required for components with a fine pitch. This is givenin the footprint description for the components concerned.

Besides the position in x- and y-directions, the z-positionwith respect to the solder paste, which is determined bythe placement force, is also important. If the placementforce is too high, solder paste will be squeezed out andsolder balls or bridges will be formed. If the force is too low,physical contact will be insufficient, leads will not besoldered properly and the component may shift.

Fig.4 Component placement tolerances.

handbook, halfpage

MSB954

≤Pcpcu

≤Pcpcu

target positionrelated to copper pattern

actual mounted position


May 1999 4 - 6



Chapter 4

REFLOW SOLDERING

There are several methods available to provide the heat toreflow the solder paste, such as convection, hot belt, hotgas, vapour phase and resistance soldering. The preferredmethod is, however, convection reflow.

Convection reflow

With this method, the PCBs passes through an ovenwhere it is preheated, reflow soldered and cooled (seeFig.5). If the heating rate of the board and components aresimilar, however, preheating is not necessary.

During the reflow soldering process, all parts of the boardmust be subjected to an accurate temperature/ timeprofile. Figure 5 shows a suitable profile framework for

single-sided reflow soldering and the first side ofdouble-sided print boards. It's important to note that thisprofile is for discrete semiconductor packages. The actualframework for the entire PCB could be smaller than theone shown, as other components on the board may havedifferent process requirements.

Reflow soldering can be done in either air or a nitrogenatmosphere. If soldering in air, the temperature (Tp) mustnot exceed 240 °C on the first side of a double-sided printboard with organic coated solder lands. This is becausepeak temperatures greater than 240 °C reduce thesolderability of the lands on the second side to besoldered. This peak temperature can rise to 280 °C whensoldering the second side with organic coated solder landsin air.

Fig.5 Convection reflow soldering method (top), process requirements for reflow soldering (bottom).

α ≤ 10 °C/s. tE ≤ 1 min, if possible (else ≤ 5 min).

TE ≤ 160 °C. tM = 2 to 30 s.

TR = 180 °C. tR ≤ 70 s.

TPmin = 205 °C.

Tpmax = 240 °C for soldering the first side of a double-sidedboard with organic finish.

TPmax = 280 °C for all other cases.


MLC735

preheating soldering cooling

belt

handbook, full pagewidthtemperature

Tp max

Tp min

TR

tRtM

PCB damage

organic finishaffected

time

TE

tE

α α

MSB976


May 1999 4 - 7



Chapter 4

If soldering in a nitrogen atmosphere, a peak temperatureof 280 °C is allowed for double-sided print boards orsingle-sided reflow soldering. Soldering in a nitrogenatmosphere results in smoother joint meniscus, smallercontact angles, and better wetting of the copper solderlands.

The profile can be achieved by correct combinations ofconveyor speed and heater temperature. To checkwhether the profile is within specification, the coldest andhottest spots on the board have to be located.

To do this, you should dispense solder paste depositsregularly over the surface of a test board and on thecomponent leads. Set the oven to a moderate temperaturewith maximum conveyor velocity and pass the test boardthrough. If too many solder paste dots melt, lower theoven's temperature. Continue passing test boards throughthe oven, while lowering the speed of the belt in smallsteps.

The deposit that melts first indicates the warmest location,the one that melts last indicates the coldest location. Pastedots not reflowed after two runs must be replaced by freshdots. Thermocouples have to be mounted at the coldestand warmest location and temperature profiles measured.

Double-wave soldering process

There are four basic process steps for double-wavesoldering, these are:

1. Applying adhesive

2. Component placement

3. Curing adhesive

4. Wave soldering process.

APPLYING ADHESIVE

To hold SMDs on the board during wave soldering, it isnecessary to bond the component to the PCB with one ormore adhesive dots. This is done either by dispensing,stencilling or pin transfer. Dispensing is currently the mostpopular technique. It is flexible and allows a controlledamount of adhesive to be applied at each position.Stencil printing and pin transfer are less flexible and aremainly used for mass production. The component-specificrequirements for an adhesive dot are:

• Shape (volume) of the adhesive dot

• Number of dots per component

• Position of the dots.

Volume of adhesive

There must be enough adhesive to keep components intheir correct positions while being transported to the curingoven. This means that the deposited adhesive must behigher than the gap between the component and the boardsurface. Nevertheless, there should not be too muchdeposit as it may smear onto the solder lands, where it canaffect their solderability. The gap between a componentand printed board depends on the geometry of the boardand component (see Fig.6).

Table 1 gives guidelines for volumes of adhesive dots perpackage. The spreading in volumes should be within±15%.

Table 1 Guidelines for volumes of adhesive dots

COMPONENTNUMBER OF

DOTSVOLUME PER

DOT (mm3)

SOD106 1 0.65

SOD80C, SOD8712

0.50.08

SOD110, SOD323 2 0.065

SOT323 (SC70-3) 2 0.045

SOT23, SOT143,SOT 346 (SC59)

2 0.06

SOT89 2 0.3

SOT223 2 0.70

Fig.6 Available space for adhesive betweencomponent and PCB (unmarked area).

h1 = component stand-off height.

h2 = solder resist (and track) height on PCB.

h3 = copper height on PCB.

b1 = gap between solder lands on the PCB.

b2 = gap between metallization of the component.

MSB903

b1

b2

h1h2 h3


May 1999 4 - 8



Chapter 4

Number, position and volume of dots per component

Figure 7 shows the recommended positions and numbersof adhesive dots for a variety of packages. SOD106,SOT89 and SOT223 packages require much larger

adhesive dots compared with those for other components.SOD80C and SOD87 packages can have one largeadhesive dot (recommended) or two smaller adhesivedots.

Fig.7 Position of adhesive dots. Pitch between two small dots is 1.0 mm.

For optimum power dissipation, the SOT89 requires a good thermal contact (i.e. good solder joint) between the package and the solder land.During wave-soldering, however, flux may not always reach the total soldering area beneath the component body, which in turn can lead to anincomplete solder joint. If the SOT89 is double-wave soldered, therefore, power derating must be applied.

handbook, halfpage

MSB901

handbook, halfpage

MSB900

handbook, halfpage

MSB902

P

handbook, halfpage

MSB899

handbook, halfpage

MSB898

handbook, halfpage

MSB896

handbook, halfpage

MSB897

handbook, halfpage

MSC093

P

a. SOD106. b. SOD80C, SOD87.

c. SOD110. d. SOD80C, SOD87.

e. SOD323. f. SOT23, SOT143, SOT323 (SC70-3)SOT346 (SC59).

g. SOT89 (P = 4.4 mm). h. SOT223 (P = 6.0 mm).


May 1999 4 - 9



Chapter 4

Nozzle outlet diameter

Depending on adhesive type and component size, thenozzle outlet diameter of the dispenser can vary between0.6 and 0.7 mm for the larger dots, and between0.3 and 0.5 mm for the smaller dots.

As the rheology of the adhesive is temperature dependent,the temperature in the nozzle must be carefully controlledbefore dispensing. The required temperature depends onthe adhesive type, but is usually between 26 °C and 32 °Cto maintain the adhesive's rheology within specificationduring dispensing. Thermally curing epoxy adhesives arenormally used.

Adhesives

Beside the nozzle diameters, different adhesive types arealso used for different component sizes. Smallcomponents can be secured during assembly and wavesoldering with a thin (low green strength) adhesive, whichcan be dispensed at high speeds. For larger components(such as QFP and SO packages), a higher green strengthadhesive is required.

COMPONENT PLACEMENT

Positioning components on the PCB is similar in practiceto that of reflow soldering.

To prevent component shift and smearing of the adhesive,board support is important while placing components. Thisis particularly important when placing the SOD106package.

CURING THE ADHESIVE

To provide sufficient bonding strength betweencomponent and board, the adhesive must be properlycured. Figure 8 gives general process requirements forcuring most thermosetting epoxy adhesives with latenthardeners. The temperature profile of all adhesive dots onthe PCB must be within this framework. It's important tonote that this profile is for discrete semiconductorpackages. The actual framework for the entire PCB couldbe smaller than the one shown, as other components onthe board may have different process requirements.

To check whether the profile is within specification, thetemperature of coldest and hottest spots must bemeasured. The coldest spot is usually under the largestpackage: the hottest spot is usually under the smallestpackage.

The adhesive can be cured either by infrared or hot-airconvection.

Bonding strength

The bonding strength of glued components on the boardcan be checked by measuring the torque force. For smallcomponents the requirements are given in Table 2.No values are specified for larger packages.

Table 2 Bonding strength requirements

COMPONENT

MINIMUMBONDING

STRENGTH(cNcm)

TARGETBONDING

STRENGTH (cNcm)

SOD323, SOD110,SOT323 (SC70-3)

110 250

SOD80C, SOD87 200 350

SOT23, SOT346 (SC59),SOT143

150 250

Fig.8 Process requirements for curingthermosetting adhesives.

Tmax ≤ 160 °C.

Tmin ≥ 110 °C.

tC ≥ 3 minutes.

α ≤ 100 °C/min (some adhesives allow higher heating rates).

If Tmin > 125 °C, tC may be <3 min, depending on adhesivespecification.

temperature

Tmin

Tmax

time

α

MSB977

tC


May 1999 4 - 10



Chapter 4

WAVE SOLDERING PROCESS

After applying adhesive, placing the component on thePCB and curing, the PCB can be wave soldered. The wavesoldering process is basically built up from threesub-processes. These are:

1. Fluxing

2. Preheating

3. (Double) wave soldering.

Although listed here as sub-process they are in practicecombined in one machine. All are served by one transportmechanism, which guides the PCBs at an incline throughthe soldering machine. It's important to note that the PCBmust be loaded into the machine so that the SMDs on theboard come into direct contact with the solder wave (seeFig.9).

In principle, two different systems of PCB transports areavailable for wave soldering:

• Carrier transport

PCBs are mounted on a soldering carrier, which movesthrough the soldering machine, taking it from onesub-process to the next. The advantage of carriermounting is that the board is fixed and warpage duringsoldering is reduced.

• Carrierless transport

PCBs are guided through the soldering machine by achain with grips. This method is more convenient formass production.

Fluxing

Fluxing is necessary to promote wetting both of the PCBand the mounted components. This ensures a good andeven solder joint.

Fig.9 Double-wave soldering.

MSC029solder

During the fluxing process, the solder side of the PCB(including the components) are covered with a thin layer ofsolder flux, which can be applied to the PCB either byspraying or as a foam. Although several types of solderflux are available for this purpose, they can be categorizedinto three main groups:

• Non-activated flux (e.g. rosin-based fluxes)

• Mildly activated flux (e.g. rosin-based or syntheticfluxes)

• Highly activated flux (e.g. water-soluble fluxes).

The choice for a particular flux type depends mainly on theproducts to be soldered.

Although there is always some flux residue left on the PCBafter soldering, it's not always necessary to wash theboards to remove it. Whether to clean the board candepend on:

• The type of flux used (highly activated fluxes arecorrosive and so should always be removed).

• The required appearance of the board after soldering.

• Customer requirements.

Preheating

After the flux is applied, the PCB needs to be preheated.This serves several purposes: it evaporates the fluxsolvents, it accelerates the activity of the flux and it heatsthe PCB and components to reduce thermal shock.

The required pre-heat temperature depends on the type offlux used. For example, the more common low-residuefluxes require a pre-heat temperature of 120 °C(measured on the wave solder side of the PCB).

(Double) wave soldering

The PCB first passes over a highly intensive (jet) solderwave with a carefully controlled constant height. Thisensures good contact with the PCB, the edges of SMDsand the leads of components near to high non-wettedbodies. The greater the board's immersion depth into thisfirst wave, the fewer joints will be missed.

If the PCB is carrier mounted, the first wave’s height, andthus the board's immersion depth, can be greater.Carrierless soldering is more convenient for massproduction, but the height of the wave must be lower toavoid solder overflowing to the top side of the board. Theheight of the jet wave is given in Table 3 along with anindication of soldering process window. This information isbased on a 1.6 mm thick PCB.


May 1999 4 - 11



Chapter 4

The second, smoother laminar solder wave completesformation of the solder fillet, giving an optimal solderedconnection between component and PCB. It also reducesthe possibility of solder bridging by taking up excessivesolder.

To reduce lead/tin oxides and possibly other solderimperfection forming during soldering, the complete waveconfiguration can be encapsulated by an inert atmospheresuch as nitrogen.

Hand soldering microminiature components

It is possible to solder microminiature components with alight-weight hand-held soldering iron, but this method hasobvious drawbacks and should be restricted to laboratoryuse and/or incidental repairs on production circuits:

• Hand-soldering is time-consuming and thereforeexpensive

• The component cannot be positioned accurately and theconnecting tags may come into contact with thesubstrate and damage it

• There is a risk of breaking the substrate and internalconnections in the component could be damaged

• The component package could be damaged by the iron.

Assessment of soldered joint quality

The quality of a soldered joint is assessed by inspectingthe shape and appearance of the joint. This inspection isnormally done with either a low-powered magnifier ormicroscope, however where ultra-high reliability isrequired, video, X-ray or laser inspection equipment maybe considered.

Both sides of the PCB should be carefully examined: thereshould be no misaligned, missing or damagedcomponents, soldered joints should be clean and have asimilar appearance, there should be no solder bridging orresidue, and the PCB should be assessed for generalcleanliness.

Unlike leaded component joints where the lead alsoprovides added mechanical strength, the SMD relies onthe quality of the soldering for both electrical andmechanical integrity. It is therefore necessary that theinspector is trained to make a visual assessment withregard to long-term reliability.

Criteria used to assess the quality of an SMD solder jointinclude:

• Correct position of the component on the solder lands

• Good wetting of the surfaces

• Correct amount of solder

• A sound, smooth joint surface.

Table 3 Process ranges for carrierless and carrier double wave soldering

CARRIERLESS CARRIER

Preheat temperature of board at wave solder side (°C) 120 ±10

Heating rate preheating (°C/s) ∆T/∆t ≤ 3

First (jet) wave:

wave height with respect to bottom side of board (mm) 1.6 +0.5/−0 3.0 +0.5/−0

Second (laminar) wave (double sided overflow):

height with respect to underside of the board (mm) 0.8 +0.5/−0

relative stream velocity with respect to the board 0

Solder temperature (°C) 250 ±3

Contact times (s):

first (jet) wave 0.5 +0.5/−0

second (laminar) wave 2.0 ±0.2 (plain holes); 2.5 ±0.2 (plated holes)

PCB transport angle (°) 7 ±0.5

Solder alloys Sn60Pb40; Sn60Pb38Bi2


May 1999 4 - 12



Chapter 4

POSITIONING

If a lead projects over the solder land too far an unreliablejoint is obtained. Figures 10 to 12 show the maximum shiftallowed for various components. The dimensions of thesesolder lands guarantee that, in the statistically extremesituation, a reliable soldered joint can be made.

GOOD WETTING

This produces an even flow of solder over the surface landand component lead, and thinning towards the edges ofthe joint. The metallic interaction that takes place duringsoldering should give a smooth, unbroken, adherent layerof solder on the joint.

CORRECT AMOUNT OF SOLDER

A good soldered joint should have neither too much nor toolittle solder: there should be enough solder to ensureelectrical and mechanical integrity, but not so much that itcauses solder bridging.

SOUND, SMOOTH JOINT SURFACE

The surface of the solder should be smooth andcontinuous. Small irregularities on the solder surface areacceptable, but cracks are unacceptable.

Fig.10 J ≥ 0.3 mm.

handbook, halfpage

MSB963 J

solder lands

Fig.11 J ≥ 0.1 mm; solder land > Lp.

handbook, halfpage

MSB964Lp

J>0.1 mm

0.25 mm

printed board

Fig.12 Oc > half lead width.

MSB955

Jcucp>0.1 mm

0.25 mm

printed boardOcpcu

nom. pos.extreme pos.


May 1999 4 - 13



Chapter 4

Footprint definitions

A typical SMD footprint, is composed of:

• Solder lands (conductive pattern)

• Solder resist pattern

• Occupied area of the component

• Solder paste pattern (for reflow soldering only)

• Area underneath the SMD available for tracks

• Component orientation during wave soldering.

SOLDER LANDS (CONDUCTIVE PATTERN)

The dimensions of the solder lands given in theseguidelines are the actual dimensions of the conductivepattern on the printed board (see Fig.13).These dimensions are more crucial for fine-pitchcomponents.

SOLDER RESIST PATTERN

The solder resist on the circuit board prevents shortcircuits during soldering, increases the insulationresistance between adjacent circuit details and stopssolder flowing away from solder lands during reflowsoldering.

The solder land dimensions are designed to give optimum solderingresults. They do not take into account the copper area for optimumpower dissipation. If an extra area is required to improve powerdissipation, it should be coated with solder resist. This is especiallyimportant for power packages such as SOD106, SOT89 andSOT223.

handbook, halfpage

MSB956

design width (+0.04. . . −0.4)

design width (0. . . −0.07)

solder land width

Fig.13 Requirements of solder land dimensions.

In contrast to the tracks, which must be entirely covered,solder lands must be free of solder resist. Because of this,the cut-outs in the solder resist pattern should be at least0.15 mm or 0.3 mm larger than the relevant solder lands(for a photo-defined and screen printed solder resistpattern respectively). The solder resist cut-outs given withthe footprints in these guidelines are sketched and theirdimensions can be calculated by using the above rule.Consult your printed board supplier for agreement withthese solder resist cut-outs.

OCCUPIED AREA OF THE COMPONENT

A minimum spacing between components is necessary toavoid component placement problems, short circuitsduring wave or reflow soldering and dry solder joints duringwave soldering caused by non-wettable componentbodies. These problems can be avoided by placing thecomponents so the occupied areas do not overlap (seeFig.14).

Fig.14 Minimum spacing required (bottom)between components.

MSB958

CORRECT

WRONG


May 1999 4 - 14



Chapter 4

SOLDER PASTE PATTERN

It is important to use a solder paste printer which is opticalaligned with the PCBs copper pattern for the reflowfootprints presented here. This is because, for thesefootprints, the solder paste deposit must be within a0.1 mm tolerance with respect to the copper pattern.

To ensure the right amount of solder for each solder joint,the stencil apertures must be equal to the solder pasteareas given by the footprints.

AREA AVAILABLE FOR TRACKS (CONDUCTIVE PATTERN)

Tracks underneath leadless SMDs must be covered withsolder resist. However, as solder resist can sometimes bethin or have pin holes at the edges of tracks (especiallywhen applied by screen printing), an additional clearancefor tracks with respect to the actual metallization positionof the mounted component should be taken into account(see Fig.15).

For components that need the additional clearance, thefootprints on the following pages give the maximum spacefor tracks not connected to the solder lands(clearance ≥ 0.1 mm), for low-voltage applications.The number of tracks in this space is determined by thespecified line resolution of the printed board.

Fig.15 Clearance required underneath componentbetween metallization and tracks.

handbook, halfpage

MSB957

tracksclearence

solder resist

component

COMPONENT ORIENTATION DURING WAVE SOLDERING

Where applicable, footprints for wave soldering are givenwith the transport direction of the PCB. This is given aseither a ‘preferred transport direction during soldering’ or‘transport direction during soldering’.

Components with small terminals and non-wettablebodies, have a smaller risk of dry joints, especially whenusing carrierless soldering as the components are placedaccording to the ‘preferred orientation’.

Components have no orientation preference for reflowsoldering.

RECOMMENDED FOOTPRINTS

The recommended footprints for most of our discretesemiconductor packages are given on the following pages.For their dimensional outline drawings, refer to Chapter 2:Package outlines.


May 1999 4 - 15



Chapter 4

Fig.16 Reflow soldering footprint for SOD80C.


MSA435

2.304.304.55

1.601.702.25

0.90(2x)

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.

Fig.17 Wave soldering footprint for SOD80C.


MSA461

2.704.906.30

1.702.90

solder lands

solder resist

occupied area

1.90

tracks

Dimensions in mm.


May 1999 4 - 16



Chapter 4

Fig.18 Reflow soldering footprint for SOD87.


MSA436

2.304.304.55

1.801.902.80

0.90(2x)

solder lands

solder resist

occupied area

solder paste

0.20

Dimensions in mm.

Fig.19 Wave soldering footprint for SOD87.


MSA417

2.305.406.80

2.004.60

solder lands

solder resist

occupied area

1.90

tracks

Dimensions in mm.


May 1999 4 - 17



Chapter 4



MBH648

2.904.806.00

6.35

2.102.35

3.00

3.05

2.10

6.10

0.20

2.00

solder lands

solder resist

occupied area

solder paste

occupied area

Dimensions in mm.



MBH647

3.451.95

8.05

3.205.45

8.75

solder lands

solder resist

occupied area

tracks

Dimensions in mm.


May 1999 4 - 18



Chapter 4



MSA460

1.10

0.70

2.703.10

0.901.001.65

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.



MSA428

1.353.354.45

1.203.20

0.40

solder lands

solder resist

occupied area

tracks

Dimensions in mm.


May 1999 4 - 19



Chapter 4

Fig.24 Reflow soldering footprint for SOD323 (SC-76).


MSA433

1.65

0.50(2x)

2.101.60

2.80

0.60

3.05

0.500.95

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.

Fig.25 Wave soldering footprint for SOD323 (SC-76).


MSA415

1.404.40

5.00

1.202.75

solder lands

solder resist

occupied area

preferred transport direction during soldering

Dimensions in mm.


May 1999 4 - 20



Chapter 4

Fig.26 Reflow soldering footprint for SOD523 (not suitable for wave soldering).

Dimensions in mm.


MGS343

solder lands

solder resist

occupied area

solder paste

1.801.90

0.300.40

0.501.20

0.60

2.15


May 1999 4 - 21



Chapter 4

Fig.27 Reflow soldering footprint for SOT23.


MSA439

1.00

0.60(3x)

1.30

12

3

2.50

3.00

0.85

2.70

2.90

0.50 (3x)0.60 (3x)

3.30

0.85

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.

Fig.28 Wave soldering footprint for SOT23.


MSA427

4.004.60

2.804.50

1.20

3.40

3

2 1

1.20 (2x)


solder lands

solder resist

occupied area

Dimensions in mm.


May 1999 4 - 22



Chapter 4

Fig.29 Reflow soldering footprint for SOT89 (SC-62).


MSA442

1.00(3x)

4.854.60

1.20

4.75

0.60 (3x)0.70 (3x)

3.703.95

1.20

0.50

1.70

12 3

0.200.85

1.20

1.20

1.902.002.25

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.

Fig.30 Wave soldering footprint for SOT89 (SC-62).

Not recommended for wave soldering (see Fig.7).


MSA423

3.00

7.60

6.60

1.20

5.301.50

0.50

3.50

2.40

12

3

0.70

solder lands

solder resist

occupied area

transport direction during soldering

Dimensions in mm.


May 1999 4 - 23



Chapter 4

Fig.31 Reflow soldering footprint for SOT96-1 (SO8) and SOT137-1 (SO24).


MSB461 1.27

0.60

G

B A F

Csolder lands

occupied area

Dimensions (in mm)

SOT96-1 SOT137-1

A = 6.60 11.0

B = 4.00 8.00

C = 1.30 1.50

F = 7.00 11.40

G = 5.50 16.00

placement accuracyfor all types = 0.25


MLC745G

1.200.3 AB F

C

solder lands

solder resist

occupied area

1.27 (N 2)X0.60

enlarged solder land

board direction

Fig.32 Wave soldering footprint for SOT96-1 (SO8) and SOT137-1 (SO24).

Dimensions (in mm)

SOT96-1 SOT137-1

N = 8 leads 24 leads

A = 8.00 11.50

B = 3.80 7.90

C = 2.10 1.80

F = 9.40 13.00

G = 7.10 18.50

placement accuracyfor all types = 0.25


May 1999 4 - 24



Chapter 4

Fig.33 Reflow soldering footprint for SOT143B (footprint for SOT143R is mirror image).


MSA441

0.60(4x)

1.30

2.50

3.002.70

0.50 (3x)0.60 (3x)

3.25

4 3

21

0.901.00

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.

Fig.34 Wave soldering footprint for SOT143B (footprint for SOT143R is mirror image).

ndbook, full pagewidth

MSA422

4.00 4.60

1.20 (3x)4.45

1 2

34

1.15

3.401.00


solder lands

solder resist

occupied area

Dimensions in mm.


May 1999 4 - 25



Chapter 4

Fig.35 Reflow soldering footprint for SOT163-1 (SO20).


MSB461 1.27

0.60

G

B A F

Csolder lands

occupied areaDimensions:

A = 11.00 mm

B = 8.00 mm

C = 1.50 mm

F = 11.40 mm

G = 13.40 mm

placement accuracy = 0.25 mm


MLC745G

1.200.3 AB F

C

solder lands

solder resist

occupied area

1.27 (N 2)X0.60

enlarged solder land

board direction

Fig.36 Wave soldering footprint for SOT163-1 (SO20).

Dimensions:

A = 11.50 mm

B = 7.90 mm

C = 1.80 mm

F = 13.00 mm

G = 15.90 mm

N = 20 leads

placement accuracy = 0.25 mm


May 1999 4 - 26



Chapter 4



MSA443

1.20(4x)

3.90

5.90

4.807.40

4

2 31

3.85

1.20 (3x)1.30 (3x)

0.30

3.603.50

7.00

6.15

7.65

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.



MSA424

8.70

8.90

7.301.90 (2x)

6.70

4

1 2 3

1.10

8.104.30


solder lands

solder resist

occupied area

Dimensions in mm.


May 1999 4 - 27



Chapter 4



MSA429

0.852.35

0.55(3x)

1.3250.75

2.40

2.65

1.30

3

2

1

0.60(3x)

0.50(3x) 1.90

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.



MSA419

4.004.60

2.103.65

1.15

2.703

2

1 0.90(2x)


solder lands

solder resist

occupied area

Dimensions in mm.


May 1999 4 - 28



Chapter 4


MLC748

B A F

C

solder lands

solder resist

occupied area

PD(Nx)

G

H

M

K

Fig.41 Reflow soldering footprint for SOT338-1 (SSOP16), SOT339-1 (SSOP20),SOT340-1 (SSOP24) and SOT34-1 (SSOP28).

Dimensions (in mm)

SOT338-1 SOT339-1 SOT340-1 SOT341-1

N = 16 leads 20 leads 24 leads 28 leads

P = 0.65 0.65 0.65 0.65

A = 8.10 8.10 8.10 8.10

B = 5.70 5.90 5.90 5.90

C = 1.20 1.10 1.10 1.10

D = 0.40 0.40 0.40 0.40

F = 8.35 8.35 8.35 8.35

G = 6.50 7.50 8.50 10.50

H = 5.20 6.50 7.80 9.10

K = 5.55 5.55 5.55 5.60

M = 4.95 6.25 7.55 8.85

placement accuracy for all types = 0.15


4.000.40 E F

Hsolder lands

solder resist

occupied area

solder thief

H

A B

C

board direction


MLC747G1

4.000.40 E F

Hs

s

P(N 2)XD

G2

H

A B

C

board direction

Dimensions (in mm)

SOT338-1 SOT339-1 SOT340-1 SOT341-1

N = 16 leads 20 leads 24 leads 28 leads

P = 0.65 0.65 0.65 0.65

A = 9.15 9.15 9.15 9.15

B = 5.35 5.55 5.55 5.55

C = 1.90 1.80 1.80 1.80

D = 0.30 0.30 0.30 0.30

F = 6.15 6.30 6.30 6.30

G = 10.65 10.80 10.80 10.80

H = 4.25 4.75 5.25 6.25

K = 7.075 7.725 8.375 9.025

M = 2.00 2.00 2.00 2.00

placement accuracy for all types = 0.10

Fig.42 Wave soldering footprint for SOT338-1 (SSOP16), SOT339-1 (SSOP20),SOT340-1 (SSOP24) and SOT34-1 (SSOP28).


May 1999 4 - 29



Chapter 4

Fig.43 Reflow soldering footprint for SOT343N (footprint for SOT343R is mirror image).

Dimensions in mm.


MGS342

solder lands

solder resist

occupied area

solder paste

1.302.40

0.70 0.80

1.90

0.55(4×)

0.60(3×)

2.50

0.50(3×)

2.70

Fig.44 Wave soldering footprint for SOT343N (footprint for SOT343R is mirror image).

Dimensions in mm.


solder lands

solder resist

occupied area

0.90(3×)

MGS344

1.154.00


1.00

2.703.65

2.30 3.00


May 1999 4 - 30



Chapter 4



MSA440

1.00

0.70(3x)

1.55

2.60

3.40

0.95

3.15

3

1 2

1.20

0.60 (3x)0.70 (3x)

3.30

0.95

2.90

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.


book, full pagewidth

MSA420

4.605.20

2.80

4.70

1 2

3

1.20

3.401.20 (2x)


solder lands

solder resist

occupied area

Dimensions in mm.


May 1999 4 - 31



Chapter 4

Fig.47 Reflow soldering footprint for SOT353 (SC-88A).

Dimensions in mm.


MSA366

solder lands

solder resist

occupied area

solder paste

1.202.40

0.50(4×)

0.40 0.90 2.10

0.50(4×)

0.60(1×)

2.35

2.65


solder lands

solder resist

occupied area MSA425

1.153.75


1.000.30 4.000.704.50

2.652.25

2.70

Fig.48 Wave soldering footprint for SOT353 (SC-88A).

Dimensions in mm.


May 1999 4 - 32



Chapter 4


Dimensions in mm.


MSA432

solder lands

solder resist

occupied area

solder paste

1.202.40

0.50(4×)

0.40(2×) 0.90 2.10

0.50(4×)

0.60(2×)

2.35

2.65


solder lands

solder resist

occupied area MSA426

1.153.75


1.000.30 4.004.50

5.25


Dimensions in mm.


May 1999 4 - 33



Chapter 4



MSD057

solder lands

solder resist

occupied area

solder paste

10.50

7.407.50

1.50

1.70

10.60

1.201.301.55

5.08

10.85

0.30

2.15

8.35

2.25

4.60

0.203.00

4.85

7.95

8.15

8.075

8.275

5.40

1.50

Dimensions in mm.


May 1999 4 - 34



Chapter 4

Fig.52 Reflow soldering footprint for SOT409A (not suitable for wave soldering).


MGK390

1.87 (2×)

4.60

0.80 (2×)

0.60 (4×)

0.50 (12×)

1.00 (8×)

1.00 (9×)

3.607.38

Dimensions in mm.


May 1999 4 - 35



Chapter 4



MSD058

solder lands

solder resist

occupied area

solder paste

10.50

7.407.50

1.50

1.70

10.60

8.15

0.90

1.001.70(2×)

3.40

10.85

0.30

2.15

8.35

2.25

4.60

0.203.00

4.85

7.95

8.15

8.075

8.275

5.40

1.50

Dimensions in mm.


May 1999 4 - 36



Chapter 4



MSD059

solder lands

solder resist

occupied area

solder paste

10.50

7.407.50

1.50

1.70

10.60

8.92

0.700.801.27

(4×)2.54

10.85

0.30

2.15

8.35

2.25

4.60

0.203.00

4.85

7.95

8.15

8.075

8.275

5.40

1.50

Dimensions in mm.


May 1999 4 - 37



Chapter 4



MSD060

6.15

5.805.90

1.80

7.00

1.30D1.401.65

4.57F

B

6.125

4.725

6.50

0.30

1.00

1.15

5.65

2.30C

E3.60

6.00

A

4.60

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.


May 1999 4 - 38



Chapter 4



solder lands

solder resist

occupied area

solder paste

F = 0.95

2.825 0.45 0.55

1.60

1.95

3.45

1.703.103.20

3.30

MSC422

Dimensions in mm.



1.40

4.30

5.30

0.45

MSC423

1.45 4.455.05

solder lands

solder resist

occupied area

solder paste

Dimensions in mm.


CHAPTER 5THERMAL CONSIDERATIONS

page

Introduction 5 - 2

Part one: Thermal properties 5 - 2

Part two: Worked examples 5 - 7

Part three: Heat dissipation 5 - 15


May 1999 5 - 2


Thermal considerations Chapter 5

INTRODUCTION

The perfect power switch is not yet available. All powersemiconductors dissipate power internally both during theon-state and during the transition between the on and offstates. The amount of power dissipated internallygenerally speaking increases in line with the power beingswitched by the semiconductor. The capability of a switchto operate in a particular circuit will therefore depend uponthe amount of power dissipated internally and the rise inthe operating temperature of the silicon junction that thispower dissipation causes. It is therefore important thatcircuit designers are familiar with the thermalcharacteristics of power semiconductors and are able tocalculate power dissipation limits and junction operatingtemperatures.

This chapter is divided into three parts. Part One describesthe essential thermal properties of semiconductors andexplains the concept of a limit, in terms of continuousmode and pulse mode operation. Part Two gives workedexamples showing junction temperature calculations for avariety of applied power pulse waveforms. Part Threediscusses component heat dissipation and heatsinkdesign.

PART ONE: THERMAL PROPERTIES

The power dissipation limit

The maximum allowable power dissipation forms a limit tothe safe operating area of power transistors. Powerdissipation causes a rise in junction temperature whichwill, in turn, start chemical and metallurgical changes. Therate at which these changes proceed is exponentiallyrelated to temperature, and thus prolonged operation of apower transistor above its junction temperature rating isliable to result in reduced life. Operation of a device at, orbelow, its power dissipation rating (together with carefulconsideration of thermal resistances associated with thedevice) ensures that the junction temperature rating is notexceeded.

All power semiconductors have a power dissipationlimitation. For rectifier products such as diodes, thyristorsand triacs, the power dissipation rating can be easilytranslated in terms of current ratings; in the on-state thevoltage drop is well defined. Transistors are, however,somewhat more complicated. A transistor, be it a powerMOSFET or a bipolar, can operate in its on-state at anyvoltage up to its maximum rating depending on the circuitconditions. It is therefore necessary to specify a SafeOperating Area (SOA) for transistors which specifies thepower dissipation limit in terms of a series of boundaries in

the current and voltage plane. These operating areas areusually presented for mounting base temperatures of25 °C. At higher temperatures, operating conditions mustbe checked to ensure that junction temperatures are notexceeding the desired operating level.

Continuous power dissipation

The total power dissipation in a semiconductor may becalculated from the product of the on-state voltage and theforward conduction current. The heat dissipated in thejunction of the device flows through the thermal resistancebetween the junction and the mounting base, Rthj-mb. Thethermal equivalent circuit of Fig.1 illustrates this heat flow;Ptot can be regarded as a thermal current, and thetemperature difference between the junction and mountingbase ∆Tj-mb as a thermal voltage. By analogy with Ohm'slaw, it follows that:

(1)

Figure 2 shows the dependence of the maximum powerdissipation on the temperature of the mounting base.Ptotmax is limited either by a maximum temperaturedifference:

(2)

or by the maximum junction temperature Tjmax (Tmb K isusually 25 °C and is the value of Tmb above which themaximum power dissipation must be reduced to maintainthe operating point within the safe operating area).

In the first case, Tmb ≤ Tmb K:

(3)

Ptot

Tj Tmb–

Rthj mb–---------------------=

Fig.1 Heat transport in a transistor with powerdissipation constant with respect to time.

handbook, halfpage

MGK030

mbj

∆Tj-mbTmbTj

Ptot Ptot

junction mounting base

Rth j-mb

Tj mbmax–∆ Tjmax TmbK–=

PtotmaxK

Tj mbmax–∆Rthj mb–

-----------------------------=


May 1999 5 - 3



that is, the power dissipation has a fixed limit value(Ptot max K is the maximum DC power dissipation belowTmb K). If the transistor is subjected to a mounting-basetemperature Tmb 1, its junction temperature will be lessthan Tjmax by an amount (Tmb K – Tmb 1), as shown by thebroken line in Fig.2.

In the second case, Tmb > Tmb K:

(4)

that is, the power dissipation must be reduced as themounting base temperature increases along the slopingstraight line in Fig.2. Equation (4) shows that the lower thethermal resistance Rthj-mb, the steeper is the slope of theline. In this case, Tmb is the maximum mounting-basetemperature that can occur in operation.

Example

The following data is provided for a particular transistor.

Ptot max K = 75 W

Tjmax = 175 °C

Rthj-mb ≤ 2 K/W

The maximum permissible power dissipation forcontinuous operation at a maximum mounting-basetemperature of Tmb = 80 °C is required.

Note that the maximum value of Tmb is chosen to besignificantly higher than the maximum ambienttemperature to prevent an excessively large heatsinkbeing required.

Fig.2 Maximum DC power dissipation in atransistor as a function of themounting-base temperature.

handbook, halfpage

MGK031∆Tj-mb max

Tmb 1 Tmb K Tj maxTmb

00

Ptot max KPtot

Ptot max

Ptotmax

Tjmax Tmb–

Rthj mb–------------------------------=

From Equation (4) we obtain:

Provided that the transistor is operated within SOA limits,this value is permissible since it is below Ptot max K. Thesame result can be obtained graphically from the Ptot maxdiagram (Fig.3) for the relevant transistor.

Pulse power operation

When a power transistor is subjected to a pulsed load,higher peak power dissipation is permitted. The materialsin a power transistor have a definite thermal capacity, andthus the critical junction temperature will not be reachedinstantaneously, even when excessive power is beingdissipated in the device. The power dissipation limit maybe extended for intermittent operation. The size of theextension will depend on the duration of the operationperiod (that is, pulse duration) and the frequency withwhich operation occurs (that is, duty factor).

Ptotmax175 80–

2---------------------- W 47.5 W= =

Fig.3 Example of the determination of maximumpower dissipation.

handbook, halfpage

0 200

100

20

0

40

47.5

60

80

40 80 120 160Tmb (°C)

Ptot max(W)

MGK032


May 1999 5 - 4



If power is applied to a transistor, the device willimmediately start to warm up (see Fig.4). If the powerdissipation continues, a balance will be struck betweenheat generation and removal resulting in the stabilizationof Tj and ∆Tj-mb. Some heat energy will be stored by thethermal capacity of the device, and the stable conditionswill be determined by the thermal resistances associatedwith the transistor and its thermal environment. When thepower dissipation ceases, the device will cool (the heatingand cooling laws will be identical, see Fig.5). However, ifthe power dissipation ceases before the temperature ofthe transistor stabilizes, the peak values of Tj and ∆Tj-mbwill be less than the values reached for the same level ofcontinuous power dissipation (see Fig.6). If the secondpulse is identical to the first, the peak temperature attainedby the device at the end of the second pulse will be greaterthan that at the end of the first pulse. Further pulses willbuild up the temperature until some new stable situation isattained (see Fig.7). The temperature of the device in thisstable condition will fluctuate above and below the mean.If the upward excursions extend into the region ofexcessive Tj then the life expectancy of the device may bereduced. This can happen with high-power low-duty-factorpulses, even though the average power is below the DCrating of the device.

Fig.4 Heating of a transistor chip.

handbook, halfpage

MGK033power

on

steady statetemperature

time

tem

pera

ture

Tamb

Figure 8 shows a typical safe operating area for DCoperation of a power MOSFET. The correspondingrectangular- pulse operating areas with a fixed duty factor,δ = 0, and the pulse time tp as a parameter, are alsoshown. These boundaries represent the largest possibleextension of the operating area for particular pulse times.When the pulse time becomes very short, the powerdissipation does not have a limiting action and the pulsecurrent and maximum voltage form the only limits. Thisrectangle represents the largest possible pulse operatingarea.

Fig.5 Heating and cooling follow the same law.

handbook, halfpage

MGK034

poweroff

time

tem

pera

ture

Tamb

Fig.6 The peak temperature caused by a shortpower pulse can be less than steady-statetemperature resulting from the same power.

handbook, halfpage

MGK035power

onpower

off

time

tem

pera

ture

Tamb


May 1999 5 - 5



Fig.7 A train of power pulses increases theaverage temperature if the device does nothave time to cool between pulses.

handbook, halfpage

MGK036

endpulse 1

time

time

tem

pera

ture

pow

erdi

ssip

ated

2 31 4

Fig.8 DC and rectangular pulse operating areaswith fixed parameters δ = 0, tp andTmb = 25 °C.

handbook, halfpage102

1

10

10−1

MGK037

1 10 102 103VDS (V)

ID(A)

R DS(ON)

= V DS

/I D

100 ms

10 ms

1 ms

100 µs

tp = 10 µs

DC

A

B

Fig.9 Examples of the transient thermal impedance as a function of the pulse time with duty factor as parameter.

handbook, full pagewidth10

1

10−1

10−2

10−3

MGK038

10−6 10−5 10−4 10−3 10−2 10−1 1 10

tp

tp

T

PD

t

Tδ =

Zth j-mb(K/W)

0.5δ = 0.5

0.2

0.1

0.05

0.02

0

t (s)


May 1999 5 - 6



In general, the shorter the pulse and the lower thefrequency, the lower the temperature that the junctionreaches. By analogy with Equation (3), it follows that:

(5)

where Zthj-mb is the transient thermal impedance betweenthe junction and mounting base of the device. It dependson the pulse duration tp, and the duty factor δ, where:

(6)

and T is the pulse period. Figure 9 shows a typical familyof curves for thermal impedance against pulse duration,with duty factor as a parameter.

Again, the maximum pulse power dissipation is limitedeither by the maximum temperature difference ∆Tj-mb max(Equation (2)), or by the maximum junction temperatureTjmax, and so by analogy with Equations (3)and (4):

(7)

when Tmb ≤ Tmb K, and:

(8)

when Tmb > Tmb K. That is, below a mounting-basetemperature of Tmb K, the maximum power dissipation hasa fixed limit value; and above Tmb K, the power dissipationmust be reduced linearly with increasing mounting-basetemperature.

Short pulse duration (Fig.10a)

As the pulse duration becomes very short, the fluctuationsof junction temperature become negligible, owing to theinternal thermal capacity of the transistor. Consequently,the only factor to be considered is the heating of thejunction by the average power dissipation; that is:

(9)

The transient thermal impedance becomes:

(10)

The Zthj-mb curves approach this value asymptotically as tpdecreases. Figure 9 shows that, for duty factors in therange 0.1 to 0.5, the limit values given by Equation (10)have virtually been reached at tp = 10–6 s.

Ptot M

Tj Tmb–

Zthj mb–---------------------=

δtpT----=

Ptot max K

∆Tj mbmax–

Zthj mb–-----------------------------=

Ptot M max

Tjmax Tmb–

Zthj mb–------------------------------=

Ptot av( ) δPtotM=

Zthj mb–tp 0→lim δRthj mb–=

Long pulse duration (Fig.10b)

As the pulse duration increases, the junction temperatureapproaches a stationary value towards the end of a pulse.The transient thermal impedance tends to the thermalresistance for continuous power dissipation; that is:

(11)

Figure 9 shows that Zthj-mb approaches this value as tpbecomes large. In general, transient thermal effects die outin most power transistors within 0.1 to 1.0 seconds. Thistime depends on the material and construction of the case,the size of the chip, the way it is mounted, and otherfactors. Power pulses with a duration in excess of this timehave approximately the same effect as a continuous load.

Fig.10 Three limit cases of rectangular pulseloads: (a) short pulse duration, (b) longpulse duration, (c) single-shot pulse.

handbook, halfpage

MGK039

Tmb

Tj

P

(a)

Tmb

Tj

P

(b)

tp

tp

t

t

t

t

Tmb

P

(c)

tp

t

t

Ptot M

Ptot M

Ptot M Zth j-mb = Ptot M Rth j-mb

Ptot M Zth j-mb = Ptot Mδ Rth j-mb

Ptot M

Ptot M Zth j-mb(δ = 0.01)

Zthj mb–tp ∞→lim Rthj mb–=


May 1999 5 - 7



Single-short pulse (Fig.10c)

As the duty factor becomes very small, the junction tendsto cool down completely between pulses so that eachpulse can be treated individually. When considering singlepulses, the Zthj-mb values for δ = 0 (Fig.9) give sufficientlyaccurate results.

PART TWO: WORKED EXAMPLES

Calculating junction temperatures

Most applications which include power semiconductorsusually involve some form of pulse mode operation. Thissection gives several worked examples showing howjunction temperatures can be simply calculated. Examplesare given for a variety of waveforms:

1. periodic waveforms

2. single-shot waveforms

3. composite waveforms

4. a pulse burst

5. non-rectangular pluses.

From the point of view of reliability, it is most important toknow what the peak junction temperature will be when the

power waveform is applied and also what the averagejunction temperature is going to be.

Peak junction temperature will usually occur at the end ofan applied pulse and its calculation will involve transientthermal impedance. The average junction temperature(where applicable) is calculated by working out theaverage power dissipation using the DC thermalresistance.

When considering the junction temperature in a device, thefollowing formula is used:

(12)

where ∆Tj-mb is found from a rearrangement of Equation(7). In all the following examples the mounting basetemperature (Tmb) is assumed to be 75 °C.

Periodic rectangular pulse

Figure 11 shows an example of a periodic rectangularpulse. This type of pulse is commonly found in switchingapplications. 100 W is dissipated every 400 µs for a periodof 20 µs, representing a duty cycle (δ) of 0.05.

Tj Tmb T∆ j mb–+=

Fig.11 Periodic rectangular pulse.


MGK040

100

60

40

20

0

80

1006040200 80 460440420400 480

power(W)

time (µs)

Tmb

Tj peak

1006040200 80 460440420400 480time (µs)

Tj


May 1999 5 - 8



The peak junction temperature is calculated as follows:

Peak T j:

Average T j:

t 2 5–×10 s=

P 100 W=

δ 20100---------- 0.05= =

Zthj mb– 0.12 K W⁄=

Tj mb–∆ P Zthj mb–× 100 0.12× 12 Co

= = =

Tj Tmb Tj mb–∆+ 75 12+ 87 Co

= = =

Pav P δ× 100 0.05× 5 W= = =

Tj mb av( )–∆ Pav Zthj mb δ 1=( )–× 5 2× 10 Co

= = =

Tj av( ) Tmb Tj mb av( )–∆+ 75 10+ 85 Co

= = =

The value for Zth j-mb is taken from the δ = 0.05 curveshown in Fig.12 (This diagram repeats Fig.9 but has beensimplified for clarity). The above calculation shows that thepeak junction temperature will be 85 °C.

Single shot rectangular pulse

Figure 13 shows an example of a single shot rectangularpulse. The pulse used is the same as in the previousexample, which should highlight the differences betweenperiodic and single shot thermal calculations. For a singleshot pulse, the time period between pulses is infinity, i.e.the duty cycle δ = 0. In this example 100 W is dissipated fora period of 20 µs. To work out the peak junctiontemperature the following steps are used:

t 2 5–×10 s=

P 100 W=

δ 0=

Zthj mb– 0.04 K/W=

Tj mb–∆ P Zthj mb–× 100 0.04× 4 °C= = =

Fig.12 Thermal impedance curves for δ = 0.05 and δ = 0.


1

10−1

10−2

10−3

MGK041

10−6 10−5 10−4 10−3 10−2 10−1 1 10

tp

tp

T

PD

t

Tδ =

t (s)

Zth j-mb(K/W)

0

δ = 0.05

0.04

0.12


May 1999 5 - 9



The value for Zth j-mb is taken from the δ = 0 curve shownin Fig.12. The above calculation shows that the peakjunction temperature will be 4 °C above the mounting basetemperature.

For a single shot pulse, the average power dissipated andaverage junction temperature are not relevant.

Composite rectangular pulse

In practice, a power device frequently has to handlecomposite waveforms, rather than the simple rectangularpulses shown so far. This type of signal can be simulatedby superimposing several rectangular pulses which have acommon period, but both positive and negativeamplitudes, in addition to suitable values of tp and δ.

By way of an example, consider the composite waveformshown in Fig.14. To show the way in which the methodused for periodic rectangular pulses is extended to covercomposite waveforms, the waveform shown has beenchosen to be an extension of the periodic rectangularpulse example. The period is 400 µs, and the waveformconsists of three rectangular pulses, namely 40 W for10 µs, 20 W for 150 µs and 100 W for 20 µs. The peakjunction temperature may be calculated at any point in thecycle. To be able to add the various effects of the pulsesat this time, all the pulses, both positive and negative, mustend at time tx in the first calculation and ty in the secondcalculation. Positive pulses increase the junctiontemperature, while negative pulses decrease it.

Fig.13 Single shot pulse.

handbook, halfpage

MGK042

time (µs)

time (µs)

100

60

40

20

0

80

1006040200 80

power(W)

Tmb

Tj peak

1006040200 80

Tj

Calculation for time t x

(13)

In Equation (15), the values for P1, P2 and P3 are known:P1 = 40 W, P2 = 20 W and P3 = 100 W. The Zth values aretaken from Fig.9. For each term in the equation, theequivalent duty cycle must be worked out. For instance thefirst superimposed pulse in Fig.14 lasts for a time t1 =180 µs, representing a duty cycle of 180/400 = 0.45 = δ.These values can then be used in conjunction with Fig.9 tofind a value for Zth, which in this case is 0.9 K/W. Table 1gives the values calculated for this example.

Table 1 Composite pulse parameters for time tx

Substituting these values into Equation (15) for Tj-mb@xgives:

Repetitive:

Single shot:

Hence the peak values of Tj are 104.4 °C for the repetitivecase, and 80.9 °C for the single shot case.

t1

180 µs

t2

170 µs

t3

150 µs

t4

20 µs

Repetitive

T = 400 µs

δ

Zth

0.450

0.900

0.425

0.850

0.375

0.800

0.050

0.130

Single shot

T = ∞

δ

Zth

0.000

0.130

0.000

0.125

0.000

0.120

0.000

0.040

Tj mb@x+∆ P1 Zthj mb t1( )–× P2 Zthj mb t3( )–×

P3 Zthj mb t4( )–× P1 Zthj mb t2( )–×–

P2 Zthj mb t4( )–×–

+

+

=

Tj mb@x– 40 0.9 20 0.85100 0.13 40 0.85×–×+

×+×20 0.13×

29.4 °C=–

=∆

Tj Tmb Tj mb–∆+ 75 29.4+ 104.4 °C= = =

Tj mb@x–40 0.13 20 0.125100 0.04 40 0.125×–×+

×+×20 0.04×

5.9 °C=–

=∆

Tj Tmb Tj mb–∆+ 75 5.9+ 80.9 °C= = =


May 1999 5 - 10



Fig.14 Periodic composite waveform.


MGK043

tx

t1

t3t2

t4

t5

t7t6

t8

power (W)

power (W)

power (W)

00 20

P3

P2

P1

P1

P2

40 60 80 100 120 140 160 180 200 220 360

time (µs)

time (µs)

time (µs)

380 400 420 440 460 480 500

20

40

60

80

100

100

120

140

160

180

200

20

0

60

40

20

40

60

80

100

120

140

160

20

0

60

40

80

120

100

20

40

60

80

ty

P1

P3

P2

P2

P3


May 1999 5 - 11



Calculation for time t y

(14)

Where Zth-mb(t) is the transient thermal impedance for apulse time t.

Table 2 Composite pulse parameters for time ty

Substituting these values into Equation (15) for Tj-mb(y)gives:

Repetitive:

t5

380 µs

t6

250 µs

t7

230 µs

t8

10 µs

Repetitive

T = 400 µs

δ

Zth

0.950

1.950

0.625

1.300

0.575

1.250

0.025

0.080

Single shot

T = ∞

δ

Zth

0.000

0.200

0.000

0.160

0.000

0.150

0.000

0.030

Tj mb@y+∆ P2 Zthj mb t5( )–× P3 Zthj mb t6( )–×

P1 Zthj mb t8( )–× P2 Zthj mb t6( )–×–


+

+

=

Tj mb y( )–

20 1.95 100 1.3

40 0.08 20 1.3×–×+

×+×

100 1.25×

21.2 Co

=

–

=

∆

Tj Tmb Tj mb–∆+ 75 21.2+ 96.2 Co

= = =

Single shot:

Hence the peak values of Tj are 96.2 °C for the repetitivecase, and 78 °C for the single shot case.

The average power dissipation and the average junctiontemperature can be calculated as follows:

Clearly, the junction temperature at time tx should behigher than that at time ty, and this is proven in the abovecalculations.

Tj mb@y–

20 0.2 100 0.16

40 0.03 20 0.16×–×+

×+×

100 0.15×

3 Co

=

–

=

∆

Tj Tmb Tj mb–∆+ 75 3+ 78 Co

= = =

Pav25 10 5 130 20 100×+×+×

400---------------------------------------------------------------------------

7.25 W=

=

Tj mb av( )–∆ Pav Zth mb δ 1=( )–×

7.25 2× 14.5 °C

=

= =

Tj av( )∆ Tmb Tj mb av( )–∆+

75 14.5+ 89.5 °C

=

= =


May 1999 5 - 12



Burst pulses

Power devices are frequently subjected to a burst ofpulses. This type of signal can be treated as a compositewaveform and as in the previous example simulated bysuperimposing several rectangular pulses which have acommon period, but both positive and negativeamplitudes, in addition to suitable values of tp and δ.

Consider the waveform shown in Fig.15. The period is240 µs, and the burst consists of three rectangular pulsesof 100 W power and 20 ms duration, separated by 30 ms.The peak junction temperature will occur at the end ofeach burst at time t = tx = 140 µs. To be able to add thevarious effects of the pulses at this time, all the pulses,both positive and negative, must end at time tx. Positivepulses increase the junction temperature, while negativepulses decrease it.

(15)

where Zthj-mb(t) is the transient thermal impedance for apulse time t.

Tj mb@x+∆ P Zthj mb t1( )–× P Zthj mb t3( )–×

P Zthj mb t5( )–× P Zthj mb t2( )–×–

P Zthj mb t4( )–×–

+

+

=

The Zth values are taken from Fig.9. For each term in theequation, the equivalent duty cycle must be worked out.These values can then be used in conjunction with Fig.9 tofind a value for Zth. Table 3 gives the values calculated forthis example.

Table 3 Burst Mode pulse parameters

Substituting these values into Equation (17) gives:

Repetitive:

t1

120 µs

t2

100 µs

t3

70 µs

t4

50 µs

t5

20 µs

Repetitive

T = 240 µs

δ

Zth

0.500

1.100

0.420

0.800

0.290

0.600

0.210

0.430

0.083

0.210

Single shot

T = ∞

δ

Zth

0.000

0.100

0.000

0.090

0.000

0.075

0.000

0.060

0.000

0.040

Tj mb@x– 100 1.10 100 0.60100 0.21 100 0.80×–×+

×+×100 0.43×

68 °C=–

=∆

Tj 75 68+ 143 °C= =

Fig.15 Burst mode waveform.


MGK044

100

150

200

250

300

350

100

50

0

50

300

250

200

150

350

50

100

150

00 20 40

power(W)

60 80 100 120

t5

t3

t1

t2

t4

140 160

T = 240 µs

time (µs)

time (µs)

240 260 280 300


May 1999 5 - 13



Single Shot:

Hence the peak value of Tj is 143 °C for the repetitive caseand 81.5 °C for the single shot case. To calculate theaverage junction temperature Tj(av):

Tj mb@x– 100 0.10 100 0.075100 0.04 100 0.09×–×+

×+×100 0.06×

6.5 °C=–

=∆

Tj 75 6.5+ 81.5 °C= =

Pav3 100 20××

240--------------------------------

25 W=

=


25 2× 50 °C

=

= =

Tj av( )∆ 75 50+ 125 °C= =

The above example for the repetitive waveform highlightsa case where the average junction temperature (125 °C) iswell within limits but the composite pulse calculation showsthe peak junction temperature to be significantly higher.For reasons of improved long term reliability it is usual tooperate devices with a peak junction temperature below125 °C.

Non-rectangular pulses

So far, the worked examples have only coveredrectangular waveforms. However, triangular, trapezoidaland sinusoidal waveforms are also common. In order toapply the above thermal calculations to non rectangularwaveforms, the waveform is approximated by a series ofrectangles. Each rectangle represents part of thewaveform. The equivalent rectangle must be equal in areato the section of the waveform it represents (i.e. the sameenergy) and also be of the same peak power. Withreference to Fig.16, a triangular waveform has beenapproximated to one rectangle in the first example, andtwo rectangles in the second. Obviously, increasing thenumber of sections the waveform is split into will improvethe accuracy of the thermal calculations.

Fig.16 Non-rectangular waveform.


MGK045

00 20 40 60 80 100

10

20

30

40

50

60

70

80

90

100

20

30

40

50

20

10

0

10

30

00 20 40 60 80 100

10

20

30

40

50

60

70

80

90

100

20

30

40

50

t3

P3

P2

P1

t2

t120

10

0

10

30


May 1999 5 - 14



In the first example, there is only one rectangular pulse, ofduration 50 µs, dissipating 50 W. So again using Equation(14) and a rearrangement of Equation (7):

Single shot:

10% duty cycle:

50% duty cycle:

When the waveform is split into two rectangular pulses:

(16)

For this example P1 = 25 W, P2 = 25 W, P3 = 50 W.Table 4 shows the rest of the parameters.

Table 4 Non-rectangular pulse calculations

t1

75 µs

t2

50 µs

t3

37.5 µs

Single shot

T = ∞

δ

Zth

0.000

0.085

0.000

0.065

0.000

0.055

10% duty cycle

T = 1000 µs

δ

Zth

0.075

0.210

0.050

0.140

0.037

0.120

50% duty cycle

T = 200 µs

δ

Zth

0.375

0.700

0.250

0.500

0.188

0.420

T∆ j mb– Ptot M Zthj mb–×=

T∆ j mb– 50 0.065× 3.25 °C= =

T∆ jpeak 75 3.25+ 78.5 °C= =

T∆ j mb– 50 0.230× 11.5 °C= =

T∆ jpeak 75 11.5+ 86.5 °C= =

T∆ j mb– 50 1.000× 50 °C= =

T∆ jpeak 75 50+ 125 °C= =

Tj m– b∆ P3 Zthj mb t3( )–× P1 Zthj mb t2( )–×


+=

Substituting these values into Equation (18) gives:

Single shot:

10% Duty cycle

50% Duty cycle

To calculate the average junction temperature:

Conclusion to part two

A method has been presented to allow the calculation ofaverage and peak junction temperatures for a variety ofpulse types. Several worked examples have showncalculations for various common waveforms. The methodfor non-rectangular pulses can be applied to any waveshape, allowing temperature calculations for waveformssuch as exponential and sinusoidal power pulses. Forpulses such as these, care must be taken to ensure thatthe calculation gives the peak junction temperature, as itmay not occur at the end of the pulse. In this instanceseveral calculations must be performed with differentendpoints to find the maximum junction temperature.

T∆ j mb– 50 0.055 25 0.85 25 0.65×–×+×3.25 °C

==

T∆ jpeak 75 3.25+ 78.5 °C= =

T∆ j mb– 50 0.12 25 0.21 25 0.14×–×+×7.75 °C

==

T∆ jpeak 75 7.75+ 82.5 °C= =

T∆ j mb– 50 0.42 25 0.7 25 0.5×–×+×26 °C

==

T∆ jpeak 75 26+ 101 °C= =

Pav50 50×1000

-------------------

2.5 W=

=


2.5 2× 5 °C

=

= =

Tj av( )∆ 75 5+ 80 °C= =


May 1999 5 - 15



PART 3: HEAT DISSIPATION

All semiconductor failure mechanisms are temperaturedependent and so the lower the junction temperature, thehigher the reliability of the circuit. Thus our data specifiesa maximum junction temperature which should not beexceeded under the worst probable conditions. However,derating the operating temperature from Tjmax is alwaysdesirable to improve the reliability still further. The junctiontemperature depends on both the power dissipated in thedevice and the thermal resistances (or impedances)associated with the device. Thus careful consideration ofthese thermal resistances (or impedances) allows the userto calculate the maximum power dissipation that will keepthe junction temperature below a chosen value.

The formulae and diagrams given in this part can only beconsidered as a guide for determining the nature of aheatsink. This is because the thermal resistance of aheatsink depends on numerous parameters which cannotbe predetermined. They include the position of thetransistor on the heatsink, the extent to which air can flowunhindered, the ratio of the lengths of the sides of theheatsink, the screening effect of nearby components, andheating from these components. It is always advisable tocheck important temperatures in the finished equipmentunder the worst probable operating conditions. The morecomplex the heat dissipation conditions, the moreimportant it becomes to carry out such checks.

Heat flow path

The heat generated in a semiconductor chip flows byvarious paths to the surroundings. Small signal devices donot usually require heatsinking; the heat flows from thejunction to the mounting base which is in close contact withthe case. Heat is then lost by the case to the surroundingsby convection and radiation (Fig.17a). Power transistors,however, are usually mounted on heatsinks because ofthe higher power dissipation they experience. Heat flowsfrom the transistor case to the heatsink by way of contactpressure, and the heatsink loses heat to the surroundingsby convection and radiation, or by conduction to coolingwater (Fig.17b). Generally air cooling is used so that theambient referred to in Fig.17 is usually the surrounding air.Note that if this is the air inside an equipment case, theadditional thermal resistance between the inside andoutside of the equipment case should be taken intoaccount.

Contact thermal resistance R th mb-h

The thermal resistance between the transistor mountingbase and the heatsink depends on the quality and size ofthe contact areas, the type of any intermediate platesused, and the contact pressure. Care should be takenwhen drilling holes in heatsinks to avoid burring anddistorting the metal, and both mating surfaces should beclean. Paint finishes of normal thickness, up to 50 µm (asa protection against electrolytic voltage corrosion), barelyaffect the thermal resistance. Transistor case and heatsinksurfaces can never be perfectly flat, and so contact willtake place on several points only, with a small air-gap overthe rest of the area. The use of a soft substance to fill thisgap lowers the contact thermal resistance. Normally, thegap is filled with a heatsinking compound which remainsfairly viscous at normal transistor operating temperaturesand has a high thermal conductivity. The use of such acompound also prevents moisture from penetratingbetween the contact surfaces. Proprietary heatsinkingcompounds are available which consist of a siliconegrease loaded with some electrically insulating goodthermally conducting powder such as alumina.The contactthermal resistance Rth mb-h is usually small with respect to(Rth j-mb +Rth h-amb) when cooling is by natural convection.However, the heatsink thermal resistance Rth h-amb can bevery small when either forced ventilation or water coolingare used, and thus a close thermal contact between thetransistor case and heatsink becomes particularlyimportant.

Fig.17 Thermal resistance in the heat flowprocess: (a) without heatsink, (b) withheatsink.

handbook, halfpage Rth j-mb ambientchip

TmbTj

Rth mb-amb

Tamb

Rth mb-h

heatsink

Rth h-amb

Rth mb-amb

Rth j-mbchip

Tj

ambientTambTmb

MGK046

a.

b.


May 1999 5 - 16



Thermal resistance calculations

Fig.17a shows that, when a heatsink is not used, the totalthermal resistance between junction and ambient is givenby:

(17)

However, power transistors are generally mounted on aheatsink since Rth j-amb is not usually small enough tomaintain temperatures within the chip below desiredlevels.

Fig.17b shows that, when a heatsink is used, the totalthermal resistance is given by:

(18)

Note that the direct heat loss from the transistor case to thesurroundings through Rth mb-amb is negligibly small.

The first stage in determining the size and nature of therequired heatsink is to calculate the maximum heatsinkthermal resistance Rth h-amb that will maintain the junctiontemperature below the desired value.

Continuous operation

Under DC conditions, the maximum heatsink thermalresistance can be calculated directly from the maximumdesired junction temperature.

(19)

and

(20)

Combining Equations (18) and (19) gives:

(21)

and substituting Equation (20) into Equation (21) gives:

(22)

The values of Rth j-mb and Rth mb-h are given in thepublished data. Thus, either Equation (21) or Equation(22) can be used to find the maximum heatsink thermalresistance.

Rth j-amb Rth j-mb Rth mb-amb+=

Rth j-amb Rth j-mb Rth mb-h Rth h-amb+ +=

Rth j-amb

Tj Tamb–

Ptot av( )------------------------=

Rth j-mb

Tj Tmb–

Ptot av( )---------------------=

Rth h-amb

Tj Tamb–

Ptot av( )------------------------ Rth j-mb– Rth mb-h–=

Rth h-amb

Tmb Tamb–

Ptot av( )----------------------------- Rth mb-h–=

Intermittent operation

The thermal equivalent circuits of Fig.17 are inappropriatefor intermittent operation, and the thermal impedanceZth j-mb should be considered.

thus:

(23)

The mounting-base temperature has always beenassumed to remain constant under intermittent operation.This assumption is known to be valid in practice providedthat the pulse time is less than about one second. Themounting-base temperature does not change significantlyunder these conditions as indicated in Fig.18. This isbecause heatsinks have a high thermal capacity and thusa high thermal time-constant.

Thus Equation (22) is valid for intermittent operation,provided that the pulse time is less than one second. Thevalue of Tmb can be calculated from Equation (23), and theheatsink thermal resistance can be obtained fromEquation (22).

PtotM

Tj Tmb–

Zth j-mb---------------------=

Tmb Tj PtotM Zth j-mb×–=

Fig.18 Variation of junction and mounting basetemperature when the pulse time is smallcompared with the thermal time-constant ofthe heatsink.

handbook, halfpage

MGK047

Ptot M Zth j-mb

Ptot(av)(Rth mb-h + Rth h-amb)

Tamb

Tmb

T

Ptot(av)

PPtot M

tp

Tj


May 1999 5 - 17



The thermal time constant of a transistor is defined as thattime at which the junction temperature has reached 70% ofits final value after being subjected to a constant powerdissipation at a constant mounting base temperature.

Now, if the pulse duration tp exceeds one second, thetransistor is temporarily in thermal equilibrium since sucha pulse duration is significantly greater than the thermaltime-constant of most transistors. Consequently, for pulsetimes of more than one second, the temperature differenceTj -Tmb reaches a stationary final value (Fig.19) andEquation (23) should be replaced by:

(24)

In addition, it is no longer valid to assume that themounting base temperature is constant since the pulsetime is also no longer small with respect to the thermal timeconstant of the heatsink.

Smaller heatsinks for intermittent operation

In many instances, the thermal capacity of a heatsink canbe utilized to design a smaller heatsink for intermittentoperation than would be necessary for the same level ofcontinuous power dissipation. The average powerdissipation in Equation (22) is replaced by the peak powerdissipation to obtain the value of the thermal impedancebetween the heatsink and the surroundings.

Tmb Tj PtotM Rth j-mb×–=

Fig.19 Variation of junction and mounting basetemperature when the pulse time is notsmall compared with he thermaltime-constant of the heatsink.

handbook, halfpage

MGK048Tamb

t

T

P

Ptot M Zth h-amb

Ptot M Rth j-mb

Ptot M

tp

Tmb

Tj

(25)

The value of Zth h-amb will be less than the comparablethermal resistance and thus a smaller heatsink can bedesigned than that obtained using the too large valuecalculated from Equation (22).

Heatsinks

Three varieties of heatsink are in common use: flat plates(including chassis), diecast finned heatsinks, and extrudedfinned heatsinks. The material normally used for heatsinkconstruction is aluminium although copper may be usedwith advantage for flat-sheet heatsinks. Small finned clipsare sometimes used to improve the dissipation oflow-power transistors.

Heatsink finish

Heatsink thermal resistance is a function of surface finish.A painted surface will have a greater emissivity than abright unpainted one. The effect is most marked with flatplate heatsinks, where about one third of the heat isdissipated by radiation. The colour of the paint used isrelatively unimportant, and the thermal resistance of a flatplate heatsink painted gloss white will be only about 3%higher than that of the same heatsink painted matt black.With finned heatsinks, painting is less effective since heatradiated from most fins will fall on adjacent fins but it is stillworthwhile. Both anodising and etching will decrease thethermal resistivity. Metallic type paints, such as aluminiumpaint, have the lowest emissivities, although they areapproximately ten times better than a bright aluminiummetal finish.

Flat-plate heatsinks

The simplest type of heatsink is a flat metal plate to whichthe transistor is attached. Such heatsinks are used both inthe form of separate plates and as the equipment chassisitself. The thermal resistance obtained depends on thethickness, area and orientation of the plate, as well as onthe finish and power dissipated. A plate mountedhorizontally will have about twice the thermal resistance ofa vertically mounted plate. This is particularly importantwhere the equipment chassis itself is used as the heatsink.In Fig.20, the thermal resistance of a blackened heatsinkis plotted against surface area (one side) with powerdissipation as a parameter. The graph is accurate to within25% for nearly square plates, where the ratio of the lengthsof the sides is less than 1.25:1.

Zth h-amb

Tmb Tamb–

PtotM----------------------------- Rth mb-h–=


May 1999 5 - 18



Finned heatsinks

Finned heatsinks may be made by stacking flat plates,although it is usually more economical to use ready madediecast or extruded heatsinks. Since most commerciallyavailable finned heatsinks are of reasonably optimumdesign, it is possible to compare them on the basis of theoverall volume which they occupy. This comparison ismade in Fig.21 for heatsinks with their fins mountedvertically; again, the graph is accurate to 25%.

Fig.20 Generalized heatsink characteristics: flatvertical black aluminium, 3 mm thick,approximately square.


10

1

MGK049

102 103 104 105

area of one side (mm2)

heat

sink

ther

mal

res

ista

nce

(°C

/W)

3 W

30 W

Heatsink dimensions

The maximum thermal resistance through which sufficientpower can be dissipated without damaging the transistorcan be calculated as discussed previously. This sectionexplains how to arrive at a type and size of heatsink thatgives a sufficiently low thermal resistance.

Natural air cooling

The required size of aluminium heatsinks - whether flat orextruded (finned) can be derived from the nomogram inFig.22. Like all heatsink diagrams, the nomogram does notgive exact values for Rth h-amb as a function of thedimensions since the practical conditions always deviateto some extent from those under which the nomogram wasdrawn up. The actual values for the heatsink thermalresistance may differ by up to 10% from the nomogramvalues. Consequently, it is advisable to take temperaturemeasurements in the finished equipment, particularlywhere the thermal conditions are critical.

Fig.21 Generalized heatsink characteristics:blackened aluminium finned heatsinks.


106

105

104

103

MGK050

heatsink thermal resistance (°C/W)10−1 1 10 102

over

all v

olum

e of

hea

tsin

k (s

pace

occ

upie

d) (

mm

3 )

100 W

10 W


May 1999 5 - 19



Fig.22 Heatsink nomogram.


MGK051

105

104

103

10 102 103

102

10

1

SOT93TO220SOT82

1 mm2 mm3 mm

FLAT PLATE

bright horizontalbright vertical

blackened horizontalblackened vertical

1 W2 W5 W10 W20 W50 W100 W

EXTRUDED

30D

40D

length of extruded heatsink (mm)

area ofone side(mm2)


May 1999 5 - 20



The conditions to which the nomogram applies are asfollows:

• natural air cooling (unimpeded natural convection withno build up of heat)

• ambient temperature about 25 °C, measured about50 mm below the lower edge of the heatsink (seeFig.23)

• single mounting (that is, not affected by nearbyheatsinks)

• atmospheric pressure about 10 N/m2

• distance between the bottom of the heatsink and thebase of a draught-free space about 100 mm (seeFig.23)

• transistor mounted roughly in the centre of the heatsink(this is not so important for finned heatsinks because ofthe good thermal conduction).

The appropriately-sized heatsink is found as follows.

1. Enter the nomogram from the right hand side ofsection 1 at the appropriate Rth h-amb value (seeFig.24). Move horizontally to the left, until theappropriate curve for orientation and surface finish isreached.

2. Move vertically upwards to intersect the appropriatepower dissipation curve in section 2.

Fig.23 Conditions applicable to nomogram shownin Fig.22.

handbook, halfpage

MGK052

Tamb Tamb

Th

approx100 mm

approx50 mm

3. Move horizontally to the left into section 3 for thedesired thickness of a flat-plate heatsink, or the type ofextrusion.

4. If an extruded heatsink is required, move verticallyupwards to obtain its length (Figs 25a and 25b givethe outlines of the extrusions).

5. If a flat-plate heatsink is to be used, move verticallydownwards to intersect the appropriate curve forenvelope type in section 4.

6. Move horizontally to the left to obtain heatsink area.

7. The heatsink dimensions should not exceed the ratioof 1.25:1.

Fig.24 Use of the heatsink nomogram.

MGK053

length of extrusion (mm)

heatsink area(mm2)

extrudedheatsink

powerdissipation

orientation andsurface

type ofenvelope

thickness offlat heatsink

1

2

4

3

Rth h-amb(°C/W)


May 1999 5 - 21



The curves in section 2 take account of the non linearnature of the relationship between the temperature dropacross the heatsink and the power dissipation loss. Thus,at a constant value of the heatsink thermal resistance, thegreater the power dissipation, the smaller is the requiredsize of heatsink. This is illustrated by the followingexample.

Example

An extruded heatsink mounted vertically and with apainted surface is required to have a maximum thermalresistance of Rth h-amb = 2.6 °C/W at the following powers:

a) P tot (av) = 5 W

b) Ptot (av) = 50 W

Enter the nomogram at the appropriate value of thethermal resistance in section 1, and via either the 50 W or5 W line in section 2, the appropriate lengths of theextruded heatsink 30D are found to be:

a) length = 110 mm

b) length = 44 mm

Fig.25 Outline of extrusion: a = 30D, b = 40D.

handbook, halfpage

MGK054

59.7max

109 max

4.5

5.5

34.5 min

109 max

34.5 min

32max

27max

a.

b.Dimensions in mm.

Case (b) requires a shorter length since the temperaturedifference is ten times greater than in case (a).

As the ambient temperature increases beyond 25 °C, sodoes the temperature of the heatsink and thus the thermalresistance (at constant power) decreases owing to theincreasing role of radiation in the heat removal process.Consequently, a heatsink with dimensions derived fromFig.22 at Tamb > 25 °C will be more than adequate. If themaximum ambient temperature is less than 25 °C, thenthe thermal resistance will increase slightly. However, anyincrease will lie within the limits of accuracy of thenomogram and within the limits set by other uncertaintiesassociated with heatsink calculations.

For heatsinks with relatively small areas, a considerablepart of the heat is dissipated from the transistor case. Thisis why the curves in section 4 tend to flatten out withdecreasing heatsink area. The area of extruded heatsinksis always large with respect to the surface of the transistorcase, even when the length is small.

If several transistors are mounted on a common heatsink,each transistor should be associated with a particularsection of the heatsink (either an area or length accordingto type) whose maximum thermal resistance is calculatedfrom Equations (21) or (22); that is, without taking the heatproduced by nearby transistors into account. From thesum of these areas or lengths, the size of the commonheatsink can then be obtained. If a flat heatsink is used,the transistors are best arranged as shown in Fig.26. Themaximum mounting base temperatures of transistors insuch a grouping should always be checked once theequipment has been constructed.

Fig.26 Arrangement of two equally loadedtransistors mounted on a common heatsink.

handbook, halfpage

a = 2b

b

MGK055


May 1999 5 - 22



Forced air cooling

If the thermal resistance needs to be much less than1 °C/W, or the heatsink not too large, forced air cooling bymeans of fans can be provided. Apart from the size of theheatsink, the thermal resistance now only depends on thespeed of the cooling air. Provided that the cooling air flowsparallel to the fins and with sufficient speed (>0.5 m/s), thethermal resistance hardly depends on the powerdissipation and the orientation of the heatsink. Note thatturbulence in the air current can result in practical valuesdeviating from theoretical values.

Figure 27 shows the form in which the thermal resistancesfor forced air cooling are given in the case of extrudedheatsinks. It also shows the reduction in thermalresistance or length of heatsink which may be obtainedwith forced air cooling.

The effect of forced air cooling in the case of flat heatsinksis seen from Fig.28. Here, too, the dissipated power andthe orientation of the heatsink have only a slight effect onthe thermal resistance, provided that the air flow issufficiently fast.

Fig.27 Thermal resistance of a finned heatsink (type 40D) as a function of the length, with natural and forced aircooling.


0 350

2natural

convection(vertical)

forcedcooling

blackened

P = 3 W

P = 10 W

P = 30 W

P = 100 W

1 m/s2 m/s5 m/s

0

1

2.5

0.5

1.5

250 30050 200100 150

MGK056

length (mm)

Rth h-amb(K/W)


May 1999 5 - 23



Fig.28 Thermal resistance of heatsinks (2 mm thick copper or 3 mm aluminium) under natural convection andforced cooling conditions, with a SOT93 package.


00 2 000 4 000 6 000 8 000 10 000 12 000 14 000

2

4

6

8

MGK057

Rth h-amb(°C/W)

orientation

vertical

any


30 W

v = 1 m/s

5 m/s

P = 1 W

3 W

blackened

forcedcooling

10

00 2 000 4 000 6 000 8 000 10 000 12 000 14 000

2

4

6

8

Rth h-amb(°C/W)

orientation

vertical

any


10 W

30 W

v = 1 m/s

2 m/s

5 m/s

P = 1 W

3 W

bright

forcedcooling

2 m/s

10 W

natural convection

natural convection


May 1999 5 - 24



Conclusion to part three

The majority of power transistors require heatsinking, andwhen the maximum thermal resistance that will maintainthe device’s junction temperature below its rating has beencalculated, a heatsink of appropriate type and size can bechosen. The practical conditions under which a transistor

will be operated are likely to differ from the theoreticalconsiderations used to determine the required heatsink,and so temperatures should always be checked in thefinished equipment. Finally, some applications require asmall heatsink, or one with a very low thermal resistance,in which case forced air cooling by means of fans shouldbe provided.


CHAPTER 6

PACKING METHODS

page

Introduction 6 - 2

Glossary of terms 6 - 2

Packing methods in exploded view 6 - 3

Packing quantities, box dimensions and carrier shapes 6 - 13


May 1999 6 - 2


Packing Methods Chapter 6

INTRODUCTION

This chapter contains a survey of some of the packingmethods most frequently used by Philips Semiconductors.It includes information that may be important to customerswhen making their purchasing decisions, for example themain dimensions, shapes, and packing quantities.

Standardization

For semiconductors, packing serves two importantfunctions. The first and most obvious function is protectionduring storage and transport to customers. This, of course,applies to all products, not just semiconductors. Thesecond is to act as a delivery medium for automaticplacement machines during equipment manufacture. Todo this effectively, the reels, trays and tubes thatcomponents are packed in must meet recognizedstandards. In this respect, Philips Semiconductors activelycooperates with standardization authorities throughout theworld.

In addition, our packing methods meet all majorinternational standards, including those of IEC(International Electrotechnical Commission), JEDEC(Joint Electron Device Engineering Council, USA) andNEDA (National Electronic Distributor Association, USA).

Environmental care

Nowadays, an important issue is environmental impact.Component and equipment manufacturers arecontinuously working to improve the environmentfriendliness of their products and packing, and havedevoted much effort to eliminating the use of toxicmaterials and to looking at ways in which materials can berecycled.

In these respects, Philips Semiconductors has takenseveral important steps on the packing front. Theseinclude:

• Reducing the amount of packing material by switching to‘one piece’ boxes (instead of boxes with upper and lowerparts)

• Changing to ‘mono material’ to aid recycling.For example, from aluminium-lined boxes tocarbon-coated boxes.

• Changing from white boxes to natural brown boxes toeliminate the use of bleach (chlorine) in theirmanufacture.

The aim is minimum waste and minimum environmentalimpact. We have already gone a long way towards this inthe development of our packing methods. And futuredevelopments will take us even further along this route.

For more information on environmental issues, refer toChapter 7: Environmental information.

More Information

For more information about packing methods, pleasecontact:

Philips Semiconductors Packing Management,BAE-09P.O. Box 218,5600 MD EindhovenThe Netherlands.

GLOSSARY OF TERMS

Carrier Plastic tube, tray or tape withcavities, which can contain ICproducts

Package Container with leads for an ICchip (also known as an envelopeor outline)

Packing method Combination of a carrier and abox to protect products duringtransport and storage

Pin Rigid plastic pin that closes a tubefor DIP packages by insertionthrough holes in its end

Plug Flexible plastic plug that closes atube for PLCC or SIL packages byinsertion into its end

PQ Packing Quantity, in a boxcontaining one or more SPQs

SOD Standard Outline Diode

SOT Standard Outline Transistor

SPQ Smallest Packing Quantity, mostlythe quantity in one carrier

Surface mount Mounted on the surface of a PCB

Through-hole Mounted onto a PCB by insertionof leads into holes

Turnlock Rigid plastic pin that closes a tubefor SO packages by insertion intoits end and turning to lock in place


May 1999 6 - 3



PACKING METHODS IN EXPLODED VIEW

Fig.1 Reel pack axial taped.

3322 200 9062.2

3322 200 9062.2

1000

1000

Width = 26 or 52 mm

Printed plano box

Label

Barcode label

Box

Flange

Tape

Distance hub

Flange

Clamping bush

Clamping bush

Flange

Tape

Tape

Barcode label

Tape (cover)

Tape

Assembly Tape

QA Seal

BoxTapeTapeTapeLabelsClamping bushDistance hubFlangeQA Seal

(1) For SOD57 (355-52)

CardboardPaperPaperPolypropylenePaperPolystyrenePaperPaperAcrylate

346.0075.30

108.002.502.12

32.0026.00

420.000.15

MSC066

Dimensions in mm.


May 1999 6 - 4



Fig.2 Reel pack radial taped.

3322 200 9062.2

3322 200 9062.2

1000

MSC067

1000

Label

Flange

Flange

Hub

Box

Clamping bush

Clamping bush

Distance bush

Barcode label

Barcode label

Box

Box

Tape

Tape

Tape

Cover tape

Tape

Assy tape

Assy tape

or

Cover tapeTapeClamping bushHubFlangeLabelsQA Seal

(1) For SOD27 (355x42)

PaperPolypropylenePolystyrenePaperPaperPaperAcrylate

99.002.00

32.0032.30

170.001.620.15

Dimensions in mm.


May 1999 6 - 5



Fig.3 Reel pack for SMD.


Cover tape

Circular sprocket holes opposite thelabel side of reel

Carrier tape

MSC074

QA Seal

Tape

Reel

Barcode label

Barcode label

Printed plano box

Printed plano boxTapeLabelsReelCover tapeCarrier tapeSeal

Item Material Weight (1) (g)

(1) For SOD87 (180 x 8)

Cardboard carbon coatedPaperPaperPolystyrenePolyestherPolystyreneAcrylate

48.000.180.91

42.503.00

15.400.15


May 1999 6 - 6



Fig.4 Five reel pack for SMD.


Cover tape

Tape

Barcode label

Barcode label

Reel

Barcode label

Printed plano box

QA Seal

Circular sprocket holes opposite thelabel side of reel

Carrier tape

MSC075

Printed plano boxTapeLabelsReelCover tapeCarrier tapeSeal


(1) For SOD87 (180 x 8)

Cardboard carbon coatedPaperPaperPolystyrenePolyestherPolystyreneAcrylate

47.001.004.55

212.5015.0046.200.15


May 1999 6 - 7



Fig.5 Five ammo pack radial taped.

Printed plano box

Printed plano box

Barcode label

Tape

Plate

Assy tape

or

Tape

Barcode label

Box

QA Seal

QA Seal

Assy tape

Tape

Plate

Bag

Tape

MSC072

Printed plano boxTapeLabelBagSealPlateBox

Item Material Weight (g)

(1) For SOT54

Cardboard carbon coatedPolypropylenePaperPolyethyleneAcrylateCardboardCardboard

522.5024.304.26

60.000.15

78.00435.00


May 1999 6 - 8



Fig.6 Ammo pack axial taped.


Printed plano box

QA Seal

Barcode label

Assy tape

Printed plano box

Tape start

Red tape = cathode

Width 26 or 52mm

Connecting end

MSC073

Printed plano boxAssy tapeLabelsTapeQA Seal


(1) For SOD84 52mm

Cardboard carbon coatedPaperPaperPolypropyleneAcrylate

40.0032.490.710.250.15


May 1999 6 - 9



Fig.7 Ammo pack axial taped small size.


Label

QA Seal

Printed plano box

Assy tape

MSC076

Printed plano boxAssy tapeLabelsSeal


(1) For SOD84 52mm

Cardboard carbon coatedPaperPaperAcrylate

20.252.600.710.15


May 1999 6 - 10



Fig.8 Blister pack.

Barcode label

Preprinted ESD warning

Space for additional label

ESD Label

ESD Label

Blister cover

QA Seal

Tape

Printed plano box

Blister bottom

Foam

MSC071

TapeLabelsFoamBlisterSeal

(1) For SOT147

PolypropylenePaperPolyethylenePolystyreneAcrylate

0.102.536.10

92.000.45


May 1999 6 - 11



Fig.9 Tube pack.

MADE IN THE PHILIPPINES

ANTISTATIC

PHILIPS

ELECTROSTATIC

observe precautions

ATTENTION

DEVICES

SENSITIVE

for handling

Turn lock

Product

Tape

QA Seal

Tape

QA seal

Tape


Barcode label

Printed plano box

Stacked tubes

Label

Tube

Turnlock

TapeMSC070

Printed plano boxTapeLabelsTubeTurnlockSeal

(1) For SOT78

Cardboard carbon coatedPolypropylenePaperPolyvinylchloridePolyamideAcrylate

155.000.10

28.71720.0024.000.15


May 1999 6 - 12



Fig.10 Bulk pack (bag).


Space for additional label


Barcode label

Bag

Printed plano box

Label

Tape

QA seal

MSC069

Printed plano boxTapeLabelsBagSeal


(1) For SOT54

Cardboard carbon coatedPolypropylenePaperPolyethyleneAcrylate

125.000.102.00

12.000.15


May 1999 6 - 13



PACKING QUANTITIES, BOX DIMENSIONS AND CARRIER SHAPES

Reel pack - axial and radial taped

PHILIPS PACKAGETYPE/OUTLINE

CODE

TAPPINGWIDTH (mm)

METHOD SPQ PQOUTER BOX DIMENSIONS

L × W × H(mm)

SOD27 26 axial 10000 10000 358 × 358 × 56

52 axial 10000 10000 356 × 356 × 88

37 radial 5000 5000 360 × 360 × 60

SOD57 52 axial 5000 5000 356 × 356 × 88

52 axial 10000 10000 356 × 356 × 88

SOD61 52 axial 5000 5000 356 × 356 × 102

SOD64 52 axial 5000 5000 356 × 356 × 88

SOD66 52 axial 5000 5000 356 × 356 × 88

SOD68 26 axial 10000 10000 358 × 358 × 56

52 axial 10000 10000 356 × 356 × 88

SOD70 32 radial 2000 10000 385 × 385 × 275

SOD81 52 axial 5000 5000 356 × 356 × 88

SOD83 52 axial 2000 2000 356 × 356 × 102

SOD88 52 axial 5000 5000 356 × 356 × 102

SOD89 52 axial 2000 2000 356 × 356 × 102

SOD91 52 axial 10000 10000 356 × 356 × 88

SOT54 32 radial 2000 10000 395 × 395 × 290


May 1999 6 - 14




MSC081

26 or 52

5

red tape = cathode

Fig.11 Axial taped components for reel pack.

Dimensions in mm.

Fig.12 Radial taped components for reel pack.

handbook, full pagewidth12.7

18

37max

MSC377

Radial

direction of feedDimensions in mm.

Fig.13 Radial taped components for reel pack.


18

32.5max.

MSC376



May 1999 6 - 15



Tape and reel - surface mount devices

PHILIPS PACKAGETYPE/OUTLINE CODE

REEL DIMENSIONSD × W(mm)

SPQANDPQ

REELSPER BOX

OUTER BOX DIMENSIONSL × W × H

(mm)

SOD80 180 × 8 2500 1 186 × 186 × 16

330 × 8 10000 1 338 × 338 × 18

330 × 8 50000 5 339 × 339 × 71

SOD87 180 × 8 2000 1 186 × 186 × 16

180 × 8 10000 5 182 × 182 × 55

330 × 8 8000 1 338 × 338 × 18

330 × 8 40000 5 339 × 339 × 71

SOD106 180 × 12 1500 1 186 × 186 × 24

SOD110 180 × 8 3000 1 186 × 186 × 16

330 × 8 10000 1 338 × 338 × 18

SOD323 180 × 8 3000 1 186 × 186 × 16

286 × 8 10000 1 293 × 293 × 18

SOD523 180 × 8 3000 1 186 × 186 × 16

286 × 8 10000 1 293 × 293 × 18

SOT23 180 × 8 3000 1 186 × 186 × 16

286 × 8 10000 1 293 × 293 × 18

SOT89 180 × 12 1000 1 186 × 186 × 24

330 × 12 4000 1 338 × 338 × 24

SOT96-1 (SO8) 180 × 12 1000 1 190 × 190 × 26

330 × 12 2500 1 340 × 340 × 26

SOT143 180 × 8 3000 1 186 × 186 × 16

286 × 8 10000 1 293 × 293 × 18

SOT163-1 (SO20) 180 × 24 500 1 190 × 190 × 38

330 × 24 2000 1 340 × 340 × 38

SOT223 180 × 12 1000 1 186 × 186 × 24

330 × 12 4000 1 338 × 338 × 24

SOT323 180 × 8 3000 1 186 × 186 × 16

286 × 8 10000 1 293 × 293 × 18

SOT343 180 × 8 3000 1 186 × 186 × 16

286 × 8 10000 1 293 × 293 × 18

SOT346 180 × 8 3000 1 186 × 186 × 16

286 × 8 10000 1 293 × 293 × 18

SOT353 180 × 8 3000 1 186 × 186 × 16

SOT363 180 × 8 3000 1 186 × 186 × 16

SOT404 330 × 24 800 1 340 × 340 × 38

SOT409 180 × 16 500 1 186 × 186 × 30

SOT416 180 × 8 3000 1 186 × 186 × 16

286 × 8 10000 1 293 × 293 × 18


May 1999 6 - 16



Tape and reel - carrier tape dimensions

SOT426 330 × 24 800 1 340 × 340 × 38

SOT428 330 × 16 2500 1 340 × 340 × 30

SOT453A 330 × 32 1300 1 340 × 340 × 49

SOT453B 330 × 32 600 1 340 × 340 × 49

SOT453C 330 × 32 800 1 340 × 340 × 49

SOT457 180 × 8 3000 1 186 × 186 × 16

286 × 8 10000 1 293 × 293 × 18

SOT482 330 × 24 2000 1 340 × 340 × 38

SOT490 180 × 8 4000 1 186 × 186 × 16

286 × 8 10000 1 293 × 293 × 18


CARRIER TAPE DIMENSIONS (mm) (See Figs. 15 and 14)

A0 B0 K0 P1 W

SOD80 1.6 3.9 1.7 4.0 8.0

SOD87 2.0 3.9 2.3 4.0 8.0

SOD106 3.1 5.6 2.7 4.0 12.0

SOD110 1.6 2.3 1.6 4.0 8.0

SOD323 1.6 2.9 1.2 4.0 8.0

SOD523 0.9 1.4 1.0 4.0 8.0

SOT23 3.1 2.6 1.3 4.0 8.0

SOT89 4.3 4.6 1.6 8.0 12.0

SOT96-1 (SO8) 6.7 5.4 1.8 8.0 12.0

SOT143 3.1 2.6 1.3 4.0 8.0

SOT163-1 (SO20) 11.1 13.5 2.7 12.0 24.0

SOT223 7.0 7.4 1.9 8.0 12.0

SOT323 2.4 2.4 1.2 4.0 8.0

SOT343 2.4 2.4 1.2 4.0 8.0

SOT346 3.1 3.2 1.3 4.0 8.0

SOT353 2.4 2.4 1.2 4.0 8.0

SOT363 2.4 2.4 1.2 4.0 8.0

SOT404 10.6 15.8 4.9 16.0 24.0

SOT409 6.0 8.0 2.5 8.0 16.0

SOT416 1.9 1.8 1.0 4.0 8.0

SOT426 10.6 15.8 4.9 16.0 24.0

SOT428 7.0 10.5 2.5 8.0 16.0

SOT453A 10.2 21.8 2.8 16.0 32.0

SOT453B 11.1 21.8 6.6 16.0 32.0

SOT453C 10.0 20.5 4.8 16.0 32.0


REEL DIMENSIONSD × W(mm)

SPQANDPQ

REELSPER BOX


(mm)


May 1999 6 - 17



SOT457 3.2 3.2 1.2 4.0 8.0

SOT482A/C 8.3 13.8 2.3 12.0 24.0

SOT490 1.9 1.8 0.9 4.0 8.0


CARRIER TAPE DIMENSIONS (mm) (See Figs. 15 and 14)

A0 B0 K0 P1 W

Fig.14 Carrier tape for surface mount devices.


K0A04

P1

B0W

MSC080

Dimensions in mm.


May 1999 6 - 18



Fig.15 Product orientation in carrier tape.


Circular

direction of feed

Product orientation in carrier tape

SOT89 SOT223

SOT96-1/163-1

SOT404

MSC079

pin 1

SOT409

pin 1

Circular

SOT353 SOT363/457

SOD80C/87/106/323/525

(cathode)pin 1

SOT143B/343N

SOT143R/343R

SOT23/146/323/346/490


Circular

direction of feed

Product orientation in carrier tape

RF modulesSOT453B/C

SOT453A

MSD056


May 1999 6 - 19



Ammo pack - axial and radial taped


TAPING WIDTH(mm)

TAPING METHOD SPQ/PQOUTER BOX DIMENSIONS

L × W × H(mm)

SOD27 26 axial 5000 263 × 48 × 75

52 axial/small 1000 138 × 73 × 29

52 axial 10000 263 × 74 × 124

37 radial 5000 350 × 203 × 42

SOD57 52 axial/small 200 138 × 73 × 29

52 axial 2500 263 × 73 × 87

SOD61 52 axial 500 305 × 118 × 65

52 axial/small 50 138 × 73 × 29

SOD64 52 axial 2500 263 × 73 × 87

52 axial/small 200 138 × 73 × 29

SOD66 52 axial 5000 263 × 73 × 122

52 axial/small 1000 138 × 73 × 29

SOD68 26 axial 5000 263 × 48 × 75

52 axial/small 1000 138 × 73 × 29

52 axial 10000 263 × 73 × 124

37 radial 5000 350 × 203 × 42

52 axial/small 500 138 × 73 × 29

SOD70 37 radial 10000 355 × 210 × 300

SOD81 26 axial 5000 255 × 50 × 89

52 axial 5000 263 × 73 × 87

52 axial/small 500 138 × 73 × 29

SOD91 52 axial/small 1000 138 × 73 × 29

52 axial 2000 263 × 73 × 102

26 axial 5000 263 × 48 × 75

52 axial 10000 253 × 74 × 124


May 1999 6 - 20




MSC081

26 or 52

5

red tape = cathode

Fig.16 Axial taped components for ammo pack.

Dimensions in mm.


18

37max

MSC082

RadialFig.17 Radial taped components for ammo pack.

Dimensions in mm.

Fig.18 Radial taped components for ammo pack.


18

32.5max.

MSC376



May 1999 6 - 21



Blister pack


SPQ PERCARRIER

CARRIERPER BOX

PQOUTER BOX DIMENSIONS

L × W × H(mm)

PACKINGVERSION

(See Fig.19)

SOT115 25 4 100 315 × 118 × 78 B

5 1 5 145 × 100 × 29 C

SOT119 20 2 40 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT120 20 2 40 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT121 20 2 40 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT122 20 2 40 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT123 20 2 40 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT160 20 2 40 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT161 20 3 60 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT171 20 2 40 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT172 20 2 40 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT233 15 5 75 315 × 118 × 78 A

SOT262 20 3 60 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT268 20 3 60 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT273 20 3 60 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT279 20 2 40 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT289 20 2 40 315 × 118 × 78 B

20 3 60 315 × 118 × 78 A

4 8 32 315 × 118 × 78 D

SOT324 20 3 60 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT347 16 3 48 315 × 118 × 78 B

SOT365 15 5 75 315 × 118 × 78 A

SOT390 20 3 60 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D


May 1999 6 - 22



SOT391 20 3 60 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

SOT409 25 8 200 315 × 118 × 78 D

SOT422 4 8 32 315 × 118 × 78 D

20 3 60 315 × 118 × 78 A

SOT423 4 8 32 315 × 118 × 78 D

20 3 60 315 × 118 × 78 A

SOT437 20 3 60 315 × 118 × 78 B

4 8 32 315 × 118 × 78 D

1 40 40 165 × 92 × 65 A

SOT439 1 40 40 165 × 92 × 65 A

SOT440 4 8 32 315 × 118 × 78 D

1 40 40 165 × 92 × 65 A

SOT441 1 40 40 165 × 92 × 65 A

SOT443 20 3 60 315 × 118 × 78 A

4 8 32 315 × 118 × 78 D

1 40 40 165 × 92 × 65 A

SOT445 4 8 32 315 × 118 × 78 D

1 40 40 165 × 92 × 65 A

SOT446 20 8 160 315 × 118 × 78 D

1 40 40 165 × 92 × 65 A

SOT448 1 40 40 165 × 92 × 65 A

SOT468 20 3 60 315 × 118 × 78 A

SOT494 20 3 60 315 × 118 × 78 A

SOT504 20 3 60 315 × 118 × 78 B


SPQ PERCARRIER

CARRIERPER BOX


L × W × H(mm)

PACKINGVERSION

(See Fig.19)


May 1999 6 - 23



Fig.19 Packing versions of blister pack.


Version A

carrier

carrier carrier

MSC077

Version B

Version CVersion D

carrier


May 1999

6 - 24

Philips S

emiconductors

Discrete S

emiconductor P

ackages

Packing M

ethodsC

hapter 6

Tube pack


CODE

CARRIER LENGTH

(mm)END STOP SPQ

CARRIERS PER BOX


L × W × H(mm)

CARRIER PROFILE(mm)

SOT32 390 turnlock 50 20 1000 402 × 95 × 29

SOT78 520 turnlock 50 20 1000 526 × 69 × 75

SOT263 520 turnlock 50 20 1000 526 × 69 × 75

SOT82 390 turnlock 50 20 1000 402 × 95 × 29

SOT128 523 endstop 50 20 1000 529 × 84 × 85

SOT186 520 turnlock 50 20 1000 526 × 69 × 75

SOT199 396 turnlock 25 20 500 408 × 86 × 81

3

28MSC088

5.6

31.5MSC085

2.9

27.6MSC090

6.2

39MSC086

5.6

33MSC091

6

39.5MSC089


May 1999

6 - 25

Philips S

emiconductors

Discrete S

emiconductor P

ackages

Packing M

ethodsC

hapter 6

SOT199 bent lead 396 turnlock 25 12 300 408 × 86 × 81

SOT365 413 turnlock 8 20 160 450 × 116 × 92

SOT501A 362 turnlock 5 20 160 450 × 116 × 92

SOT399 413 turnlock 25 20 500 450 × 116 × 92

SOT429 413 turnlock 25 20 500 450 × 116 × 92

SOT451A 396 turnlock 13 18 234 432 × 95 × 87


CODE

CARRIER LENGTH

(mm)END STOP SPQ

CARRIERS PER BOX


L × W × H(mm)

CARRIER PROFILE(mm)

15

39MSC092

10

33MSD055

6.5

53MSD069

6

53MSD068

6.7

39MSD067


May 1999 6 - 26



Fig.20 Stacking methods of tubes.


SOT93/199SOT93/199 bent lead SOT128

SOT365/501 SOT451/454

SOT78/263

SOT32/82

SOT399/429 SOT186

MSC084

A


May 1999 6 - 27



Bulk pack


SPQ PERBAG

BAGS PERBOX

PQPACKINGVERSION

(See Fig.21)


(mm)

SOD57 100 15 1500 A 315 × 115 × 75

250 1 250 B 138 × 73 × 30

SOD70 500 8 64000 A 305 × 120 × 67

SOD80 1000 10 10000 B 138 × 73 × 30

SOD87 1000 6 6000 B 138 × 73 × 30

SOT54 500 8 4000 A 315 × 115 × 75

SOT89 250 80 20000 A 315 × 115 × 75

SOT195 500 8 64000 A 305 × 120 × 67

SOT223 250 80 20000 A 315 × 115 × 75

Fig.21 Bulk pack.


Version A Version B

MSC078


CHAPTER 7

ENVIRONMENTAL INFORMATION

page

Introduction 7 - 2

Explanation of the tables 7 - 2

General safety remarks 7 - 5

Substances not used by Philips Semiconductors 7 - 6

Disposal and recycling 7 - 7

General warnings 7 - 7

Chemical content tables:

Diodes 7 - 8

Transistors 7 - 13


May 1999 7 - 2


Environmental information Chapter 7

INTRODUCTION

Nowadays, everyone must accept responsibility forkeeping the environment clean, from individuals adoptinga responsible attitude to their own waste disposal,however small that may be, to big industries who must takeproper precautions to avoid releasing large amounts ofdamaging waste into the environment.

As a leading electronic components manufacturer, PhilipsSemiconductors has always regarded environmentalprotection as a major issue. The electronics industry, likemany others, produces its share of toxic and hazardousmaterials, and we have long made it our policy to followworking practices that cut the chance of these materialspassing into the environment to the absolute minimum.

Products supplied by Philips Semiconductors today offerno hazard to the environment in normal operation andwhen stored according to the instructions given in our datasheets. Inevitably, some products contain substances thatare potentially hazardous to health if exposed by accidentor misuse, but we ensure that users of these componentsreceive clear warning of this in the data sheets. And wherenecessary, the warning notices contain safety precautionsand disposal instructions.

This chapter supplements these notices and instructionsby providing clear and comprehensive information on thecomposition of representative examples of discretepackages manufactured by Philips Semiconductors. Thisinformation should form a basis for answering questionson product safety and disposal and should, moreover, helpto increase awareness of these aspects, not onlythroughout the Philips Semiconductors organization butthroughout the semiconductor industry in general.

For additional information on the chemical content ofdiscrete and IC packages, ask your local salesrepresentative for the Philips Semiconductors brochureChemical content of semiconductor devices, order number9397 750 04906.

EXPLANATION OF THE TABLES

The following pages provide the chemical constituents ofrepresentative groups of discrete semiconductorcomponents down to minor percentages and traces, as faras these constituents may be important to the use,destruction or disposal of the components.

The tables contain information about the materials used inthe semiconductor devices themselves and in the packingused for storage, transport and assembly.

Whenever possible, the devices have been grouped intofamilies based on the similarity in composition,construction and packing method. In this way we were ableto limit the number of tables. For each group, onerepresentative is specified in mass percentages of itsparts.

In many cases, a single envelope type will contain a rangeof differing leadframes with different die-pad dimensions toaccommodate the active devices. This, however, leads toonly minor changes in the mass percentages. Differentmaterials or techniques are sometimes used to assembleone envelope type, and whenever possible, alternativematerials are included in the tables. In other cases only thestandard or high-volume process is described.

Per page, the product family is defined and the typesidentified by the Philips package code number.Additionally, reference is made to usual names or to theJEDEC code (when applicable). The mass in milligrams(mg), body dimensions in millimeters (mm) and packingquantity are also specified.

The table itself shows the composition of the grouprepresentative broken down into the device-parts:

• metal parts

• crystal

• envelope (plastic, glass or ceramic)

• packing materials.

The device-parts are specified in milligrams (mg). Thesefigures are as accurate as possible for the grouprepresentative shown. Other devices from the same groupmay differ considerably in mass. The amount of packingmaterial, specified in grams, per device can be found bydividing the weight of the packing material by the packingquantity. For more detailed information on packing, refer toChapter 6 Packing Methods.

Metal parts

The composition of the leadframe material is indicated,when appropriate, by the method commonly used foralloys, e.g.:

• FeNi42 means iron alloy containing 42% of nickel(alloy 42).

• CuZn15 means copper alloy containing 15% zinc(tombac).

• Cu alloy indicates copper with a small amount of alloyingelements such as Fe, Ni, Zn or Ag or combinations ofsome elements.


May 1999 7 - 3



Note: the die-attach material in all plastic-encapsulationedproducts contains on average 0.5% Au/AG, which isrecoverable on recycling.

Crystal

The active device is usually a silicon chip doped with verysmall amounts of elements such as boron, arsenic orphosphorus. The back may be metallized with thin layersof titanium, nickel, platinum, gold or silver to enhancedie-bonding to the leadframe.

Envelope

The chip is protected by a glass, ceramic, plastic or metalencapsulation. Glass will contain SiO2 plus a number ofoxides of Ba, K, Pb, Zn and Mn. These elements are,however, immobilized and will not be extracted by acids,unless the glass is ground.

The plastic encapsulation is usually based on ortho cresolnovolac (OCN) -epoxy or on biphenyl-epoxy, filled withquartz particles (fused or crystalline) up to approximately70 mass percent. In all cases (except SOT54), antimonytrioxide and tetrabromobisphenol-A (TBBA) are present asflame retardants. The TBBA will be incorporated in theepoxy-polymer after curing so that no TBBA is present inthe finished device. It has become a partially brominatedepoxy. The flammability of all moulding compounds ratestypically UL94-V0 at 1/8 inch (see page 7-5 forexplanation).

Packing material

Cardboard and paper consist mainly of natural fibres. Thecarbon layer for ESD protection does not hamper therecyclability of the cardboard.

Polyethylene, polypropylene and polystyrene are syntheticpolymers made from hydrocarbons.

Polyvinylchloride (PVC), a synthetic polymer made fromchlorinated hydrocarbons, is used for the tubes in whichmany semiconductors are packed. PVC is hazardous tothe environment when burned under certain, ill-controlledconditions. PVC is, however, readily recyclable when thematerial is collected separately (as a mono-material).Therefore the endpins, turnlocks and soft rubber stoppersin the PVC-tubes are now replaced by PVC to enhancerecycling.

Re-use of the polystyrene (PS) reels is encouraged byrequesting all our customers to return the reels after use toSemiCycle - a company set up to collect empty reels afteruse and sell them back to us. To facilitate this process, ourreels are now manufactured as single-piece units insteadof the assembled units used formally. Much lighter thanearlier reels, the new reels are more economical to recycleand can be reused an average of 5 times, significantlycutting polystyrene usage.

Recycling symbols and the addresses of your nearestSemiCycle contact are printed on the boxes in which thereels are delivered.

To encourage recycling, Philips Semiconductors marksthe packing materials according to ISO 11469 using therecycling symbols shown in Figs 1 to 1.

Fig.1 Paper and cardboard.

MGK022

Fig.2 Polyethylene terephthalate.

MGK023


May 1999 7 - 4



Fig.3 Polyethylene, high density.

MGK024

Fig.4 Polyvinylchloride.

MGK025

Fig.5 Polyethylene, low density.

MGK026

Fig.6 Polypropylene.

MGK027

Fig.7 Polystyrene.

MGK028

Fig.8 Other plastics. The acronym of the plastic isput under the recycling symbol. In thisexample: PA = polyamide.

MGK029


May 1999 7 - 5



GENERAL SAFETY REMARKSOxygen index

A material’s resistance to burning is expressed by itsoxygen index. This is defined as the minimumconcentration of oxygen, expressed as volume per cent, ina mixture of oxygen and nitrogen that will just supportflaming combustion of the material initially at roomtemperature. All plastics used in Philips Semiconductorsproducts are specified with an oxygen index between 28%and 35% meeting international flammability requirements

The oxygen index is measured using the standard ATSMtest method designated D 2863 - 91. This test method hasbeen found applicable for testing various forms of plasticmaterials, including film and cellular plastic. According tothis test, the minimum concentration of oxygen that will justsupport combustion of the specimen in a mixture of oxygenand nitrogen flowing upward in a test column is measuredunder equilibrium conditions of candle-like burning. Theequilibrium is established by balancing the heat lost to thesurroundings with the heat generated from combustion ofthe specimen as measured either over a specified time ofburning or length of specimen burned. The critical oxygenconcentration is approached from both sides (i.e. frombelow and from above) to establish the oxygen index.

Beryllium oxide

Despite our constant improvement of components andprocesses with respect to environmental demands, somecomponents unavoidably contain substances such asberyllium oxide that, if exposed by accident or misuse, arepotentially hazardous to health. Users of the componentsare informed of the danger by warning notices in the datasheets supporting the components. Obviously, users ofthese components assume responsibility towards theconsumer with respect to safety matters andenvironmental demands.

All used or obsolete components should be disposed ofaccording to the regulations applying at the disposallocation. Depending on the location, electroniccomponents are considered to be ‘chemical’, ‘special’ orsometimes ‘industrial’ waste. Disposal as domestic wasteis usually not permitted.

Underwriters Laboratories (UL)

UL is the leading third-party certification organization in theUnited States and the largest in North America. As anon-profit product-safety testing and certificationorganization, UL has been evaluating products in theinterest of public safety since 1894. The organizationspecializes in holistic product and company evaluations,including safety, performance, energy efficiency,environmental and public health issues, electro-magneticcompatibility, quality and environmental managementsystem registration and inspection services. It alsospecializes in national and international codes andstandards development and harmonization.

The UL mark assures acceptance of products in NorthAmerica, Europe, Asia Pacific, Asia and around the worldthrough the most extensive network of testing, quality andcertification organizations.

UL94 refers to standard “Tests for Flammability of PlasticMaterials for Parts in Devices and Appliances”. V0 meansthat the test sample complies with the highestrequirements of the test.


May 1999 7 - 6



SUBSTANCES NOT USED BY PHILIPSSEMICONDUCTORS

Below are listed the materials and substances that are notpresent in Philips Semiconductors’ products andprocesses(1). This information supplements the chemicalcontents tables that follow and is provided to enablemanufacturers assess the environmental impact ofproducts manufactured by Philips Semiconductors.

Substances not used in products

• 4-aminodiphenyl and its salts

• ammonium salts

• arsenic

• asbestos

• benzene

• cadmium and compounds

• chlorinated paraffines

• creosote

• cyantes

• cyanides

• 4,4-diaminophenyl methane

• dibenzofurans

• epichlorhydrine

• ethylene glycol ethers

• formaldehyde

• halogenated aliphatic hydrocarbons

• hydrazine

• mercury and compounds

• N-nitrosoamines

• 2-naphthylamine and its salts

• nickel tetracarbonyl

• N,N-dimethlformamide

• N,N-dimethylacetamide

• oils and greases

• organometallic compounds (e.g. org. tin compounds)

• ozone-depleting compounds

• pentachlorophenol

• phenol compounds

• (nonyl)-phenol ethoxylates

(1) The lists refer to processes used for manufacturing productsmentioned in this chapter. For information on other products,contact your sales representative.

• phtalates

• picric acid

• polybrominated biphenyl oxides (PBBO)

• polybrominated biphenyls (PBB/PBBE)

• polychlorinated triphenyls (PCT)

• polychlorinated napthalenes

• polychlorinated biphenyls (PCB)

• polycyclic compounds

• polyhalogenated dibenzofurans/dioxins

• polyhalogenated bi/triphenyl ethers

• selenium

• tellurium

• tetrabromobenzylimidazole

• tetrabromoethylene

• toluene

• triethylamine

• tris (aziridinyl) phosphinoxide

• tris (2,3-dibromopropyl) phosphate

• vinyl chloride monomer

• xylene

Substances not used in manufacturing processes

Philips Semiconductors has eliminated all OzoneDepleting Substances, referred to as Class I and II in theMontreal Protocol and its amendments. This means thatour products, in compliance with the US Clean Air Act, donot have to be labelled.

We have also eliminated, voluntarily, the use ofchlorinated hydrocarbons such as perchloro-ethylene andtrichloro-ethylene from our manufacturing processes.

Substances not used in packing materials

• laminates with paper

• bleached paper

• polystyrene flakes (EPS)


May 1999 7 - 7



Summary of ozone-depleting substances eliminated

Class I substances:

• fully halogenated chloro-fluorocarbons (CFC)

• halons

• carbontetrachloride

• 1,1,1-trichloroethane

Class II substances:

• partially halogenated hydrocarbons (HCFC)

DISPOSAL AND RECYCLING

Disposal

Old or used products must be disposed of in accordanceto national and local regulations.

The products and packing materials must be disposed ofas special waste. This is required, in particular, for partscontaining environmentally hazardous materials, forexample beryllium oxide, present in some RF-devices.

Smaller quantities of material may be disposed of asdomestic waste, provided national or local regulationspermit this.

Recycling

Where legally required, we accept packing materials andproducts for recycling and/or disposal. However, since thecost of returning these materials to us must be borne bythe customers, it is often more cost effective for them tolook for a local recycle company. To assist in this we canprovide customers with the names and addresses of localrecycle companies in their areas.

In many devices, precious metals (gold and silver) arepresent. The content maybe 0.5% or higher.

GENERAL WARNINGS

Products

Under the specified operating conditions, no hazardousmaterials will be liberated from the products. The generalwarnings describe phenomena that can be expected withabnormal use (outside the product’s specification). Forexample:

• If a product is exposed to strong acids, metals containedwithin it may be partially extracted.

• If a product with an epoxy moulded envelope is exposedto organic solvents, these may extract part of the resincontained in the envelope.

• If the product is incinerated, degradation andcondensation reactions in the organic material itcontains may cause a number of hazardous substancesto be released into the air in unpredictable amounts.Moreover, metal oxides will be formed and may bereleased into the air as dust particles.

• If products with beryllium heatsinks (RF transistors) aredamaged, toxic beryllium oxide dust may be releasedinto the air.

Packing material

• With adequate oxygen supply, packing materials willgive off mainly carbon dioxide and water if burned.However, if they are burned in a limited oxygen supply(the general case in a fire), hazardous compounds (forexample carbon monoxide) may be emitted.

• PVC will form hydrochloric acid gas when incinerated. Itwill also generate a number of other chlorinecompounds, among them the toxic dioxin, when theconditions (temperature, oxygen) are not well controlled.


May 1999 7 - 8



GLASS DIODES/RECTIFIERS, LEADED

Notes

1. All packages have a similar composition, quantities may vary.

2. IT = implosion technology.

Chemical content for group representative SOD68

Note

1. Mo studs for implosion types.

PACKING MATERIAL (AMMO PACK)

REFERENCE PACKAGE CODE (1) MASS (mg) BODY (mm) PACKING QUANTITY

DO-35 SOD27 136 φ 1.9 × 4.3 5000

DO-41 SOD66 344 φ 2.6 × 4.8 5000

DO-34 SOD68 118 φ 1.6 × 3.0 5000

IT(2) SOD81 277 φ 2.2 × 3.8 5000

IT(2) SOD91 121 φ 1.7 × 3.0 5000

DEVICE PART SUBSTANCE MASS (mg)

stud FeNi42, cladded with Cu(1) 10.5

wire Fe cladded with Cu 88

SnPb20 plated 2.2

active device doped Si 0.05

encapsulation glass (Pb < 58%, Sb < 0.5%) 16.8

paint/pigment epoxy copolymer 0.1

PACKING PART SUBSTANCE MASS (g)

box paper 53

tape kraft paper 20

tape polypropylene 19.6

seal acrylate 0.2


May 1999 7 - 9



GLASS DIODES/RECTIFIERS, SMD

Notes


2. IT = implosion technology.


Note

1. SOD80: FeNi42 cladded with Cu.

PACKING MATERIAL (REEL PACK)


− SOD80 35 φ 1.5 × 3.5 2500

IT(2) SOD87 50 φ 2.1 × 3.5 2500


stud Mo(1) 19.5

flange Cu 15.0

SnPb20 plated 2.5


encapsulation glass (Pb < 54%, Sb < 0.5%) 15.5

paint/pigment epoxy copolymer 0.1


box cardboard 56

reel polystyrene 39

carrier tape polycarbonate, carbon loaded 18.8

cover tape polyester 3.3


May 1999 7 - 10



GLASS-BEAD RECTIFIERS AND STACKS

Notes


2. Body length depends on reverse voltage and may be less than given here.


Note

1. May be greater for EHT stacks.

2. In stacks Pb < 6%, ZnO = 59%.



− SOD57 356 φ 3.8 × 4.6 2500

EHT-stack SOD61 250 φ 3.0 × 12.5 max.(2) 5000

− SOD64 833 φ 4.5 × 5.0 4000




- SOD116 190 φ 2.5 × 13.5 max. 5000

- SOD118A 178 φ 2.5 × 6.5 5000


stud Mo 51

wire Fe cladded with Cu 252

SnPb20 plated 2

active device doped Si 1(1)

encapsulation glass (Pb < 58%(2), Sb < 0.5%) 50


box paper 53

reel paper 25

tape kraft paper 30

label paper 0.8

seal acrylate 0.2


May 1999 7 - 11



DIODES IN PLASTIC PACKAGE, SMD

Note





− SOD106 66 4.7 × 2.5 × 2.6 1500

− SOD323 4.8 1.7 × 1.3 × 0.9 3000

SC-79 SOD523 1.6 1.3 × 0.8 × 0.6 3000


leadframe Cu, SnPb20 plated 1.23


encapsulation OCN-epoxy polymer(SiO2 < 72%, Sb < 2%, Br < 1%)

3.5


box cardboard 56

reel polystyrene 74


cover tape polyester 4

labels paper 2.1

seal acrylate 0.2


May 1999 7 - 12



SMALL SIGNAL CERAMIC DIODE, SMD



REFERENCE PACKAGE CODE MASS (mg) BODY (mm) PACKING QUANTITY

− SOD110 10 2.0 × 1.25 × 1.45 3000


envelope Al2O3, SiO2 8.2

plated with Cu+SnPb20 1

encapsulation OCN-epoxy polymer (SiO2 < 70%) 0.8

active device doped Si < 0.1


box cardboard 56

reel polystyrene 74



labels paper 2.1

seal acrylate 0.2


May 1999 7 - 13



FLANGE-MOUNTED CERAMIC RF POWER TRANSISTORS

Note



Notes

1. In some types: WCu15 flange.

2. In SOT119A1 and SOT289: FeNiCo leadframe.

PACKING MATERIAL (BLISTER PACK)

REFERENCE PACKAGE CODE (1) MASS (g) BODY (mm) PACKING QUANTITY

− SOT119 5.20 13.0 × 25.2 × 7.5 40

− SOT121 5.00 13.0 × 25.2 × 7.5 40

− SOT123 3.90 9.8 × 25.2 × 7.5 40

− SOT160 4.86 9.8 × 25.2 × 7.5 75

− SOT161 3.50 10.2 × 25.2 × 7.5 40

− SOT171 3.60 5.9 × 25.2 × 7.0 40

− SOT262 8.00 10.4 × 34.3 × 5.8 16

− SOT273 6.90 10.4 × 25.0 × 7.2 60

− SOT289 8.20 11.8 × 28.1 × 4.6 40

− SOT324 3.58 6.4 × 19.0 × 4.5 32


flange Cu(1) 4120

leadframe FeNi42(2) 270

brazing alloy AgCu28 20

encapsulation Al2O3 200

heat spreader BeO, plated with Mo/Ni/Au 540

active device doped Si 10

glue polyamide 40


box cardboard 157

foam polyethylene 27.2

blisters polystyrene 46

labels paper 0.8

tape polypropylene 1

seal acrylate 0.2


May 1999 7 - 14



STUD-MOUNTED CERAMIC RF POWER TRANSISTORS

Note


Chemical content for group representative SOD122A

Notes

1. SOT122A2: FeNiCo leadframe.



− SOT120A 3.00 φ 9.8 × 18.8 40

− SOT122A 1.90 φ 7.6 × 17.0 40

− SOT147 11.40 φ 13.0 × 20.9 40

− SOT172A 1.40 φ 5.4 × 16.0 40


stud Cu 800


nut CuZn37, Ni plated 630





glue polyamide 40


box cardboard 157



labels paper 0.8


seal acrylate 0.2


May 1999 7 - 15



CERAMIC RF POWER TRANSISTORS IN PILL PACKAGE

Note

1. Ceramic packages without flange or stud (so called “pill”-packages) have a similar composition, quantities may vary.

Chemical content for group representative SOD119D

Note

1. FeNiCo in SOT119A1.



− SOT119D 1.60 φ 13.0 × 4.5 40

− SOT122D 0.70 φ 7.6 × 4.1 40

− SOT172D 0.30 φ 5.4 × 3.6 40







glue polyamide 20


box cardboard 157



labels paper 0.8


seal acrylate 0.2


May 1999 7 - 16



POWER TRANSISTORS IN PLASTIC PACKAGE

Note


Chemical content for group representative SOT93

PACKING MATERIAL (TUBE PACK)


TO-220 SOT78 1.950 10.3 × 9.9 × 4.5 1000

− SOT82 0.750 11.1 × 7.8 × 2.8 1000

− SOT93 4.930 15.2 × 12.7 × 4.6 500

− SOT186 1.950 10.2 × 9.5 × 4.6 1000

− SOT186A 2.500 10.3 × 9.4 × 4.6 1000

− SOT199 5.500 15.3 × 21.5 × 5.2 500

pentawatt SOT263 1.700 10.3 × 9.5 × 4.5 1000

− SOT399 5.890 16 × 27 × 5.8 500


leadframe Cu 3950

SnPb30 plated 20

solder pellet SnAg25Sb10 25


920



box cardboard 123

tubes polyvinylchloride 700

turn locks polyvinylchloride 20

labels paper 15


seal acrylate 0.2


May 1999 7 - 17



SURFACE-MOUNT POWER TRANSISTORS IN PLASTIC PACKAGE

Note



Note

1. Optional PbSn5 solder pellet.



D2-PAK SOT404 1.43 10.3 × 9.5 × 4.5 800

− SOT426 1.46 10.3 × 9.5 × 4.5 800

− SOT427 1.49 10.3 × 9.5 × 4.5 800

D-PAK SOT428 0.33 6.2 × 6.7× 2.4 2500

TO-247 SOT429 5.42 15.5 × 20.5× 5.0 500


leadframe Cu, Ni plated 422

solder pellet SnAg25Sb10(1)


120

active device doped Si


box cardboard 180

reel polystyrene 325

carrier tape polystyrene, carbon loaded 200

cover tape polyester 13.7

labels paper 2.1


seal acrylate 0.2


May 1999 7 - 18



MAGNETIC SENSOR PACKAGES

Note


Chemical content for group representative SOT453B



− SOT453A 230 18.0 × 4.4 × 1.6 1000

− SOT453B 1600 18.0 × 8.2 × 7.0 750

− SOT453C 645 18.0 × 4.4 × 4.5 750


leadframe CuZr0.2 with Ag spot 76

bond-wire Au <0.2

solder layer Sn 7


110

magnet BaFe12O19 1400

magnetic field sensor device Si with thin metal films 1.2

active device doped Si, Al, TiW 4.8


box cardboard 300

reel polystyrene 350

carrier tape polystyrene, carbon loaded 140


labels paper 5

seal acrylate 1


May 1999 7 - 19



MEDIUM-POWER TRANSISTORS IN PLASTIC PACKAGE

Note



PACKING MATERIAL (TUBE PACK)


TO-126 SOT32 0.694 11.1 × 7.8 × 2.8 1000

TO-202 SOT128 1.528 11.1 × 7.8 × 2.7 1000


leadframe Cu, Co + Au plated 863

SnPb plated 15


encapsulation silica filled epoxy plastic(Sb < 3%, Br < 2%)

640


box cardboard 123

tubes polyvinylchloride 836

end stops polyvinylchloride 38

labels paper 15


seal acrylate 0.2


May 1999 7 - 20



SMALL-SIGNAL TRANSISTORS AND SENSORS IN PLASTIC PACKAGE


Note

1. Alternative: two-shot encapsulation of epoxy and PPS.


REFERENCE PACKAGE CODE MASS (g) BODY (mm) PACKING QUANTITY

− SOD70 0.2 φ 4.4 × 5.0 1000

TO-92 SOT54 0.250 φ 4.8 × 5.2 2000

− SOT195 0.166 5.0 × 4.4 × 1.6 1000


leadframe CuZn15, Co + Au plated 113

SnPb plated 1.5


encapsulation(1) OCN-epoxy polymer(SiO2 < 72%, Sb < 4%, Br < 0.6%)

135


box cardboard 97.5

carrier tape kraft paper 110

buffer cardboard 20


May 1999 7 - 21



TRANSISTORS IN METAL PACKAGE

Note



PACKING MATERIAL (BULK PACK)


TO-39 SOT5 0.97 φ 8.5 × 6.6 1000

TO-18 SOT18 0.31 φ 4.8 × 5.3 5000


metal envelope + leads FeNi28Co18 240

wires + solder Au 2

solder layer Sn 5

part of encapsulation glass 62



box cardboard 125.4

bag polyethylene 14.5

label paper 1.4


May 1999 7 - 22



TRANSISTORS IN PLASTIC PACKAGE, SMD

Note


Chemical content for group representiveSOT23

Note

1. Optional: copper-plated NiFe leadframe.



− SOT23 8 2.9 × 1.3 × 0.9 3000

− SOT89 50 4.5 × 2.5 × 1.5 1000

− SOT143 8 2.9 × 1.3 × 0.9 3000

− SOT223 124 6.5 × 3.5 × 1.6 1000

SC70-3 SOT323 5 2.0 × 1.3 × 0.9 3000

− SOT343 6 2.0 × 1.3 × 0.9 3000

SC-59 SOT346 8 2.9 × 1.3 × 1.5 3000

SC70-5 SOT353 5 2.0 × 1.3 × 0.9 3000

SC70-6 SOT363 5 2.0 × 1.3 × 0.9 3000

SC-75 SOT416 2.5 1.6 × 0.8× 0.8 3000

SC-74 SOT457 11 2.9 × 1.0 × 1.5 3000


leadframe FeNi42(1) 2.6

SnPb20 plated 0.3



5.0

PACKING PART SUBSTANCE Mass (g)

box cardboard 56

reel polystyrene 74



labels paper 2.1

seal acrylate 0.2


CHAPTER 8

DATA HANDBOOK SYSTEM


May 1999 8 - 2


Data handbook system Chapter 8

DATA HANDBOOK SYSTEM

Philips Semiconductors data handbooks contain allpertinent data available at the time of publication and eachis revised and reissued regularly.

Loose data sheets are sent to subscribers to keep themup-to-date on additions or alterations made during thelifetime of a data handbook.

Catalogues are available for selected product ranges(some catalogues are also on floppy discs).

Our data handbook titles are listed here.

Integrated circuits

Book Title

IC01 Semiconductors for Radio, Audio and CD/DVDSystems

IC02 Semiconductors for Television and VideoSystems

IC03 Semiconductors for Wired Telecom Systems

IC04 HE4000B Logic Family CMOS

IC05 Advanced Low-power Schottky (ALS) Logic

IC06 High-speed CMOS Logic Family

IC11 General-purpose/Linear ICs

IC12 I2C Peripherals

IC13 Programmable Logic Devices (PLD)

IC14 8048-based 8-bit Microcontrollers

IC15 FAST TTL Logic Series

IC16 CMOS ICs for Clocks, Watches andReal Time Clocks

IC17 Semiconductors for Wireless Communications

IC18 Semiconductors for In-Car Electronics

IC19 ICs for Data Communications

IC20 80C51-based 8-bit Microcontrollers

IC22 Multimedia ICs

IC23 BiCMOS Bus Interface Logic

IC24 Low Voltage CMOS & BiCMOS Logic

IC25 16-bit 80C51XA Microcontrollers(eXtended Architecture)

IC26 Integrated Circuit Packages

IC27 Complex Programmable Logic Devices

Discrete semiconductors

MORE INFORMATION FROM PHILIPSSEMICONDUCTORS?

For more information about Philips Semiconductors datahandbooks, catalogues and subscriptions contact yournearest Philips Semiconductors national organization,select from the address list on the back cover of thishandbook. Product specialists are at your service andenquiries are answered promptly.

Book Title

SC01 Small-signal and Medium-power Diodes

SC03 Power Thyristors and Triacs

SC04 Small-signal Transistors

SC05 Video Transistors and Modules for Monitors

SC06 Power Bipolar Transistors

SC07 Small-signal Field-effect Transistors

SC11 Power Diodes

SC13 PowerMOS Transistors

SC14 RF Wideband Transistors

SC16 Wideband Hybrid Amplifier Modules for CATV

SC17 Semiconductor Sensors

SC18 Discrete Semiconductor Packages

SC19 RF & Microwave Power Transistors, RF PowerModules and Circulators/Isolators


May 1999 8 - 3


Data handbook ststem Chapter 8

OVERVIEW OF PHILIPS COMPONENTSDATA HANDBOOKS

Our sister product division, Philips Components, also hasa comprehensive data handbook system to support theirproducts. Their data handbook titles are listed here.

Display Components

Advanced Ceramics & Modules

BC Components

Book Title

DC01 Colour Television and Multimedia Tubes

DC02 Monochrome Monitor Tubes andDeflection Units

DC03 Television Tuners, Coaxial Aerial InputAssemblies

DC04 Colour Monitor and Multimedia Tubes

DC05 Wire Wound Components

ACM1 (MA01) Soft Ferrites

ACM2 Discrete Ceramics

ACM3 (MA03) Piezoelectric Ceramics andSpeciality Ferrites

PA01 Electrolytic Capacitors

PA02 Varistors, Thermistors and Sensors

PA03 Potentiometers

PA04 Variable Capacitors

PA05 Film Capacitors

PA06 Ceramic Capacitors

PA06a Surface Mounted Ceramic MultilayerCapacitors

PA06b Leaded Ceramic Capacitors

PA08 Fixed Resistors

PA10 Quartz Crystals

PA11 Quartz Oscillators

MORE INFORMATION FROMPHILIPS COMPONENTS?For more information contact your nearestPhilips Components national organization shown in thefollowing list.

Australia: North Ryde, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466

Austria: Wien, Tel. +43 1 60 101 12 41, Fax. +43 1 60 101 12 11

Belarus: Minsk, Tel. +375 172 200 924/733, Fax. +375 172 200 773

Benelux: Eindhoven, Tel. +31 40 2783 749, Fax. +31 40 2788 399

Brazil: São Paolo, Tel. +55 11 821 2333, Fax. +55 11 829 1849

Canada: Scarborough, Tel. 1 416 292 5161, Fax. 1 416 754 6248

China: Shanghai, Tel. +86 21 6354 1088, Fax. +86 21 6354 1060

Denmark: Copenhagen, Tel. +45 32 883 333, Fax. +45 31 571 949

Finland: Espoo, Tel. 358 9 615 800, Fax. 358 9 615 80510

France: Suresnes, Tel. +33 1 4099 6161, Fax. +33 1 4099 6493

Germany: Hamburg, Tel. +49 40 2489-0, Fax. +49 40 2489 1400

Greece: Tavros, Tel. +30 1 4894 339/+30 1 4894 239, Fax. +30 1 4814 240

Hong Kong: Kowloon, Tel. +852 2784 3000, Fax. +852 2784 3003

India: Mumbai, Tel. +91 22 4930 311, Fax. +91 22 4930 966/4950 304

Indonesia: Jakarta, Tel. +62 21 794 0040, Fax. +62 21 794 0080

Ireland: Dublin, Tel. +353 1 7640 203, Fax. +353 1 7640 210

Israel: Tel Aviv. Tel. +972 3 6450 444, Fax. +972 3 6491 007

Italy: Milano, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557

Japan: Tokyo, Tel. +81 3 3740 5135, Fax. +81 3 3740 5035

Korea (Republic of): Seoul, Tel. +82 2 709 1472, Fax. +82 2 709 1480

Malaysia: Pulau Pinang, Tel. +60 3 750 5213, Fax. +60 3 757 4880

Mexico: El Paso, Tel. +52 915 772 4020, Fax. +52 915 772 4332

New Zealand: Auckland, Tel. +64 9 815 4000, Fax. +64 9 849 7811

Norway: Oslo, Tel. +47 22 74 8000, Fax. +47 22 74 8341

Pakistan: Karachi, Tel. +92 21 587 4641-49,Fax. +92 21 577 035/+92 21 587 4546

Philippines: Manila, Tel. +63 2 816 6345, Fax. +63 2 817 3474

Poland: Warszawa, Tel. +48 22 612 2594, Fax. +48 22 612 2327

Portugal: Linda-A-Velha, Tel. +351 1 416 3160/416 3333,Fax. +351 1 416 3174/416 3366

Russia: Moscow, Tel. +7 95 755 6918, Fax. +7 95 755 6919

Singapore: Singapore, Tel. +65 350 2000, Fax. +65 355 1758

South Africa: Johannesburg, Tel. +27 11 470 5911, Fax. +27 11 470 5494

Spain: Barcelona, Tel. +34 93 301 63 12, Fax. +34 93 301 42 43

Sweden: Stockholm, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745

Switzerland: Zürich, Tel. +41 1 488 22 11, Fax. +41 1 481 7730

Taiwan: Taipei, Tel. +886 2 2134 2900, Fax. +886 2 2134 2929

Turkey: Istanbul, Tel. +90 212 279 2770, Fax. +90 212 282 6707

United Kingdom: Dorking, Tel. +44 1306 512 000, Fax. +44 1306 512 345

United States:• San Jose, Tel. +1 408 570 5600, Fax. +1 408 570 5700

• Ann Arbor, Tel. +1 734 996 9400, Fax. +1 734 761 27760

Yugoslavia (Federal Republic of): Belgrade,Tel. +381 11 625 344 / +381 11 3341 299, Fax. +381 11 635 777

Internet:• Advanced Ceramics & Modules: www.acm.components.philips.com

• Display Components: www.dc.comp.philips.com

For all other countries apply to:Philips Components, Marketing Communications, Building BF-1,P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands,Fax. +31-40-2722722

SC18 1999 .book : SC18 PREFACE 1999 i Wed May 12 … · Philips Semiconductors Discrete...

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Transcript of SC18 1999 .book : SC18 PREFACE 1999 i Wed May 12 … · Philips Semiconductors Discrete...