SATA-IO Industry Forum … ·  · 2012-07-24• Mobile Industry Processor Interface ... • Need...

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Last Update 2012/04/23 (KL) Agilent Technologies SATA-IO Cable Signal Integrity SATA-IO Plugfest #16 April 23-26, 2012

Transcript of SATA-IO Industry Forum … ·  · 2012-07-24• Mobile Industry Processor Interface ... • Need...

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Last Update 2012/04/23 (KL)

Agilent Technologies SATA-IO Cable Signal Integrity

SATA-IO Plugfest #16

April 23-26, 2012

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This session will show how to use the Agilent E5071C ENA

Network Analyzer Option TDR to make the measurements

required per the Serial ATA specification rev 3.1 for cable

assemblies.

Purpose

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We’re active in standards meetings, workshops, plugfests,

and seminars

Our solutions are driven and supported by Agilent experts

involved in international standards committees:

• Joint Electronic Devices Engineering Council (JEDEC)

• PCI Special Interest Group (PCI-SIG®)

• Video Electronics Standards Association (VESA)

• Serial ATA International Organization (SATA-IO)

• USB-Implementers Forum (USB-IF)

• Mobile Industry Processor Interface (MIPI) Alliance

• Optical Internetworking Forum (OIF)

Our customers test with highest confidence and achieve

compliance faster

Agilent Digital Standards Program

3

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Agilent SATA Total Solution Coverage

4

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• Serial ATA Revision 3.1

• Serial ATA Interoperability Program Revision 1.4.3

Unified Test Document Version 1.00

References

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SATA SI Test Items

Time Domain Measurements

SI-01 Mated Connector Impedance

SI-02 Cable Absolute Impedance

SI-03 Cable Pair Matching

SI-04 Common Mode Impedance

SI-05 Differential Rise Time

SI-06 Intra-Pair Skew

Frequency Domain Measurements

SI-07 Insertion Loss

SI-08 Differential to Differential Crosstalk: NEXT

Eye Diagram Analysis

SI-09 Inter-Symbol Interference

SATA SI Tests

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1. E5071C Network Analyzer with option TDR and one of the following options 4D5/4K5

2. Electronic Calibration Module N4433A

3. Four 3.5 mm cables and adapters of 20 GHz bandwidth or equivalent

4. 50 Ohm terminators to terminate unused channels (ex. Agilent 909D-301)

5. Two SATA plug fixtures. Recommended fixtures are listed below.

• Crescent Heart Software P/N TF-SATA-FE-ZP

• ICT Solutions P/N TF-1P21

• Wilder Technologies P/N SATA-TPA-P 600-1013-000

Resource Requirement

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State File on www.agilent.com/find/ena-tdr_sata-si for internal SATA and eSATA

- Mated Connector

Differential Impedance

- Cable Absolute

Differential Impedance

Trace1 (Tdd11)

Trace5 (Tdd22)

- Cable Pair Matching

Trace2 (T11)

Trace6 (T22)

Trace10(T33)

Trace14 (T44)

- Common Mode

Impedance

Trace3 (T11)

Trace7 (T22)

- Differential Rise Time

Trace4 (Tdd21)

- Intra-Pair Skew

Trace8 (T31)

Trace8 (T42)

- Insertion Loss

Trace1 (Sdd21)

- Differential-to-Differential Crosstalk: NEXT

Trace2 (Sdd21)

Channel1 Channel2

Cable and Fixture Connection

Fixture A/B Fixture B/A Fixture A Fixture B

50 Ohm

termination

SATA SI Measurement Setup

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SATA SI Measurement Setup

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SATA SI Measurement Setup

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SATA SI Tests

SATA SI Test Items

Time Domain Measurements

SI-01 Mated Connector Impedance

SI-02 Cable Absolute Impedance

SI-03 Cable Pair Matching

SI-04 Common Mode Impedance

SI-05 Differential Rise Time

SI-06 Intra-Pair Skew

Frequency Domain Measurements

SI-07 Insertion Loss

SI-08 Differential to Differential Crosstalk: NEXT

Eye Diagram Analysis

SI-09 Inter-Symbol Interference

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Before testing, don’t forget to perform the following:

• Time Domain Calibration

• Need to perform Fixture Compensation

• Rise Time Adjustment

• 70ps on Tr1,2,3,5,6,7,9,10,13,14 in ch1

• 35ps on Tr4,8,12 in ch1

• Frequency Domain Calibration

Calibration and Adjustment

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SI-01 Mated Connector Impedance

Observable Results:

Read Pass/Fail sign on Tr1 &5 (Item 1 in the following)

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SI-02 - Cable Absolute Impedance

Observable Results:

Read Pass/Fail sign on Tr9 &13(Item 2 in the following)

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SI-03 - Cable Pair Matching

Observable Results: Read the marker values on Trace2, Trace6, Trace10, and Trace14. (item3 in

Figure 7-1) If all conditions shown below are satisfied, then pass. Otherwise fail.

(Marker1 on Trace2) – (Marker1 on Trace6) < +-5 Ohm,

(Marker2 on Trace2) – (Marker2 on Trace6) < +-5 Ohm,

(Marker1 on Trace10) – (Marker1 on Trace14) < +-5 Ohm,

(Marker2 on Trace10) – (Marker2 on Trace14) < +-5 Ohm.

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SI-04 - Common Mode Impedance

Observable Results:

Read Pass/Fail sign on Tr3 &7 (Item 4 in the following)

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SI-05 - Differential Rise Time

Observable Results:

Read rise time on tr4. (Item 5 in the following)

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SI-06 - Intra-Pair Skew

Observable Results:

Read delta time between tr8 and tr12. (Item 6 in the following)

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Observable Results:

Read Pass/Fail sign on Tr1 (Item 1 in the following)

SI-07 - Insertion Loss

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Observable Results:

Read Pass/Fail sign on Tr2 (Item 1 in the following)

SI-08 - Differential to Differential Crosstalk: NEXT

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Observable Results:

Read Jitter p-p on the eye diagram. (item 1 in the following)

If Jitter p-p<50ps, then pass. Otherwise fail.

SI-09 – Inter- Symbol Interference

Lone Bit pattern on www.agilent.com/find/ena-tdr_sata-si

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• Purpose is to ensure that the cable does not cause a

interoperability Issue

• Test is comprised of three areas, Impedance, Timing,

Frequency content

• MOI available on SATA IO site or the following Agilent

web site:

www.agilent.com/find/ena-tdr_sata-si

• GRL and UNH-IOL, certified SATA Test Lab, support

ENA Option TDR

Summary

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Appendix

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Certified MOIs

Time

&

Frequency

•Cable/Connector

•Transmitter/Receiver (Hot TDR)

Frequency Time

&

Frequency

Time

&

Frequency

Time

&

Frequency

Test Centers Support ENA Option TDR

ENA Option TDR Compliance One-box Solution for TDR/S-parameter Compliance Test

For more detail about compliance test solution by the ENA Option TDR, visit www.agilent.com/find/ena-tdr_compliance

More Standards

Currently Under

Investigation

ENA Option TDR is used world wide by

certified test centers of USB, HDMI,

DisplayPort, and SATA

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3 Breakthroughs for Stressed Eye Diagram Analysis of Interconnects

Simple Setup and Operation

Complete Characterization

Affordable Solution

Summary

Comprehensive Signal Integrity Measurement Solution

for Next Generation High Speed Digital Standards

3 Breakthroughs for Hot TDR Measurements

ESD protection inside

Simple and Intuitive Operation

ESD Robustness

Fast & Accurate Measurements

www.agilent.com/find/ena-tdr

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Equipment Requirements for Latest Compliance Tests

New E5071C ENA Option TDR is designed to meet latest compliance test requirements with..

Capability of measuring Time Domain, Frequency Domain, and Eye Diagram in One-box

3 Breakthroughs to provide users advanced access to high speed serial interconnect analysis

Simple & Intuitive Operation for compliance tests

Fast & Accurate Measurement for efficient debug and troubleshooting

Robustness for lower cost of ownership

E5071C ENA Network Analyzer

Option TDR

+

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Simple & Intuitive Operation for Compliance Tests SATA Cable/Connector Measurement Example

Time Domain Measurements -Mated Connector Impedance

-Cable Absolute Impedance

-Cable Matching

-Common Mode Impedance

-Differential Rise Time

-Intra-Pair Skew

Frequency Domain Measurements -Insertion Loss

-Crosstalk

Eye Diagram -Inter-Symbol Interference

Measurement Result Example Note: Terminate unused ports with 50-ohm loads

Cable Under Test

Virtual Bit Pattern

Generator Lone Bit Pattern

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Proprietary ESD protection chip

significantly increase ESD

robustness, while at the same time

maintaining excellent RF

performance (22ps rise time for

20GHz models).

ENA has ESD protection circuits inside ESD Survival:

IEC 801-2 Human Body Model. (150 pF, 330 Ω) RF Output Center

pins tested to 3 kV, 10 cycles

Robustness for Lower Cost of Ownership High ESD Robustness

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Hot TDR Compliance Test What are Hot TDR Measurements?

Source Impedance Matched Source Impedance NOT Matched

Source Termination Effects (ADS simulation)

Hot TDR is the TDR/Return Loss measurements of active devices in the power-on state.

Why measure Hot TDR/Return Loss?

A portion of the transmitted signal is reflected from the receiver due to impedance mismatches. If the

transmitter is not impedance matched, additional reflections occur causing eye closure.

For impedance matched transmitters, the reflections from the receiver are terminated. For high speed

digital systems, impedance matching is critical for optimum signal integrity.

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Test Fixtures

Official Fixtures for testing

Hot TDR are required.

They are usually the same

fixtures as ones for cable

assemblies and connectors.

Below is an example set of

fixtures for SATA

compliance tests.

Available from Wilder

Technologies

• ENA Mainframe with bias-tee option

• E5071C-485: 4-port, 100kHz to 8.5GHz

• E5071C-4D5: 4-port, 300kHz to 14GHz

• E5071C-4K5: 4-port, 300kHz 20GHz

• Enhanced Time Domain Analysis Option

(Option TDR)

• Calibration Standard (One of below)

• ECal Module

• N4431B for E5071C-480/485

• N4433A for E5071C-4D5/4K5

• Mechanical Calibration Kit

• 85033E-100 for E5071C-480/485

• 85052D for E5071C-4D5/4K5

Hot TDR/Return Loss Compliance Test Configuration ENA Option TDR Typical Solution Configuration

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Frequency Domain (Gen 1~ Gen 3) Time Domain (Required for Gen 1)

TX

RX

Channel 1 Channel 2

•Pair Differential Impedane (Tdd22)

•Single-ended Impedance (T33, T44)

•Common Mode Impedance (Tcc22)

•Pair Differential Impedane (Tdd11)

•Single-ended Impedance (T11, T22)

•Common Mode Impedance (Tcc11)

•Differential Return Loss (Sdd11)

•Common Mode Return Loss (Scc11)

•Impedance Balance (Sdc11)

•Differential Return Loss (Sdd22)

•Common Mode Return Loss (Scc22)

•Impedance Balance (Sdc22)

Simple & Intuitive Operation for Compliance Tests SATA RXTX Measurement Parameters

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Simple & Intuitive Operation for Compliance Tests SATA RXTX MOI and Setup File

Available for download on Agilent.com… www.agilent.com/find/ena-tdr_compliance

MOI (Method of Implementation)

Step-by-step procedure on how

to measure the specified

parameters in the specification

document using ENA Option TDR.

State Files (48x,4D5, 4K5)

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Simple & Intuitive Operation for Compliance Tests SATA RXTX Measurement Example

Time Domain Measurements (Gen 1 Only) -Pair Differential Impedance

-Single-ended Impedance

-Common Mode Impedance

Frequency Domain Measurements (Gen 1 ~ Gen 3) -Differential Mode Return Loss

-Common Mode Return Loss

-Impedance Imbalance

Cable Under Test Measurement Result Example

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Fast & Accurate Measurement for Efficient Debug and

Troubleshooting ENA Narrowband Receiver

t

•wideband receiver captures all of the signal energy from

the transmitter

•To obtain a stable waveform, >300 times averaging is

necessary. Typically 10 ~ 60 min. for measurement

completion.

•narrowband receiver minimizes the effects of the data

signal from the transmitter

•In many cases, averaging is not necessary to obtain a

stable waveform. Typically 10 ~ 60 sec. for measurement

completion.

t t

t

t

t

Tx Tx

Fast & Accurate Measurements ENA Option TDR Traditional TDR Oscilloscope

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Robustness for Lower Cost of Ownership Internal Bias-tee

•Internal Bias-Tees Some devices need DC bias to be activated for Hot TDR measurements

ENA has internal bias-tees on each test port, and DC bias can easily be applied to the device

Bias Input Ports (+/- 35VDC)

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2.8. Electrical – Cable Assembly – Standard

Internal and eSATA Gen1

(1.5 Gb/s)

Gen2

(3.0 Gb/s)

Gen3

(6.0 Gb/s)

SI-01 Mated Connector Impedance

SI-02 Cable Absolute Impedance

SI-03 Cable Pair Matching

SI-04 Common Mode Impedance

SI-05 Differential Rise Time

SI-06 Intra-Pair Skew

SI-07 Insertion Loss

SI-08 Differential to Differential Crosstalk: NEXT

SI-09 Inter-Symbol Interference

2.14. Phy Transmitter Requirements Gen1

(1.5 Gb/s)

Gen2

(3.0 Gb/s)

Gen3

(6.0 Gb/s)

TX-01 Pair Differential Impedance

TX-02 Single-Ended Impedance (Obsolete)

TX-03 Gen2(3Gb/s) Differential Mode Return Loss

TX-04 Gen2(3Gb/s) Common Mode Return Loss

TX-05 Gen2(3Gb/s) Impedance Imbalance

TX-06 Gen1(1.5Gb/s) Differential Mode Return Loss

TX-07 Gen3(6Gb/s) Differential Mode Return Loss

TX-08 Gen3(6Gb/s) Impedance Imbalance

TX-01 Pair Differential Impedance

2.16. Phy Receiver Requirements Gen1

(1.5 Gb/s)

Gen2

(3.0 Gb/s)

Gen3

(6.0 Gb/s)

RX-01 Pair Differential Impedance

RX-02 Single-Ended Impedance (Obsolete)

RX-03 Gen2(3Gb/s) Differential Mode Return Loss

RX-04 Gen2(3Gb/s) Common Mode Return Loss

RX-05 Gen2(3Gb/s) Impedance Imbalance

RX-06 Gen1(1.5Gb/s) Differential Mode Return Loss

RX-07 Gen3(6Gb/s) Differential Mode Return Loss

RX-08 Gen3(6Gb/s) Impedance Imbalance

RX-01 Pair Differential Impedance