Salland Corporate Presentation · 2019. 6. 13. · API, control sw, register mapping,...
Transcript of Salland Corporate Presentation · 2019. 6. 13. · API, control sw, register mapping,...
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Welcome!
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A warm welcome to our guests!
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Salland Engineering at a glance
12 June 2019 © 2019, Salland Engineering (Europe) B.V., All rights reserved 3
Test Application Solutions• Fast & Qualified new product introduction
ATE Instrument Solutions• Industrializing your Test Solutions
Supply Chain & Test Services• Delivering qualified Parts, Products & ATE Solutions
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Last year: Launch Test Technology Center
• Development of ‘’fundamental test technology’’• Acquisition of • Cooperation with Technical Universities• Working on new test technology for
▶ IO and (HV), DPS Core’s▶ MEMS, RF/Radar, SerDes, Photonics ▶ Tooling to make Test & Instrument engineering easier
• Deliver testsolutions to▶ All key ATE players▶ Many semiconductor companies
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Advanced test production including engineering support
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Our role in the Test Technology Eco system…
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Close cooperation with end customers and partners to deliver solutions that work
ATE & PXI Manufacturers
Semicon IDM, Fabless, Subcons
Technical Universities
Consortia/Tech programs
Manufacturing Partners
Technology Partners
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…Makes us Partner of industry market leaders
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Supply Chain & Test ServicesPCB design, Manufacturing and low to mid volume Production Testing
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Sample and (medium) volume production test
We offer
• Seamless Product Qualification▶ According to JEDEC & Q100
• Sample & Production test• Product Engineering
▶ Data, yield analysis optimization, test
• Direct engineering NPI support▶ Mature process parameters▶ Fast & advance analysis
Our capacity & capability
• Equipment available for ▶ Engineering & Qualification (NPI)▶ Production test
• Turn Key processing▶ Testing, Go/NoGo▶ Retest & QA cylcle’s▶ Temperature cycle & read points▶ Packaging: bake, sealing
• Reporting
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With extensive engineering support
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Supply Chain & Production Test Services
ATE equipment
Teradyne UltraFLEX 24-slot▶ RF UltraWAVE24
Teradyne UltraFLEX 12-slotTeradyne FLEX-RF & µFLEXTeradyne J750
▶ 1024 channel head
Exploring other platforms
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Services
Final (sample) testingWafer test at 6, 8 and 12’’CharacterizationQuality & Reliability analysis
Handling equipment
TEL P–12XLm prober▶ 6, 8 & 12“ with hot chuck
TSK - UF200 proberChroma 3160C
▶ Production handler 3-temp.
Exatron 903, Esmo Talos▶ Engineering handler 3-temp
Thermonics T-2500E
Quick, Reliable & Independent Production Test including Test Engineering
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New technology development
• Data Analysis tool for quick and advanced Analysis▶ Made by the inventors & creators of SEDANA▶ Tooling for both Application and Instrument Engineering
Quick analysis of large amounts of data Easy site/channel correlation & investigation find the ‘’needle in the haystack’’
• High Density, low-cost Pin channel up to 500MHz• Extreme low Current and low Capacitance test circuitry• High Voltage DPS/VI to address 80V and higher• SerDes test modules up to 100+Gb (PAM4/x)
▶ Including ATE-drivers, integration and application support
• Exploring new technologies together with our partners▶ Photonics testing▶ MEMS Testing without physical stimulus, incl. correlation/validation service
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Tooling and Test Technology that cover the real needs….. Will be available as OEM blocks
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Data Analysis Tool ‘DPLUS’Easy data analysis for Application and Instrument Engineers
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Positioning of DPLUS
Not for plant optimization or process control
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Test Data analysis toolto support engineers
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Engineering Data Analysis Tooling
• Focusing on right data▶ Selection data▶ Filtering (site, channel, etc.)▶ Limit management/simulation
• Tables to select main topics
• Graphs to discover trends
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Easy to find ‘’the needle in the haystack’’
Launch: Q3
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High LevelFeature List
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Group Use cases ResultReader Load a dataset and view dataset information Basic TableWriter Export datasetFilter Filter out unwanted information Filtered Table
Split dataset using filters Multiple Filtered TablesLimit Create and edit limit set Limit Table
Applying a limit set Updated raw table, statistics tableImport and export limit set
Chart Create a trend chart Trend chartUse histogram to view distribution HistogramCreate pareto summary plot Pareto chartView normality of tests Probability chartAnalyze wafer binning Wafer bin mapAnalyze wafer measurements Parametric wafer map (3D)Compare measurements in 3D plot Generic 3D plotCompare variations between trials and appraisals Delta chartCheck consistency of 2 appraisers Scatter chartCompare measurements from multiple data sets Box chart
Table Check dataset result Basic tableCheck test capability Capability tableCheck test repeatability Repeatability tableCheck test reproducibility Reproducibility tableCustom data set columns Updated basic tableAuto detect number of test runs Updated basic tableCheck measurement variability Range tableChange the order of tests in dataset Updated basic table
Project Automation of data processing (GUI) Save as project, load projectAutomation of data processing (CLI) Command Line Interface
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SE-DPINNew Salland PXIe Instruments
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PCIe
FPGA
DC - DC
Support electronics
DUT interface
Mystery
Mystery
Mystery
Mystery
Mystery
Mystery
Mystery
Mystery
Implementation of PCIe in PC cards & ATE instruments
Implementations for ATE and bench
-40V .. 110VLinear suppliesSwitching supplies
Experience with digital I/O ATE ASICSAPI, control sw, register mapping, characterization, bench board development, ATE production test solution.We developed a Bench board for a Digital I/O ASIC for Elevate and running production of this ASIC (ATE test program)
Working on:Mystery, Bench board design, API, Control SW, ATE test application.
Experience with ATE instrument FPGAs control for VI, PMU, DPSParallel processingProtocol awareXilinx
Cal resourcesADCsHigh accurate measurement electronics (I, V)Etc.
Multiple ATE interfaces.Direct connectionPogo solutionCable solution
Timing Generation
SE experience overview
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SE-DPIN Specification (200+MHz)
• Pin Electronics Driver/Comparator▶ Dual Mode3-level Driver with Hi-Z Capability (DVH, DVL, ▶ 5 Current Ranges (±2μA, ±20μA, ±200μA, ±2mA, ±50mA) ▶ Programmable Voltage and Current Clamps
• Resistive Load Function (5 Selectable Resistor Values) • Per Pin Active Load
▶ - ±24mA Maximum Current ▶ - Independently Programmable Current Source, Current Sink, and Commutating Voltage levels
• Per Pin Timing Deskew▶ Propagation Delay Adjustment ▶ 5ns Delay Adjustment Range
• Per Pin PMU ▶ FV, FI, MV, MI ▶ 4 Quadrant Operation ▶ 2V to +6V FV/MV Range
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High-Density DPS PXIe boardConcept
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Preliminary Specification
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Specification Configuration A
Form-factor Single slot, 3U PXI Single slot, 19” PXI
Channel quantity 48 DPS 256 DPS
Connections 48x(HiF, HiS), 6x DGS, GND 256x(HiF, HiS), 32x DGS, GND
Mode FV, FI, MV, MI, HiZ
Voltage / Current10V , 500mA-2V, -100mA
Ganging I 8 channels
Channel independency Yes
Per channel ADC Yes
Voltage and current clamps Yes
Max sampling rate 200kSPS
Capture / Source memory 4k per channel
Temperature sensor Per 8 channels
ProtectionOver-temperature alarm
Over-current alarmKelvin alarm
In AXI Format we expect we can fit 192 DPS channels
per card. (Power/cooling to be checked)
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SE-DPS concept
Notes: - Maximum voltage / current not available on all channels simultaneously because of the PXIe slot power restrictions (maximum 82W)- During instrument development a calculation tool will be provided which supports the user to calculate the actual board power.- For 19”formfactor assumed there are no restriction in terms of power and cooling capacity
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Single slot, 3U PXI
Single slot, 19” PXI
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New technology: Photonics testing
We participate in
Targets photonic eco system▶ Reliable production in the Netherlands▶ Application driven▶ Shared infrastructure
Targets Salland Engineering▶ Offer Reliable test solutions▶ Instrument development▶ Application support
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New technology: Dynamic MEMS Solution
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Best of both worlds!
Regular ATE
▶ DPS▶ Digital I/O▶ PMU▶ AWG/DIG▶ DUT Power▶ Supplies
MEMS Solution
SΣ
LeakageTest
InputResponse
Range ofMotion Capacitance
Test Flow Example
Leakage
Currents
Resonant FrequencyQ, Damping Ratio
Spring ConstantSnap Voltage, HysteresisTest Output
CV Curves
MEMS Solution
Hardware▶ Pico PMU (pA/nA)▶ Capacitance (pF/fF)▶ External LCR connections▶ Memory/uC to collect and pre-
process data (STDF & CSV)
Tooling▶ Hardware control ▶ Data Analysis
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Salland will combine IP to offer new solutions
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Most of the IP is already developed or is ongoing and needs to be combined
Low capacitance
Low current
AWG/DIG
Processing power
MEMS, Sensor, IoTTest Technology
Modules
PXIe card
ATEx
Target Markets:• MEMS• IoT• Sensors• etc
RF/wirelessMEMS Test Technology
Partners
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Agenda Wednesday, June 5
12:00-12:45
13:00 - 14:30 Session 1 - MEMS GENERAL
14:30-14:45
14:45 - 16:15 Session 2 - MEMS TECHNOLOGY
16:15-16:30
16:30 - 17:30 Session 3 - MEMS SUPPLY CHAIN
17:30 - 18:00
Salland 18:00-19:00
Lumen 19:30
BREAK
Social Network Event (drinks and dinner)
MA
C3P
AR
K
Bu
sin
ess
Lo
ge
Registration & lunch buffet
Tour Salland Engineering facilities
Walk to Salland
BREAK