RTEMS Reference Manualeh60/spring2006/EE 458...Game Boy Advance registers. 4.5 gba/irq/ Directory...

RTEMS Reference ManualGame Boy Advance BSP

Generated by Doxygen 1.4.1

Wed Mar 9 19:39:16 2005

CONTENTS 1

Contents

1 RTEMS Directory Hierarchy 1

2 RTEMS Data Structure Index 1

3 RTEMS File Index 2

4 RTEMS Directory Documentation 3

5 RTEMS Data Structure Documentation 7

6 RTEMS File Documentation 11

1 RTEMS Directory Hierarchy

1.1 RTEMS Directories

This directory hierarchy is sorted roughly, but not completely, alphabetically:

gba 4

clock 3

console 3

include 4

irq 5

start 5

startup 6

timer 7

2 RTEMS Data Structure Index

2.1 RTEMS Data Structures

Here are the data structures with brief descriptions:

__rtems_irq_connect_data__(Irq connection data structure ) 7

BgAffineDestData(BG Affine Transformation Destination Data Structure ) 9

Generated on Wed Mar 9 19:39:16 2005 for RTEMS by Doxygen

3 RTEMS File Index 2

3 RTEMS File Index

3.1 RTEMS File List

Here is a list of all files with brief descriptions:

gba/clock/clockdrv.c (Game Boy Advance Clock driver ) 11

gba/console/conio.c(This file contains the GBA conio I/O package ) 14

gba/console/console.c(This file contains the GBA console I/O package ) 29

gba/console/defaultfont.c (This file contains default font definitions ) 37

gba/include/asm_macros.h(This include file contains definitions related to the GBA BSP ) 38

gba/include/bsp.h(This include file contains definitions related to the ARM BSP ) 39

gba/include/conio.h(This file contains the GBA conio I/O package ) 42

gba/include/gba.h(BSP header file ) 52

gba/include/irq.h (This include file describe the data structure and the functions implementedby rtems to write interrupt handlers ) 56

gba/include/mode_bits.h(ARM statusregister mode bits ) 62

gba/include/registers.h(Game Boy Advance registers ) 65

gba/irq/bsp_irq_asm.S(Intererrupt handler for GameBoy Advance ) 152

gba/irq/bsp_irq_init.c (This file contains the implementation of rtems initialization related tointerrupt handling ) 153

gba/irq/irq.c (This file contains the implementation of the function described inirq.h ) 154

gba/irq/irq_asm.S(This file contains the implementation of the IRQ handler ) 158

gba/irq/irq_init.c (This file contains the implementation of rtems initialization related to in-terrupt handling ) 159

gba/start/logo.S(RTEMS GBA BSP ) 161

gba/start/start.S (RTEMS entry point ) 161

gba/startup/bspstart.c(This file contains the ARM BSP startup package ) 163

gba/startup/cpu.c(ARM CPU Dependent Source ) 171

gba/startup/cpu_asm.S(This file contains the implementation of exception handlers ) 175

gba/startup/exit.c (Routines to shutdown and reboot the BSP ) 175

gba/startup/linkcmds (BSP linker script ) 177

gba/timer/timer.c (GBA Timer driver ) 177


4 RTEMS Directory Documentation 3

4 RTEMS Directory Documentation

4.1 gba/clock/ Directory Reference

gba

clock

include

3

Files

• file clockdrv.c

Game Boy Advance Clock driver.

4.2 gba/console/ Directory Reference

gba

console

include

6

Files

• file conio.c

This file contains the GBA conio I/O package.

• file console.c

This file contains the GBA console I/O package.

• file defaultfont.c

This file contains default font definitions.


4.3 gba/ Directory Reference 4

4.3 gba/ Directory Reference

gbaclock

include3

console

6

irq

12

start

1

startup

7

timer

3

Directories

• directoryclock• directoryconsole• directoryinclude• directoryirq• directorystart• directorystartup• directorytimer

4.4 gba/include/ Directory Reference

gba

include

Files

• file asm_macros.h

This include file contains definitions related to the GBA BSP.

• file bsp.h

This include file contains definitions related to the ARM BSP.

• file conio.h


• file gba.h

BSP header file.

• file irq.h

This include file describe the data structure and the functions implemented by rtems to write interrupthandlers.

• file mode_bits.h


4.5 gba/irq/ Directory Reference 5

ARM statusregister mode bits.

• file registers.h

Game Boy Advance registers.

4.5 gba/irq/ Directory Reference

gba

irq

include

12

Files

• file bsp_irq_asm.S

Intererrupt handler for GameBoy Advance.

• file bsp_irq_init.c

This file contains the implementation of rtems initialization related to interrupt handling.

• file irq.c

This file contains the implementation of the function described inirq.h.

• file irq_asm.S

This file contains the implementation of the IRQ handler.

• file irq_init.c


4.6 gba/start/ Directory Reference

gba

start

include

1


4.7 gba/startup/ Directory Reference 6

Files

• file logo.S

RTEMS GBA BSP.

• file start.S

RTEMS entry point.

4.7 gba/startup/ Directory Reference

gba

startup

include

7

Files

• file bspstart.c

This file contains the ARM BSP startup package.

• file cpu.c

ARM CPU Dependent Source.

• file cpu_asm.S

This file contains the implementation of exception handlers.

• file exit.c

Routines to shutdown and reboot the BSP.

• file linkcmds

BSP linker script.


4.8 gba/timer/ Directory Reference 7

4.8 gba/timer/ Directory Reference

gba

timer

include

3

Files

• file timer.c

GBA Timer driver.

5 RTEMS Data Structure Documentation

5.1 __rtems_irq_connect_data__ Struct Reference

irq connection data structure

#include <irq.h >

Collaboration diagram for __rtems_irq_connect_data__:

__rtems_irq_connect_data__

+ name+ hdl+ on+ off+ isOn+ irqLevel+ irqTrigger

rtems_irq_disable

off

rtems_irq_is_enabled

isOn

rtems_irq_symbolic_name

name

rtems_irq_hdl

hdl

rtems_irq_trigger

irqTrigger

rtems_irq_level

irqLevel

rtems_irq_enable

on

Data Fields

• rtems_irq_symbolic_namename

IRQ line.

• rtems_irq_hdlhdl

handler.

• rtems_irq_enableon


5.1 __rtems_irq_connect_data__ Struct Reference 8

function for enabling interrupts at device level (ONLY!).

• rtems_irq_disableoff

function for disabling interrupts at device level (ONLY!).

• rtems_irq_is_enabledisOn

function enabling to know what interrupt may currently occur if someone manipulates the i8259s interruptmask without care...

• rtems_irq_levelirqLevel

irq priority level

• rtems_irq_triggerirqTrigger

Trigger way : Rising or falling edge or High or low level.

5.1.1 Detailed Description


Definition at line 86 of file irq.h.

5.1.2 Field Documentation

5.1.2.1 rtems_irq_hdl __rtems_irq_connect_data__::hdl

handler.

See comment on handler properties below in function prototype.


5.1.2.2 rtems_irq_level__rtems_irq_connect_data__::irqLevel

irq priority level


5.1.2.3 rtems_irq_trigger __rtems_irq_connect_data__::irqTrigger

Trigger way : Rising or falling edge or High or low level.


5.1.2.4 rtems_irq_is_enabled__rtems_irq_connect_data__::isOn

function enabling to know what interrupt may currently occur if someone manipulates the i8259s interruptmask without care...


5.1.2.5 rtems_irq_symbolic_name__rtems_irq_connect_data__::name

IRQ line.



5.2 BgAffineDestData Struct Reference 9

5.1.2.6 rtems_irq_disable__rtems_irq_connect_data__::off

function for disabling interrupts at device level (ONLY!).

The code will disable it at i8259s level. RATIONALE : anyway such code has to exist for clean shutdown.It is usually called BEFORE disconnecting the interrupt. RTEMS may well need such a function whendisabling normal interrupt processing for a debug session. May well be a NOP function.


5.1.2.7 rtems_irq_enable__rtems_irq_connect_data__::on

function for enabling interrupts at device level (ONLY!).

The BSP code will automatically enable it at i8259s level. RATIONALE : anyway such code has to existin current driver code. It is usually called immediately AFTER connecting the interrupt handler. RTEMSmay well need such a function when restoring normal interrupt processing after a debug session.


The documentation for this struct was generated from the following file:

• gba/include/irq.h

5.2 BgAffineDestData Struct Reference

BG Affine Transformation Destination Data Structure.

Collaboration diagram for BgAffineDestData:

BgAffineDestData

+ H_DiffX+ V_DiffX+ H_DiffY+ V_DiffY+ StartX+ StartY

signed16

V_DiffXV_DiffYH_DiffXH_DiffY

signed32

StartXStartY

Data Fields

• signed16H_DiffX

Line Direction X Coordinate Difference.

• signed16V_DiffX

Vertical Direction X Coordinate Difference.

• signed16H_DiffY


5.2 BgAffineDestData Struct Reference 10

Line Direction Y Coordinate Difference.

• signed16V_DiffY

Vertical Direction Y Coordinate Difference.

• signed32StartX

Start X Coordinate.

• signed32StartY

Start Y Coordinate.


BG Affine Transformation Destination Data Structure.

Definition at line 66 of file conio.c.

5.2.2 Field Documentation

5.2.2.1 signed16BgAffineDestData::H_DiffX

Line Direction X Coordinate Difference.


5.2.2.2 signed16BgAffineDestData::H_DiffY

Line Direction Y Coordinate Difference.


5.2.2.3 signed32BgAffineDestData::StartX

Start X Coordinate.


5.2.2.4 signed32BgAffineDestData::StartY

Start Y Coordinate.


5.2.2.5 signed16BgAffineDestData::V_DiffX

Vertical Direction X Coordinate Difference.


5.2.2.6 signed16BgAffineDestData::V_DiffY

Vertical Direction Y Coordinate Difference.



6 RTEMS File Documentation 11

The documentation for this struct was generated from the following file:

• gba/console/conio.c

6 RTEMS File Documentation

6.1 gba/clock/clockdrv.c File Reference


#include <rtems.h >

#include <bsp.h >

#include <irq.h >

#include <gba.h >

#include "../../../shared/clockdrv_shell.c"

Include dependency graph for clockdrv.c:

gba/clock/clockdrv.c

rtems.h

bsp.h

irq.h

gba.h

../../../shared/clockdrv_shell.c

bspopts.h

iosupp.h

console.h

clockdrv.h

registers.h

Defines

• #defineCLOCK_VECTOR0• #defineClock_driver_support_at_tick()• #defineClock_driver_support_install_isr(_new, _old)• #define__TimTickTime_us((1000000L/__ClockFrequency)∗__TimPreScaler)• #define__TimTickTime_ns((1000000000L/__ClockFrequency)∗__TimPreScaler)• #defineGBA_TMCNT_PS0x0003• #defineClock_driver_support_shutdown_hardware()

Functions

• rtems_isrClock_isr(rtems_vector_number vector)• static voidclock_isr_on(constrtems_irq_connect_data∗unused)

This function is empty.

• static voidclock_isr_off(constrtems_irq_connect_data∗unused)



6.1 gba/clock/clockdrv.c File Reference 12

• static intclock_isr_is_on(constrtems_irq_connect_data∗irq)


• void Clock_driver_support_initialize_hardware()

This function set up the clock hardware.

Variables

• rtems_irq_connect_dataclock_isr_data• rtems_configuration_tableBSP_Configuration

Our copy of BSP configuration table from the application.



RTEMS GBA BSP

Copyright (c) 2004 Markku Puro<[email protected] >

The license and distribution terms for this file may be found in found in the file LICENSE in this distributionor athttp://www.rtems.com/license/LICENSE.

clockdrv.c,

Definition in fileclockdrv.c.

6.1.2 Define Documentation

6.1.2.1 #define __TimTickTime_ns ((1000000000L/__ClockFrequency)∗__TimPreScaler)

Definition at line 57 of file clockdrv.c.

Referenced by Clock_driver_support_initialize_hardware().

6.1.2.2 #define __TimTickTime_us ((1000000L/__ClockFrequency)∗__TimPreScaler)


6.1.2.3 #define Clock_driver_support_at_tick()


6.1.2.4 #define Clock_driver_support_install_isr(_new, _old)

Value:

do { \BSP_install_rtems_irq_handler(&clock_isr_data); \

} while(0)



mailto:[email protected]

http://www.rtems.com/license/LICENSE.

6.1 gba/clock/clockdrv.c File Reference 13

6.1.2.5 #define Clock_driver_support_shutdown_hardware()

Value:

do { \BSP_remove_rtems_irq_handler(&clock_isr_data); \

} while (0)


6.1.2.6 #define CLOCK_VECTOR 0


6.1.2.7 #define GBA_TMCNT_PS 0x0003



6.1.3 Function Documentation

6.1.3.1 void Clock_driver_support_initialize_hardware ()

This function set up the clock hardware.

Input parameters: Output parameters:


References __TimTickTime_ns, BSP_Configuration, GBA_REG_TM3CNT, GBA_REG_TM3D, andGBA_TMCNT_PS.

81 {82 int tmreload = ((BSP_Configuration.microseconds_per_tick * 1000)/__TimTickTime_ns);8384 if(tmreload>0xFFFF) tmreload = 0xFFFF;85 GBA_REG_TM3CNT = (GBA_TMCNT_PS);86 GBA_REG_TM3D = (0x0000-tmreload);87 GBA_REG_TM3CNT = (0x00c0|GBA_TMCNT_PS);88 }

6.1.3.2 rtems_isr Clock_isr (rtems_vector_numbervector)

6.1.3.3 static int clock_isr_is_on (constrtems_irq_connect_data∗ irq) [static]


Input parameters: Output parameters:


126 {127 return 1;128 }


6.2 gba/console/conio.c File Reference 14

6.1.3.4 static void clock_isr_off (constrtems_irq_connect_data∗ unused) [static]


Input parameters:

Output parameters:


115 {116 return;117 }

6.1.3.5 static void clock_isr_on (constrtems_irq_connect_data∗ unused) [static]


Input parameters:

Output parameters:


103 {104 return;105 }

6.1.4 Variable Documentation

6.1.4.1 rtems_configuration_tableBSP_Configuration


Definition at line 54 of file bspstart.c.

Referenced by bsp_start_default(), and Clock_driver_support_initialize_hardware().

6.1.4.2 rtems_irq_connect_dataclock_isr_data

Initial value:

{BSP_IRQ_TIMER3,(rtems_irq_hdl)Clock_isr,

clock_isr_on,clock_isr_off,clock_isr_is_on,0,0 }


6.2 gba/console/conio.c File Reference


#include <rtems/score/types.h >

#include <gba.h >



#include <conio.h >

#include <stdio.h >

#include <stdarg.h >

#include "defaultfont.c"

Include dependency graph for conio.c:

gba/console/conio.c

rtems/score/types.h

gba.h

conio.h

stdio.h

stdarg.h

defaultfont.c

registers.h

Defines

• #defineW 60

Screen width.

• #defineH 26

Screen height.

• #defineCLRSCR_SIZE(W∗4 ∗ H∗6)

Screen size.

• #defineDEFAULT_FONT_WIDTH4

Font width.

• #defineDEFAULT_FONT_HEIGHT6

Font height.

• #defineVRAM GBA_VRAM_ADDR

VRAM address.

• #defineVRAM_END (VRAM + 0x18000)

VRAM end.

• #defineBG_BITMAP0_VRAM (VRAM + 0x0)

BG Bitmap 0 RAM.

• #defineBG_BITMAP1_VRAM (VRAM + 0xa000)

BG Bitmap 1 RAM.

• #definebg_bitmap0(∗(Bitmap4∗)BG_BITMAP0_VRAM)• #definebg_bitmap1(∗(Bitmap4∗)BG_BITMAP1_VRAM)



• #definebg_bitmap3(∗(Bitmap3∗)BG_BITMAP0_VRAM)• #definebg_bitmap4a(∗(Bitmap4∗)BG_BITMAP0_VRAM)• #definebg_bitmap4b(∗(Bitmap4∗)BG_BITMAP1_VRAM)• #definebg_bitmap5a(∗(Bitmap5∗)BG_BITMAP0_VRAM)• #definebg_bitmap5b(∗(Bitmap5∗)BG_BITMAP1_VRAM)• #defineRGB(r, g, b) ( (r)<<0 | (g)<<5 | (b)<<10 )

Color conversion macro.

• #definerBg2Affine (∗(vBgAffineDestData∗)0x4000020)• #definebg_palette(∗(Palette∗)(GBA_PAL_RAM_ADDR))

256 colors for background(s)

Typedefs

• typedef unsigned shortPalette[256]

256 colors

• typedef unsigned shortPalettes[16][16]

16 palettes with each 16 colors

• typedef unsigned shortBitmap3[GBA_LCD_HEIGHT][GBA_LCD_WIDTH]

16 bits, single buffered

• typedef unsigned charBitmap4[GBA_LCD_HEIGHT][GBA_LCD_WIDTH]

8 bits, double buffered

• typedef unsigned shortBitmap5[GBA_MODE5_HEIGHT][GBA_MODE5_WIDTH]

double buffered

• typedef volatileBgAffineDestDatavBgAffineDestData

Functions

• void gba_gotoxy(int _x, int _y)

gba_gotoxy function set screeen xy-coordinates

• void gba_putchar(char c, int textattr, int x, int y)

gba_putchar function writes char-data to screen memory.

• void gba_textattr(int _attr)

gba_textattr function set textattribute

• void gba_textbackground(int _color)

gba_textbackground function set text background color

• void gba_textcolor(int _color)

gba_textcolor function set text color



• void gba_clearline(int y)

gba_clearline function clear line nro y

• void gba_nextline()

gba_nextline function moves cursor to next line and clears it

• void gba_clrscr()

gba_clrscr function clear screen

• void gba_put(char _c)

gba_put function convert ascii char to font index and write char to screen memory

• void gba_putch(char _c)

gba_putch function write ascii chars to screen

• void gba_puts(const char∗_str)

gba_puts function write ascii string to screen

• int gba_printf(const char∗_format,...)

gba_printf function do formated printf

• void gba_initconio()

gba_initconio function initialize console

• void gba_textmode(int _mode)

gba_textmode function set console mode

• void delay_loop(unsigned int count)

delay_loop function is simple delay loop

• chargba_getch(void)

gba_getch function read char from game pad keys

Variables

• int _wherex

Screen X coordinate.

• int _wherey

Screen Y coordinate.

• int _textattr

Text attribute.

• static unsigned charinputch= ASCII_CR

input character value





RTEMS GBA BSP



Definition in fileconio.c.


6.2.2.1 #define bg_bitmap0 (∗(Bitmap4 ∗)BG_BITMAP0_VRAM)


6.2.2.2 #define BG_BITMAP0_VRAM (VRAM + 0x0)

BG Bitmap 0 RAM.




6.2.2.4 #define BG_BITMAP1_VRAM (VRAM + 0xa000)

BG Bitmap 1 RAM.




6.2.2.6 #define bg_bitmap4a (∗(Bitmap4 ∗)BG_BITMAP0_VRAM)


Referenced by gba_putchar().

6.2.2.7 #define bg_bitmap4b (∗(Bitmap4 ∗)BG_BITMAP1_VRAM)


6.2.2.8 #define bg_bitmap5a (∗(Bitmap5 ∗)BG_BITMAP0_VRAM)


6.2.2.9 #define bg_bitmap5b (∗(Bitmap5 ∗)BG_BITMAP1_VRAM)






6.2.2.10 #define bg_palette (∗(Palette∗)(GBA_PAL_RAM_ADDR))

256 colors for background(s)


Referenced by gba_initconio().

6.2.2.11 #define CLRSCR_SIZE (W∗4 ∗ H∗6)

Screen size.


6.2.2.12 #define DEFAULT_FONT_HEIGHT 6

Font height.


6.2.2.13 #define DEFAULT_FONT_WIDTH 4

Font width.


6.2.2.14 #define H 26

Screen height.


Referenced by gba_clrscr(), and gba_nextline().

6.2.2.15 #define rBg2Affine (∗(vBgAffineDestData∗)0x4000020)



6.2.2.16 #define RGB(r, g, b) ( (r)<<0 | (g)<<5 | (b)<<10 )

Color conversion macro.



6.2.2.17 #define VRAM GBA_VRAM_ADDR

VRAM address.


6.2.2.18 #define VRAM_END (VRAM + 0x18000)

VRAM end.




6.2.2.19 #define W 60

Screen width.


Referenced by gba_clearline(), and gba_putch().

6.2.3 Typedef Documentation

6.2.3.1 typedef unsigned shortBitmap3[GBA_LCD_HEIGHT][GBA_LCD_WIDTH]

16 bits, single buffered


6.2.3.2 typedef unsigned charBitmap4[GBA_LCD_HEIGHT][GBA_LCD_WIDTH]

8 bits, double buffered


6.2.3.3 typedef unsigned shortBitmap5[GBA_MODE5_HEIGHT][GBA_MODE5_WIDTH]

double buffered


6.2.3.4 typedef unsigned shortPalette[256]

256 colors


6.2.3.5 typedef unsigned shortPalettes[16][16]

16 palettes with each 16 colors


6.2.3.6 typedef volatileBgAffineDestDatavBgAffineDestData



6.2.4.1 void delay_loop (unsigned intcount)

delay_loop function is simple delay loop

Input parameters:

Output parameters:


Referenced by gba_getch().



348 {349 int i;350 for(i = 0; i<count; i++) i = i;351 }

6.2.4.2 void gba_clearline (inty)

gba_clearline function clear line nro y

Line is filled with spaces

Input parameters:

Output parameters:


References _textattr, gba_putchar(), and W.

Referenced by gba_clrscr(), and gba_nextline().

180 { int x;181182 for(x=0 ; x<=W ; x++) gba_putchar(0, _textattr, x, y);183 }

Here is the call graph for this function:

gba_clearline gba_putchar

6.2.4.3 void gba_clrscr ()


Input parameters:

Output parameters:


References gba_clearline(), gba_gotoxy(), and H.


207 {208 int y;209210 for(y=0 ; y<=H ; y++) gba_clearline(y);211 gba_gotoxy(0,0);212 }


gba_clrscr

gba_clearline

gba_gotoxy

gba_putchar



6.2.4.4 char gba_getch (void)


Character input is done with GBA buttons, up-down-left-right/A/B/R/L/Select/Start

• Select-key accept selected character

• Start-key read CR (Enter)

• A-key select ’A’ character

• B-key select ’Z’ character

• R-key select ’1’ character

• L-key select ’9’ character

• up-key increment character (’A’->’B’)

• down-key decrement character (’B’-’A’)

• left-key change set of character (’!’->’A’- >’a’)

• right-key change set of character (’a’->’A’- >’!’)

Input parameters:

Output parameters:


References ASCII_CR, delay_loop(), GBA_KEY, GBA_KEY_A, GBA_KEY_B, GBA_KEY_DOWN,GBA_KEY_L, GBA_KEY_LEFT, GBA_KEY_R, GBA_KEY_RIGHT, GBA_KEY_SELECT, GBA_-KEY_START, GBA_KEY_UP, gba_put(), and inputch.

Referenced by gba_pollRead().

374 {375 int keyx, key = 0;376377 while(1)378 {379 key = GBA_KEY();380 while( (keyx=GBA_KEY())==key );381 switch (key)382 {383 case GBA_KEY_SELECT:384 gba_put(inputch);385 return inputch;386 break;387 case GBA_KEY_START:388 gba_put(’ ’);389 inputch = ASCII_CR;390 return inputch;391 break;392 case GBA_KEY_A:393 inputch = ’A’;394 break;395 case GBA_KEY_B:396 inputch = ’Z’;397 break;398 case GBA_KEY_UP:399 if((inputch-1) >= 0x20) inputch--;400 break;



401 case GBA_KEY_DOWN:402 if((inputch+1) <= 0x7E) inputch++;403 break;404 case GBA_KEY_LEFT:405 if((inputch - 0x20) >= 0x20) inputch -= 0x20;406 break;407 case GBA_KEY_RIGHT:408 if((inputch + 0x20) <= 0x7E) inputch += 0x20;409 break;410 case GBA_KEY_R:411 inputch = ’1’;412 break;413 case GBA_KEY_L:414 inputch = ’9’;415 break;416 default:417 break;418 }419 gba_put(inputch);420 delay_loop(1000);421 }422 }


gba_getch

delay_loop

gba_put gba_putchar

6.2.4.5 void gba_gotoxy (int_x, int _y)


Input parameters:

Output parameters:


References _wherex, and _wherey.

Referenced by gba_clrscr(), and gba_putch().

100 {101 _wherex = _x;102 _wherey = _y;103 }

6.2.4.6 void gba_initconio ()

gba_initconio function initialize console

Input parameters:

Output parameters:


References bg_palette, BLACK, BLUE, BROWN, CYAN, DARKGRAY, DEF_TEXTBACKGROUND,DEF_TEXTCOLOR, gba_clrscr(), GBA_DISP_BG2_ON, GBA_DISP_MODE_4, GBA_REG_-DISPCNT, gba_textattr(), gba_textbackground(), gba_textcolor(), GREEN, LIGHTBLUE, LIGHTCYAN,



LIGHTGRAY, LIGHTGREEN, LIGHTMAGENTA, LIGHTRED, MAGENTA, rBg2Affine, RED, RGB,WHITE, and YELLOW.

Referenced by gba_textmode().

294 {295 GBA_REG_DISPCNT = GBA_DISP_MODE_4 | GBA_DISP_BG2_ON;/* 256 color bitmapped mode * /296 const BgAffineDestData bgAffineReset = {256,0,0,256,0,-256 * 2};297 rBg2Affine = bgAffineReset;298 bg_palette[BLACK ] = RGB( 0, 0, 0); / * BLACK * /299 bg_palette[BLUE ] = RGB( 0, 0,16); / * BLUE * /300 bg_palette[GREEN ] = RGB( 0,16, 0); / * GREEN* /301 bg_palette[CYAN ] = RGB( 0,16,16); / * CYAN * /302 bg_palette[RED ] = RGB(16, 0, 0); / * RED * /303 bg_palette[MAGENTA ] = RGB(16, 0,16); / * MAGENTA* /304 bg_palette[BROWN ] = RGB(16,16, 0); / * BROWN* /305 bg_palette[LIGHTGRAY ] = RGB(24,24,24); / * LIGHTGRAY * /306 bg_palette[DARKGRAY ] = RGB(16,16,16); / * DARKGRAY* /307 bg_palette[LIGHTBLUE ] = RGB( 0, 0,31); / * LIGHTBLUE * /308 bg_palette[LIGHTGREEN ] = RGB( 0,31, 0); / * LIGHTGREEN* /309 bg_palette[LIGHTCYAN ] = RGB( 0,31,31); / * LIGHTCYAN * /310 bg_palette[LIGHTRED ] = RGB(31, 0, 0); / * LIGHTRED * /311 bg_palette[LIGHTMAGENTA] = RGB(31, 0,31); / * LIGHTMAGENTA* /312 bg_palette[YELLOW ] = RGB(31,31, 0); / * YELLOW* /313 bg_palette[WHITE ] = RGB(31,31,31); / * WHITE * /314 gba_textattr(0);315 gba_textcolor(DEF_TEXTCOLOR);316 gba_textbackground(DEF_TEXTBACKGROUND);317 gba_clrscr();318 }


gba_initconio

gba_clrscr

gba_textattr

gba_textbackground

gba_textcolor

gba_clearline

gba_gotoxy

gba_putchar

6.2.4.7 void gba_nextline ()

gba_nextline function moves cursor to next line and clears it

Input parameters:

Output parameters:


References _wherex, _wherey, gba_clearline(), and H.

Referenced by gba_putch().

193 {194 _wherex = 0;195 if (++_wherey >= H) _wherey = 0;196 gba_clearline(_wherey);197 }




gba_nextline gba_clearline gba_putchar

6.2.4.8 int gba_printf (const char∗ _format, ...)


Input parameters:

Output parameters:


References gba_puts().

276 {277 char s[256];278 va_list marker;279 va_start(marker, _format);280 int r = vsprintf(s, _format, marker);281 va_end(marker);282 gba_puts(s);283 return r;284 }


gba_printf gba_puts gba_putch

gba_gotoxy

gba_nextline

gba_put

gba_clearline

gba_putchar

6.2.4.9 void gba_put (char_c)

gba_put function convert ascii char to font index and write char to screen memory

Input parameters:

Output parameters:


References _textattr, _wherex, _wherey, and gba_putchar().

Referenced by gba_getch(), and gba_putch().

223 {224 / * We have save some memory with reduced fonts * /225 _c = _c & 0x7F; / * no extened chars * /226 _c = _c - 0x20; / * no cntr chars * /227 gba_putchar(_c, _textattr, _wherex, _wherey);228 }




gba_put gba_putchar

6.2.4.10 void gba_putch (char_c)


Input parameters:

Output parameters:


References _wherex, _wherey, ASCII_CR, ASCII_LF, gba_gotoxy(), gba_nextline(), gba_put(), and W.

Referenced by gba_puts(), and gba_write().

239 {240 switch (_c) {241 case ASCII_LF:242 gba_nextline();243 break;244 case ASCII_CR:245 gba_gotoxy(0, _wherey);246 break;247 default:248 gba_put(_c);249 if (++_wherex >= W) gba_nextline();250 break;251 }252 return;253 }


gba_putch

gba_gotoxy

gba_nextline

gba_put

gba_clearline

gba_putchar

6.2.4.11 void gba_putchar (charc, int textattr, int x, int y)

gba_putchar function writes char-data to screen memory.

Char code is index to font table.

Input parameters:

Output parameters:


References bg_bitmap4a, and GBA_LCD_WIDTH.

Referenced by gba_clearline(), and gba_put().

116 {117 int f = textattr & 0x0F;118 int b = textattr >> 4;



119 unsigned32 fmask = f | f<<8 | f<<16 | f<<24;120 unsigned32 bmask = b | b<<8 | b<<16 | b<<24;121 unsigned32 * dest = (unsigned32 * )&bg_bitmap4a[((y<<1) + y) << 1][x<<2];122 const unsigned32 * src = (unsigned32 * )&(font3x5[(int)c]);123 unsigned32 s;124 s = * src++; * dest = (fmask&s) | (bmask&~s); dest += GBA_LCD_WIDTH/sizeof(unsigned32);125 s = * src++; * dest = (fmask&s) | (bmask&~s); dest += GBA_LCD_WIDTH/sizeof(unsigned32);126 s = * src++; * dest = (fmask&s) | (bmask&~s); dest += GBA_LCD_WIDTH/sizeof(unsigned32);127 s = * src++; * dest = (fmask&s) | (bmask&~s); dest += GBA_LCD_WIDTH/sizeof(unsigned32);128 s = * src++; * dest = (fmask&s) | (bmask&~s); dest += GBA_LCD_WIDTH/sizeof(unsigned32);129 s = * src++; * dest = (fmask&s) | (bmask&~s); dest += GBA_LCD_WIDTH/sizeof(unsigned32);130 }

6.2.4.12 void gba_puts (const char∗ _str)


Input parameters:

Output parameters:


References gba_putch().

Referenced by gba_printf().

263 {264 while ( * _str) gba_putch( * _str++);265 return;266 }


gba_puts gba_putch

gba_gotoxy

gba_nextline

gba_put

gba_clearline

gba_putchar

6.2.4.13 void gba_textattr (int_attr)


Input parameters:

Output parameters:


References _textattr.


141 {142 _textattr = _attr;143 }



6.2.4.14 void gba_textbackground (int_color)


Input parameters:

Output parameters:




153 {154 _textattr = (_textattr & 0x0F) | (_color << 4);155 }

6.2.4.15 void gba_textcolor (int_color)


Input parameters:

Output parameters:




165 {166 _textattr = (_textattr & 0xF0) | (_color);167 }

6.2.4.16 void gba_textmode (int_mode)


Input parameters:

Output parameters:


References CO60, and gba_initconio().

Referenced by bsp_start_default().

328 {329 switch (_mode)330 {331 case CO60:332 {333 gba_initconio();334 break;335 }336 }337 }



6.3 gba/console/console.c File Reference 29

gba_textmode gba_initconio

gba_clrscr

gba_textattr

gba_textbackground

gba_textcolor

gba_clearline

gba_gotoxy

gba_putchar


6.2.5.1 int_textattr

Text attribute.


Referenced by gba_clearline(), gba_put(), gba_textattr(), gba_textbackground(), and gba_textcolor().

6.2.5.2 int_wherex

Screen X coordinate.


Referenced by gba_gotoxy(), gba_nextline(), gba_put(), and gba_putch().

6.2.5.3 int_wherey

Screen Y coordinate.


Referenced by gba_gotoxy(), gba_nextline(), gba_put(), and gba_putch().

6.2.5.4 unsigned charinputch = ASCII_CR [static]

input character value



6.3 gba/console/console.c File Reference


#include <stdio.h >

#include <stdlib.h >

#include <assert.h >

#include <unistd.h >

#include <bsp.h >

#include <rtems/bspIo.h >

#include <rtems/libio.h >



#include <rtems/termiostypes.h >

#include <termios.h >

#include <irq.h >

#include <gba.h >

#include <conio.h >

Include dependency graph for console.c:

gba/console/console.c

stdio.h

stdlib.h

assert.h

unistd.h

bsp.h

rtems/bspIo.h

rtems/libio.h

rtems/termiostypes.h

termios.h

irq.h

gba.h

conio.h

bspopts.h

rtems.h

iosupp.h

console.h

clockdrv.h

registers.h

Functions

• void __assert(const char∗file, int line, const char∗msg)

assert function

• void rtemsReboot(void)

rtemsReboot BSP routine reboot rtems

• static intgba_pollRead(int minor)

gba_pollRead function read char

• static intgba_write(int minor, const char∗buf, int len)

gba_write function writes chars

• static intgba_setAttributes(int minor, const struct termios∗t)

gba_setAttributes function is empty

• rtems_device_driverconsole_initialize(rtems_device_major_number major, rtems_device_minor_-number minor, void∗arg)

Console device driver INITIALIZE entry point.



• static intconsole_first_open(int major, int minor, void∗arg)

console_first_open function is empty

• static intconsole_last_close(int major, int minor, void∗arg)

console_last_close function is empty

• rtems_device_driverconsole_open(rtems_device_major_number major, rtems_device_minor_-number minor, void∗arg)

Console device driver OPEN entry point.

• rtems_device_driverconsole_close(rtems_device_major_number major, rtems_device_minor_-number minor, void∗arg)

Console device driver CLOSE entry point.

• rtems_device_driverconsole_read(rtems_device_major_number major, rtems_device_minor_-number minor, void∗arg)

Console device driver READ entry point. Read characters from the I/O console.

• rtems_device_driverconsole_write (rtems_device_major_number major, rtems_device_minor_-number minor, void∗arg)

Console device driver WRITE entry point.

• rtems_device_driverconsole_control(rtems_device_major_number major, rtems_device_minor_-number minor, void∗arg)

Handle ioctl request.

Variables

• BSP_output_char_function_typeBSP_output_char= (BSP_output_char_function_type) gba_putch• BSP_polling_getchar_function_typeBSP_poll_char= (BSP_polling_getchar_function_type) gba_-

getch



RTEMS GBA BSP



Definition in fileconsole.c.


6.3.2.1 void __assert (const char∗ file, int line, const char∗ msg)

assert function

Input parameters: NONE





Output parameters: NONE

Definition at line 91 of file console.c.

References GBA_ANY_KEY, GBA_KEY_ALL, and rtemsReboot().

92 {93 static const char exit_msg[] = "EXECUTIVE SHUTDOWN! Any button to reboot...";94 / *95 * Note we cannot call exit or printf from here,96 * assert can fail inside ISR too97 * /9899 / *100 * Close console101 * /102 close(2);103 close(1);104 close(0);105106 printk("\nassert failed: %s: ", file);107 printk("%d: ", line);108 printk("%s\n\n", msg);109 printk("%s",exit_msg);110 while( !GBA_ANY_KEY(GBA_KEY_ALL) );111 printk("\n\n");112 rtemsReboot();113 }


__assert rtemsReboot

6.3.2.2 rtems_device_driver console_close (rtems_device_major_numbermajor, rtems_device_-minor_number minor, void ∗ arg)

Console device driver CLOSE entry point.

Input parameters:

Output parameters: rtems_device_driver


221 {222 rtems_device_driver res = RTEMS_SUCCESSFUL;223224 res = rtems_termios_close (arg);225226 return res;227 } / * console_close * /

6.3.2.3 rtems_device_driver console_control (rtems_device_major_numbermajor, rtems_device_-minor_number minor, void ∗ arg)

Handle ioctl request.

Input parameters:





282 {283 return rtems_termios_ioctl (arg);284 }

6.3.2.4 static int console_first_open (intmajor, int minor, void ∗ arg) [static]

console_first_open function is empty




Referenced by console_open().

158 {159 return 0;160 }

6.3.2.5 rtems_device_driver console_initialize (rtems_device_major_numbermajor, rtems_-device_minor_numberminor, void ∗ arg)

Console device driver INITIALIZE entry point.

Initilizes the I/O console driver.




128 {129 rtems_status_code status;130131 / * Set up TERMIOS * /132 rtems_termios_initialize ();133134 / * Do device-specific initialization * /135 / * Allready done in bspstart.c -> gba_textmode(CO60); * /136137 / * Register the device * /138 status = rtems_io_register_name ("/dev/console", major, 0);139 if (status != RTEMS_SUCCESSFUL)140 {141 printk("Error registering console device!\n");142 rtems_fatal_error_occurred (status);143 }144145 printk("Initialized GBA console\n\n");146147 return RTEMS_SUCCESSFUL;148 } / * console_initialize * /

6.3.2.6 static int console_last_close (intmajor, int minor, void ∗ arg) [static]

console_last_close function is empty



Input parameters:

Output parameters:



170 {171 return 0;172 }

6.3.2.7 rtems_device_driver console_open (rtems_device_major_numbermajor, rtems_device_-minor_number minor, void ∗ arg)

Console device driver OPEN entry point.

Input parameters: Output parameters: rtems_device_driver


References console_first_open(), console_last_close(), gba_pollRead(), gba_setAttributes(), and gba_-write().

185 {186 rtems_status_code status;187 static rtems_termios_callbacks cb =188 {189 console_first_open, / * firstOpen * /190 console_last_close, / * lastClose * /191 gba_pollRead, / * pollRead * /192 gba_write, / * write * /193 gba_setAttributes, / * setAttributes * /194 NULL, / * stopRemoteTx * /195 NULL, / * startRemoteTx * /196 TERMIOS_POLLED /* 1 = outputUsesInterrupts * /197 };198199 status = rtems_termios_open (major, minor, arg, &cb);200201 if(status != RTEMS_SUCCESSFUL)202 {203 printk("Error openning console device\n");204 return status;205 }206207 return RTEMS_SUCCESSFUL;208 }


console_open

console_first_open

console_last_close

gba_pollRead

gba_setAttributes

gba_write

gba_getch delay_loop

gba_put

gba_putchargba_putch gba_gotoxy

gba_nextline

gba_clearline



6.3.2.8 rtems_device_driver console_read (rtems_device_major_numbermajor, rtems_device_-minor_number minor, void ∗ arg)

Console device driver READ entry point. Read characters from the I/O console.

Input parameters:



242 {243244 return rtems_termios_read (arg);245246 } / * console_read * /

6.3.2.9 rtems_device_driver console_write (rtems_device_major_numbermajor, rtems_device_-minor_number minor, void ∗ arg)

Console device driver WRITE entry point.

Write characters to the I/O console.

Input parameters:



262 {263264 return rtems_termios_write (arg);265266 } / * console_write * /

6.3.2.10 static int gba_pollRead (intminor) [static]

gba_pollRead function read char


Output parameters: char


References gba_getch().


47 {48 return(gba_getch());49 }


gba_pollRead gba_getch

delay_loop

gba_put gba_putchar



6.3.2.11 static int gba_setAttributes (intminor, const struct termios∗ t) [static]

gba_setAttributes function is empty

Input parameters:

Output parameters:



75 {76 return 0;77 }

6.3.2.12 static int gba_write (intminor, const char∗ buf, int len) [static]

gba_write function writes chars

Input parameters:

Output parameters: char




60 {61 int i;6263 for(i=0;i<len;i++) gba_putch((unsigned short)buf[i]);64 return len;65 }


gba_write gba_putch

gba_gotoxy

gba_nextline

gba_put

gba_clearline

gba_putchar

6.3.2.13 void rtemsReboot (void)




Definition at line 30 of file exit.c.

Referenced by __assert(), and bsp_cleanup().

31 {32 asm volatile ("ldr r0, =_gba_reset");33 asm volatile ("bx r0");34 }


6.4 gba/console/defaultfont.c File Reference 37


6.3.3.1 BSP_output_char_function_typeBSP_output_char = (BSP_output_char_function_type)gba_putch


6.3.3.2 BSP_polling_getchar_function_typeBSP_poll_char = (BSP_polling_getchar_function_-type) gba_getch


6.4 gba/console/defaultfont.c File Reference


This graph shows which files directly or indirectly include this file:

gba/console/defaultfont.c gba/console/conio.c

Defines

• #defineX 255

Font row dot value.

• #defineGEN_FONT_DATA(a, b, c, d) d<<24|c<<16|b<<8|aGenerate font row data.

Variables

• static const unsigned longfont3x5[256][6]

array for 3x5 font, font screen size is 4x6



RTEMS GBA BSP



Definition in filedefaultfont.c.


6.4.2.1 #define GEN_FONT_DATA(a, b, c, d) d<<24|c<<16|b<<8|a




6.5 gba/include/asm_macros.h File Reference 38

Generate font row data.

Definition at line 17 of file defaultfont.c.

6.4.2.2 #define X 255

Font row dot value.



6.4.3.1 const unsigned longfont3x5[256][6] [static]

array for 3x5 font, font screen size is 4x6


6.5 gba/include/asm_macros.h File Reference


#include <mode_bits.h >

Include dependency graph for asm_macros.h:

gba/include/asm_macros.h mode_bits.h


gba/include/asm_macros.h

gba/irq/bsp_irq_asm.S

gba/irq/irq_asm.S

gba/start/start.S

gba/startup/cpu_asm.S

Defines

• #definePUBLIC_ARM_FUNCTION(label) .global label ; .type label, function ; .arm ; label:• #definePUBLIC_THUMB_FUNCTION(label) .global label ; .type label, function ; .thumb_func ;

label:• #defineSTATIC_ARM_FUNCTION(label) .type label, function ; .arm ; label:• #defineSTATIC_THUMB_FUNCTION(label) .type label, function ; .thumb_func ; label:• #defineOBJECT(label) .global label ; .type label, object ; label:• #defineSTATIC_OBJECT(label) .type label, object ; label:• #defineWEAK_OBJECT(label) .weak label ; .type label, object ; label:• #defineLABEL_END(label) .L##label##_end: ; .size label, .L##label##_end- label


6.6 gba/include/bsp.h File Reference 39



RTEMS GBA BSP



Definition in fileasm_macros.h.


6.5.2.1 #define LABEL_END(label) .L##label##_end: ; .size label, .L##label##_end- label

Definition at line 35 of file asm_macros.h.

6.5.2.2 #define OBJECT(label) .global label ; .type label, object ; label:


6.5.2.3 #define PUBLIC_ARM_FUNCTION(label) .global label ; .type label, function ; .arm ; la-bel:


6.5.2.4 #define PUBLIC_THUMB_FUNCTION(label) .global label ; .type label, function ;.thumb_func ; label:


6.5.2.5 #define STATIC_ARM_FUNCTION(label) .type label, function ; .arm ; label:


6.5.2.6 #define STATIC_OBJECT(label) .type label, object ; label:


6.5.2.7 #define STATIC_THUMB_FUNCTION(label) .type label, function ; .thumb_func ; label:


6.5.2.8 #define WEAK_OBJECT(label) .weak label ; .type label, object ; label:


6.6 gba/include/bsp.h File Reference






#include <bspopts.h >

#include <rtems.h >

#include <iosupp.h >

#include <console.h >

#include <clockdrv.h >

Include dependency graph for bsp.h:

gba/include/bsp.h

bspopts.h

rtems.h

iosupp.h

console.h

clockdrv.h


gba/include/bsp.h



gba/irq/bsp_irq_init.c

gba/irq/irq.c

gba/irq/irq_init.c

gba/startup/bspstart.c

gba/startup/exit.c

gba/timer/timer.c

Defines

• #defineCONFIGURE_NUMBER_OF_TERMIOS_PORTS1• #defineOPERATION_COUNT4

Define operation count for Tests.

• #defineMUST_WAIT_FOR_INTERRUPT0• #defineInstall_tm27_vector(handler)• #defineCause_tm27_intr()• #defineClear_tm27_intr()• #defineLower_tm27_intr()• #definertems_bsp_delay(microseconds)

Simple spin delay in microsecond units for device drivers.



Functions

• void gba_zero_memory(int start, int stop)

gba_zero_memory library function instart.S

• void gba_move_memory(int from, int toStart, int toEnd)

gba_move_memory library function instart.S

• void gba_set_memory(int start, int stop, int data)

gba_set_memory library function instart.S

Variables

• rtems_configuration_tableBSP_Configuration




RTEMS GBA BSP



Definition in filebsp.h.


6.6.2.1 #define Cause_tm27_intr()

Definition at line 47 of file bsp.h.

6.6.2.2 #define Clear_tm27_intr()


6.6.2.3 #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 1


6.6.2.4 #define Install_tm27_vector(handler)


6.6.2.5 #define Lower_tm27_intr()





6.7 gba/include/conio.h File Reference 42

6.6.2.6 #define MUST_WAIT_FOR_INTERRUPT 0


6.6.2.7 #define OPERATION_COUNT 4

Define operation count for Tests.


6.6.2.8 #define rtems_bsp_delay(microseconds)

Value:

{ \}

Simple spin delay in microsecond units for device drivers.

This is very dependent on the clock speed of the target.



6.6.3.1 void gba_move_memory (intfrom, int toStart, int toEnd)

gba_move_memory library function instart.S

6.6.3.2 void gba_set_memory (intstart, int stop, int data)

gba_set_memory library function instart.S

6.6.3.3 void gba_zero_memory (intstart, int stop)

gba_zero_memory library function instart.S





6.7 gba/include/conio.h File Reference


#include <gba.h >

Include dependency graph for conio.h:

gba/include/conio.h gba.h registers.h




gba/include/conio.h

gba/console/conio.c



Defines

• #defineASCII_BEL 0x07

bell

• #defineASCII_BS0x08

backspace

• #defineASCII_TAB 0x09

horizontal tab

• #defineASCII_LF 0x0A

line feed

• #defineASCII_CR0x0D

carriage return

• #defineASCII_XON 0x11

control-Q

• #defineASCII_XOFF0x13

control-S

• #defineASCII_ESC0x1B

escape

• #defineDEF_TEXTCOLORBLACK• #defineDEF_TEXTBACKGROUNDWHITE

Enumerations

• enumTEXT_MODES{ CO60= 0, MAXMODES }• enumCOLORS{

BLACK, BLUE, GREEN, CYAN,

RED, MAGENTA, BROWN, LIGHTGRAY,

DARKGRAY, LIGHTBLUE, LIGHTGREEN, LIGHTCYAN,

LIGHTRED, LIGHTMAGENTA, YELLOW, WHITE,

MAXCOLORS}



Functions

• void gba_textmode(int _mode)


• void gba_clrscr()


• void gba_textattr(int _attr)


• void gba_textbackground(int _color)


• void gba_textcolor(int _color)


• void gba_putch(char _c)


• void gba_puts(const char∗_str)


• int gba_printf(const char∗_format,...)


• void gba_gotoxy(int _x, int _y)


• chargba_getch(void)




RTEMS GBA BSP



Definition in fileconio.h.


6.7.2.1 #define ASCII_BEL 0x07

bell

Definition at line 31 of file conio.h.





6.7.2.2 #define ASCII_BS 0x08

backspace


6.7.2.3 #define ASCII_CR 0x0D

carriage return


Referenced by gba_getch(), and gba_putch().

6.7.2.4 #define ASCII_ESC 0x1B

escape


6.7.2.5 #define ASCII_LF 0x0A

line feed


Referenced by gba_putch().

6.7.2.6 #define ASCII_TAB 0x09

horizontal tab


6.7.2.7 #define ASCII_XOFF 0x13

control-S


6.7.2.8 #define ASCII_XON 0x11

control-Q


6.7.2.9 #define DEF_TEXTBACKGROUND WHITE



6.7.2.10 #define DEF_TEXTCOLOR BLACK





6.7.3 Enumeration Type Documentation

6.7.3.1 enumCOLORS

Enumeration values:BLACK

BLUE

GREEN

CYAN

RED

MAGENTA

BROWN

LIGHTGRAY

DARKGRAY

LIGHTBLUE

LIGHTGREEN

LIGHTCYAN

LIGHTRED

LIGHTMAGENTA

YELLOW

WHITE

MAXCOLORS


48 {49 BLACK,50 BLUE,51 GREEN,52 CYAN,53 RED,54 MAGENTA,55 BROWN,56 LIGHTGRAY,57 DARKGRAY,58 LIGHTBLUE,59 LIGHTGREEN,60 LIGHTCYAN,61 LIGHTRED,62 LIGHTMAGENTA,63 YELLOW,64 WHITE,65 MAXCOLORS66 };

6.7.3.2 enumTEXT_MODES

Enumeration values:CO60 60x26 (3x5 font)

MAXMODES




42 {43 CO60 = 0, / ** < 60x26 (3x5 font) * /44 MAXMODES45 };


6.7.4.1 void gba_clrscr ()


Input parameters:

Output parameters:


References gba_clearline(), gba_gotoxy(), and H.


207 {208 int y;209210 for(y=0 ; y<=H ; y++) gba_clearline(y);211 gba_gotoxy(0,0);212 }


gba_clrscr

gba_clearline

gba_gotoxy

gba_putchar

6.7.4.2 char gba_getch (void)


Character input is done with GBA buttons, up-down-left-right/A/B/R/L/Select/Start

• Select-key accept selected character

• Start-key read CR (Enter)

• A-key select ’A’ character

• B-key select ’Z’ character

• R-key select ’1’ character

• L-key select ’9’ character

• up-key increment character (’A’->’B’)

• down-key decrement character (’B’-’A’)

• left-key change set of character (’!’->’A’- >’a’)



• right-key change set of character (’a’->’A’- >’!’)

Input parameters:

Output parameters:


References ASCII_CR, delay_loop(), GBA_KEY, GBA_KEY_A, GBA_KEY_B, GBA_KEY_DOWN,GBA_KEY_L, GBA_KEY_LEFT, GBA_KEY_R, GBA_KEY_RIGHT, GBA_KEY_SELECT, GBA_-KEY_START, GBA_KEY_UP, gba_put(), and inputch.

Referenced by gba_pollRead().

374 {375 int keyx, key = 0;376377 while(1)378 {379 key = GBA_KEY();380 while( (keyx=GBA_KEY())==key );381 switch (key)382 {383 case GBA_KEY_SELECT:384 gba_put(inputch);385 return inputch;386 break;387 case GBA_KEY_START:388 gba_put(’ ’);389 inputch = ASCII_CR;390 return inputch;391 break;392 case GBA_KEY_A:393 inputch = ’A’;394 break;395 case GBA_KEY_B:396 inputch = ’Z’;397 break;398 case GBA_KEY_UP:399 if((inputch-1) >= 0x20) inputch--;400 break;401 case GBA_KEY_DOWN:402 if((inputch+1) <= 0x7E) inputch++;403 break;404 case GBA_KEY_LEFT:405 if((inputch - 0x20) >= 0x20) inputch -= 0x20;406 break;407 case GBA_KEY_RIGHT:408 if((inputch + 0x20) <= 0x7E) inputch += 0x20;409 break;410 case GBA_KEY_R:411 inputch = ’1’;412 break;413 case GBA_KEY_L:414 inputch = ’9’;415 break;416 default:417 break;418 }419 gba_put(inputch);420 delay_loop(1000);421 }422 }




gba_getch

delay_loop

gba_put gba_putchar

6.7.4.3 void gba_gotoxy (int_x, int _y)


Input parameters:

Output parameters:


References _wherex, and _wherey.

Referenced by gba_clrscr(), and gba_putch().

100 {101 _wherex = _x;102 _wherey = _y;103 }

6.7.4.4 int gba_printf (const char∗ _format, ...)


Input parameters:

Output parameters:


References gba_puts().

276 {277 char s[256];278 va_list marker;279 va_start(marker, _format);280 int r = vsprintf(s, _format, marker);281 va_end(marker);282 gba_puts(s);283 return r;284 }


gba_printf gba_puts gba_putch

gba_gotoxy

gba_nextline

gba_put

gba_clearline

gba_putchar

6.7.4.5 void gba_putch (char_c)




Input parameters:

Output parameters:


References _wherex, _wherey, ASCII_CR, ASCII_LF, gba_gotoxy(), gba_nextline(), gba_put(), and W.

Referenced by gba_puts(), and gba_write().

239 {240 switch (_c) {241 case ASCII_LF:242 gba_nextline();243 break;244 case ASCII_CR:245 gba_gotoxy(0, _wherey);246 break;247 default:248 gba_put(_c);249 if (++_wherex >= W) gba_nextline();250 break;251 }252 return;253 }


gba_putch

gba_gotoxy

gba_nextline

gba_put

gba_clearline

gba_putchar

6.7.4.6 void gba_puts (const char∗ _str)


Input parameters:

Output parameters:



Referenced by gba_printf().

263 {264 while ( * _str) gba_putch( * _str++);265 return;266 }


gba_puts gba_putch

gba_gotoxy

gba_nextline

gba_put

gba_clearline

gba_putchar



6.7.4.7 void gba_textattr (int_attr)


Input parameters:

Output parameters:




141 {142 _textattr = _attr;143 }

6.7.4.8 void gba_textbackground (int_color)


Input parameters:

Output parameters:




153 {154 _textattr = (_textattr & 0x0F) | (_color << 4);155 }

6.7.4.9 void gba_textcolor (int_color)


Input parameters:

Output parameters:




165 {166 _textattr = (_textattr & 0xF0) | (_color);167 }

6.7.4.10 void gba_textmode (int_mode)


Input parameters:

Output parameters:


6.8 gba/include/gba.h File Reference 52


References CO60, and gba_initconio().


328 {329 switch (_mode)330 {331 case CO60:332 {333 gba_initconio();334 break;335 }336 }337 }


gba_textmode gba_initconio

gba_clrscr

gba_textattr

gba_textbackground

gba_textcolor

gba_clearline

gba_gotoxy

gba_putchar

6.8 gba/include/gba.h File Reference

BSP header file.

#include <registers.h >

Include dependency graph for gba.h:

gba/include/gba.h registers.h


gba/include/gba.h


gba/console/conio.c

gba/include/conio.hgba/console/console.c


gba/startup/exit.c

gba/timer/timer.c



Defines

• #define__ClockFrequency16780000L

ClockFreguency in Hz.

• #define__TimPreScaler1024L

Prescaler value 1,64,256,1024.

• #defineMULTIBOOT volatile const unsigned short __gba_multiboot;

Multiboot/Cart boot Selection.

• #defineIWRAMDATA volatile const unsigned short __gba_iwram_data;

IWRAM/EWRAM data Selection.

• #defineIWRAMBSS volatile const unsigned short __gba_iwram_bss;

IWRAM/EWRAM bss Selection.

• #defineCODE_IN_ROM__attribute__ ((section (".text"), long_call))• #defineCODE_IN_IWRAM__attribute__ ((section (".iwram"), long_call))• #defineIN_IWRAM __attribute__ ((section (".iwram")))• #defineIN_EWRAM __attribute__ ((section (".ewram")))• #defineOK_KEY (0==0)

TRUE.

• #defineNO_KEY (0==1)

FALSE.

• #defineGBA_KEYS_PRESSED(keys) (( ((∼GBA_REG_P1) & (keys)) == (keys)) ? (OK_KEY) :(NO_KEY))

• #defineGBA_ANY_KEY(keys) (( ((∼GBA_REG_P1) & (keys)) != 0) ? (OK_KEY) : (NO_KEY))• #defineGBA_KEY() ((∼GBA_REG_P1)&GBA_KEY_ALL)• #defineGBA_LCD_WIDTH 240• #defineGBA_LCD_HEIGHT160• #defineGBA_MODE5_WIDTH160• #defineGBA_MODE5_HEIGHT128• #defineGBA_LCD_ASPECT((float)(GBA_LCD_WIDTH / GBA_LCD_HEIGHT))


BSP header file.

RTEMS GBA BSP



Definition in filegba.h.






6.8.2.1 #define __ClockFrequency 16780000L

ClockFreguency in Hz.

Definition at line 28 of file gba.h.

6.8.2.2 #define __TimPreScaler 1024L

Prescaler value 1,64,256,1024.


6.8.2.3 #define CODE_IN_IWRAM __attribute__ ((section (".iwram"), long_call))


6.8.2.4 #define CODE_IN_ROM __attribute__ ((section (".text"), long_call))


6.8.2.5 #define GBA_ANY_KEY(keys) (( ((∼GBA_REG_P1) & (keys)) != 0) ? (OK_KEY) : (NO_-KEY))



6.8.2.6 #define GBA_KEY() ((∼GBA_REG_P1)&GBA_KEY_ALL)



6.8.2.7 #define GBA_KEYS_PRESSED(keys) (( ((∼GBA_REG_P1) & (keys)) == (keys)) ? (OK_-KEY) : (NO_KEY))


6.8.2.8 #define GBA_LCD_ASPECT ((float)(GBA_LCD_WIDTH / GBA_LCD_HEIGHT))


6.8.2.9 #define GBA_LCD_HEIGHT 160


6.8.2.10 #define GBA_LCD_WIDTH 240


Referenced by gba_putchar().



6.8.2.11 #define GBA_MODE5_HEIGHT 128


6.8.2.12 #define GBA_MODE5_WIDTH 160


6.8.2.13 #define IN_EWRAM __attribute__ ((section (".ewram")))


6.8.2.14 #define IN_IWRAM __attribute__ ((section (".iwram")))


6.8.2.15 #define IWRAMBSS volatile const unsigned short __gba_iwram_bss;

IWRAM/EWRAM bss Selection.

If the variable __gba_iwram_bss is defined (probably should be in your main project file) then code isgenerated which will allocate bss section in IWRAM (data starts at 0x03000080). If this variable is notdefined then bss sections is allocated in EWRAM (data starts at 0x02000000).


6.8.2.16 #define IWRAMDATA volatile const unsigned short __gba_iwram_data;

IWRAM/EWRAM data Selection.

If the variable __gba_iwram_data is defined (probably should be in your main project file) then code isgenerated which will allocate data section in IWRAM (data starts at 0x03000080). If this variable is notdefined then data sections is allocated in EWRAM (data starts at 0x02000000).


6.8.2.17 #define MULTIBOOT volatile const unsigned short __gba_multiboot;

Multiboot/Cart boot Selection.

If the variable __gba_multiboot is defined (probably should be in your main project file) then code is gen-erated which will run as a multiboot image (code starts at 0x02000000) or as a normal flash cart / emulatorimage. (i.e.start.Scopies code from ROM to EWRAM if started in cart or emulator.) If this variable is notdefined then code is generated for flash cart / emulator only operation (code starts at 0x08000000).


6.8.2.18 #define NO_KEY (0==1)

FALSE.


6.8.2.19 #define OK_KEY (0==0)

TRUE.


6.9 gba/include/irq.h File Reference 56


6.9 gba/include/irq.h File Reference


#include <rtems.h >

Include dependency graph for irq.h:

gba/include/irq.h rtems.h


gba/include/irq.h





gba/irq/irq.c

gba/irq/irq_init.c

gba/timer/timer.c

Defines

• #defineVECTOR_TABLE(&irq_vector_table[0])• #defineENABLE_IRQ() GBA_REG_IME = 1;• #defineDISABLE_IRQ() GBA_REG_IME = 0;

Typedefs

• typedef unsigned charrtems_irq_level• typedef unsigned charrtems_irq_trigger• typedef void(∗ rtems_irq_enable)(const struct__rtems_irq_connect_data__∗)• typedef void(∗ rtems_irq_disable)(const struct__rtems_irq_connect_data__∗)• typedef int(∗ rtems_irq_is_enabled)(const struct__rtems_irq_connect_data__∗)• typedef__rtems_irq_connect_data__rtems_irq_connect_data


Enumerations

• enumrtems_irq_symbolic_name{



BSP_IRQ_VBLANK = 0, BSP_IRQ_HBLANK = 1, BSP_IRQ_VCOUNTER= 2, BSP_IRQ_-TIMER0 = 3,

BSP_IRQ_TIMER1= 4, BSP_IRQ_TIMER2= 5, BSP_IRQ_TIMER3= 6, BSP_IRQ_SERIAL=7,

BSP_IRQ_DMA0= 8, BSP_IRQ_DMA1= 9, BSP_IRQ_DMA2= 10,BSP_IRQ_DMA3= 11,

BSP_IRQ_KEY= 12,BSP_IRQ_CART= 13,BSP_IRQ_NA14= 14,BSP_IRQ_NA15= 15,

BSP_MAX_INT= 16 }

Functions

• void default_int_handler()

default_int_handler BSP routine is default int_handler

• void BSP_rtems_irq_mngt_init()

function to initialize the interrupt for a specific BSP

• int BSP_install_rtems_irq_handler(constrtems_irq_connect_data∗)

function to connect a particular irq handler.

• int BSP_get_current_rtems_irq_handler(rtems_irq_connect_data∗ptr)

function to get the current RTEMS irq handler for ptr->name.

• int BSP_remove_rtems_irq_handler(constrtems_irq_connect_data∗)

function to get disconnect the RTEMS irq handler for ptr->name.

Variables

• void _irq_max_vector

defined in lincmds

• unsigned32irq_vector_table[BSP_MAX_INT]

allocated in linkcmds

• typedef void(∗ rtems_irq_hdl)(void)



RTEMS GBA BSP



Definition in file irq.h.






6.9.2.1 #define DISABLE_IRQ() GBA_REG_IME = 0;


6.9.2.2 #define ENABLE_IRQ() GBA_REG_IME = 1;


6.9.2.3 #define VECTOR_TABLE (&irq_vector_table[0])


Referenced by BSP_install_rtems_irq_handler(), BSP_remove_rtems_irq_handler(), and rtems_irq_-mngt_init().

6.9.3 Typedef Documentation

6.9.3.1 typedef struct__rtems_irq_connect_data__rtems_irq_connect_data


6.9.3.2 typedef void(∗ rtems_irq_disable)(const struct__rtems_irq_connect_data__∗)


6.9.3.3 typedef void(∗ rtems_irq_enable)(const struct__rtems_irq_connect_data__∗)


6.9.3.4 typedef int(∗ rtems_irq_is_enabled)(const struct__rtems_irq_connect_data__∗)


6.9.3.5 typedef unsigned charrtems_irq_level


6.9.3.6 typedef unsigned charrtems_irq_trigger


6.9.4 Enumeration Type Documentation

6.9.4.1 enumrtems_irq_symbolic_name

Enumeration values:BSP_IRQ_VBLANK

BSP_IRQ_HBLANK

BSP_IRQ_VCOUNTER

BSP_IRQ_TIMER0



BSP_IRQ_TIMER1

BSP_IRQ_TIMER2

BSP_IRQ_TIMER3

BSP_IRQ_SERIAL

BSP_IRQ_DMA0

BSP_IRQ_DMA1

BSP_IRQ_DMA2

BSP_IRQ_DMA3

BSP_IRQ_KEY

BSP_IRQ_CART

BSP_IRQ_NA14

BSP_IRQ_NA15

BSP_MAX_INT BSP_MAX_INT<= _irq_max_vector in linkcmds.


48 {49 BSP_IRQ_VBLANK = 0,50 BSP_IRQ_HBLANK = 1,51 BSP_IRQ_VCOUNTER = 2,52 BSP_IRQ_TIMER0 = 3,53 BSP_IRQ_TIMER1 = 4,54 BSP_IRQ_TIMER2 = 5,55 BSP_IRQ_TIMER3 = 6,56 BSP_IRQ_SERIAL = 7,57 BSP_IRQ_DMA0 = 8,58 BSP_IRQ_DMA1 = 9,59 BSP_IRQ_DMA2 = 10,60 BSP_IRQ_DMA3 = 11,61 BSP_IRQ_KEY = 12,62 BSP_IRQ_CART = 13,63 BSP_IRQ_NA14 = 14,64 BSP_IRQ_NA15 = 15,65 BSP_MAX_INT = 16 / ** < BSP_MAX_INT <= _irq_max_vector in linkcmds * /66 } rtems_irq_symbolic_name;


6.9.5.1 int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data∗ ptr)

function to get the current RTEMS irq handler for ptr->name.

It enables to define hanlder chain...

6.9.5.2 int BSP_install_rtems_irq_handler (constrtems_irq_connect_data∗ irq)


Input parameters: irq connect data

Output parameters: TRUE/FALSE (0/1)

Definition at line 53 of file irq.c.

References default_int_handler(), GBA_REG_IE, GBA_REG_IF, isValidInterrupt(), rtems_irq_hdl, andVECTOR_TABLE.



54 {55 rtems_irq_hdl * HdlTable;56 rtems_interrupt_level level;5758 if (!isValidInterrupt(irq->name)) {59 return 0;60 }61 / *62 * Check if default handler is actually connected. If not issue an error.63 * /64 HdlTable = (rtems_irq_hdl * ) (unsigned32)VECTOR_TABLE;65 if ( * (HdlTable + irq->name) != default_int_handler) {66 return 0;67 }6869 _CPU_ISR_Disable(level);7071 / *72 * store the new handler73 * /74 * (HdlTable + irq->name) = irq->hdl;7576 / *77 * ack pending interrupt78 * /79 GBA_REG_IF |= (1 << (irq->name));8081 / *82 * initialize the control register for the concerned interrupt83 * /84 GBA_REG_IE |= (1 << (irq->name));8586 / *87 * Enable interrupt on device88 * /89 irq->on(irq);9091 _CPU_ISR_Enable(level);9293 return 1;94 }


BSP_install_rtems_irq_handler

default_int_handler

isValidInterrupt

6.9.5.3 int BSP_remove_rtems_irq_handler (constrtems_irq_connect_data∗ irq)





References default_int_handler(), GBA_REG_IE, isValidInterrupt(), rtems_irq_hdl, and VECTOR_-TABLE.

104 {



105 rtems_irq_hdl * HdlTable;106 rtems_interrupt_level level;107108 if (!isValidInterrupt(irq->name)) {109 return 0;110 }111 / *112 * Check if the handler is actually connected. If not issue an error.113 * /114 HdlTable = (rtems_irq_hdl * ) (unsigned32)VECTOR_TABLE;115 if ( * (HdlTable + irq->name) != irq->hdl) {116 return 0;117 }118 _CPU_ISR_Disable(level);119120 / *121 * mask at INT controller level122 * /123 GBA_REG_IE &= ~(1 << irq->name);124125 / *126 * Disable interrupt on device127 * /128 irq->off(irq);129130 / *131 * restore the default irq value132 * /133 * (HdlTable + irq->name) = default_int_handler;134135 _CPU_ISR_Enable(level);136137 return 1;138 }


BSP_remove_rtems_irq_handler

default_int_handler

isValidInterrupt

6.9.5.4 void BSP_rtems_irq_mngt_init (void)




Definition at line 29 of file bsp_irq_init.c.

References GBA_REG_IE, GBA_REG_IF, and GBA_REG_IME.

Referenced by rtems_irq_mngt_init().

30 {31 / * clear all interrupt status flags * /32 GBA_REG_IF = 0xffff;33 / * disable all interrupts * /34 GBA_REG_IE = 0;35 / * set master interrupt enable * /36 GBA_REG_IME = 1;37 }


6.10 gba/include/mode_bits.h File Reference 62

6.9.5.5 void default_int_handler (void)


Input parameters:


Definition at line 37 of file irq_init.c.


38 {39 printk("raw_idt_notify has been called \n");40 }


6.9.6.1 void_irq_max_vector

defined in lincmds

Referenced by bsp_pretasking_hook(), and rtems_irq_mngt_init().

6.9.6.2 unsigned32irq_vector_table[BSP_MAX_INT]

allocated in linkcmds

6.9.6.3 struct typedef void(∗ rtems_irq_hdl)(void)


Referenced by BSP_install_rtems_irq_handler(), and BSP_remove_rtems_irq_handler().

6.10 gba/include/mode_bits.h File Reference



gba/include/mode_bits.h

gba/include/asm_macros.h

gba/startup/cpu.c


gba/irq/irq_asm.S

gba/start/start.S


Defines

• #defineMode_USR0x10• #defineMode_FIQ0x11• #defineMode_IRQ0x12• #defineMode_SVC0x13• #defineMode_ABT0x17



• #defineMode_ABORT0x17• #defineMode_UNDEF0x1B• #defineMode_SYS0x1F

only available on ARM Arch v4

• #defineMode_Bits0x1F

mask for mode bits

• #defineModePrivMode_SVC

used supervisor mode

• #defineI_Bit 0x80• #defineF_Bit 0x40• #defineInt_Bits0xC0• #defineMode_SVC_MIRQ(Mode_SVC| I_Bit | F_Bit)• #defineMode_SVC_UIRQ(Mode_SVC)• #defineMode_IRQ_MIRQ(Mode_SVC| I_Bit | F_Bit)• #defineMode_IRQ_UIRQ(Mode_SVC)




RTEMS GBA BSP



Definition in filemode_bits.h.


6.10.2.1 #define F_Bit 0x40

Definition at line 40 of file mode_bits.h.

6.10.2.2 #define I_Bit 0x80


6.10.2.3 #define Int_Bits 0xC0


6.10.2.4 #define Mode_ABORT 0x17






6.10.2.5 #define Mode_ABT 0x17


6.10.2.6 #define Mode_Bits 0x1F

mask for mode bits


6.10.2.7 #define Mode_FIQ 0x11


6.10.2.8 #define Mode_IRQ 0x12


6.10.2.9 #define Mode_IRQ_MIRQ (Mode_SVC| I_Bit | F_Bit)


6.10.2.10 #define Mode_IRQ_UIRQ (Mode_SVC)


6.10.2.11 #define Mode_SVC 0x13


6.10.2.12 #define Mode_SVC_MIRQ (Mode_SVC| I_Bit | F_Bit)


6.10.2.13 #define Mode_SVC_UIRQ (Mode_SVC)


6.10.2.14 #define Mode_SYS 0x1F

only available on ARM Arch v4


6.10.2.15 #define Mode_UNDEF 0x1B


6.10.2.16 #define Mode_USR 0x10



6.11 gba/include/registers.h File Reference 65

6.10.2.17 #define ModePriv Mode_SVC

used supervisor mode


Referenced by _CPU_Context_Initialize().

6.11 gba/include/registers.h File Reference



gba/include/registers.h

gba/include/gba.h



gba/irq/irq.c


gba/console/conio.c

gba/include/conio.hgba/console/console.c


gba/startup/exit.c

gba/timer/timer.c

Defines

• #defineGBA_BIOS_ADDR0x00000000• #defineGBA_NU1_ADDR0x00004000• #defineGBA_EXT_RAM_ADDR0x02000000• #defineGBA_NU2_ADDR0x02040000• #defineGBA_INT_RAM_ADDR 0x03000000• #defineGBA_NU3_ADDR0x03008000• #defineGBA_IO_REGS_ADDR0x04000000• #defineGBA_NU4_ADDR0x04000400• #defineGBA_PAL_RAM_ADDR0x05000000• #defineGBA_NU5_ADDR0x05000400• #defineGBA_VRAM_ADDR 0x06000000• #defineGBA_NU6_ADDR0x06180000• #defineGBA_OAM_ADDR 0x07000000• #defineGBA_NU7_ADDR0x07000400• #defineGBA_ROM0_ADDR0x08000000• #defineGBA_ROM1_ADDR0x0A000000• #defineGBA_ROM2_ADDR0x0C000000• #defineGBA_SRAM_ADDR0x0E000000• #defineGBA_NU8_ADDR0x0E010000• #defineGBA_MAX_ADDR 0x10000000

Upper 4bits of address bus unused.

• #defineGBA_BASE_BIOS(unsigned8∗)GBA_BIOS_ADDR



BIOS - System ROM 16KBytes, protected.

• #defineGBA_BASE_NOTUSED1(unsigned8∗)GBA_NU1_ADDR

Not used.

• #defineGBA_BASE_EXT_RAM(unsigned8∗)GBA_EXT_RAM_ADDR

WRAM - On-board Work RAM 256KBytes.


Not used.

• #defineGBA_BASE_INT_RAM(unsigned8∗)GBA_INT_RAM_ADDR

WRAM - In-chip Work RAM 32KBytes.


Not used.

• #defineGBA_BASE_IO_REGS(unsigned8∗)GBA_IO_REGS_ADDR

I/O Registers.


Not used.

• #defineGBA_BASE_PAL_RAM(unsigned8∗)GBA_PAL_RAM_ADDR

BG/OBJ Palette RAM 1KBytes.


Not used.

• #defineGBA_BASE_VRAM(unsigned8∗)GBA_VRAM_ADDR

VRAM - Video RAM 96KBytes.


Not used.

• #defineGBA_BASE_OAM(unsigned8∗)GBA_OAM_ADDR

OAM - OBJ Attribytes.


Not used.

• #defineGBA_BASE_ROM0(unsigned8∗)GBA_ROM0_ADDR

Pak ROM 32MB.


Pak ROM 32MB.


Pak ROM 32MB.



• #defineGBA_BASE_SRAM(unsigned8∗)GBA_SRAM_ADDR

Pak SRAM 64KBytes.


Not used.

• #defineGBA_BASE_MAX (unsigned8∗)GBA_MAX_ADDR


• #defineGBA_DISP_BG_MODE_MASK0x0007

BG Mode.

• #defineGBA_DISP_ON_MASK0x1f00

OBJ BG ON.

• #defineGBA_DISP_WIN_MASK0x6000

Window ON.

• #defineGBA_DISP_BG_MODE_SHIFT0• #defineGBA_DISP_ON_SHIFT8• #defineGBA_DISP_WIN_SHIFT13• #defineGBA_DISP_MODE_00x0000

BG Mode 0.

• #defineGBA_DISP_MODE_10x0001

BG Mode 1.


BG Mode 2.


BG Mode 3.


BG Mode 4.


BG Mode 5.

• #defineGBA_DISP_BMP_FRAME_NO0x0010

Bitmap Mode Display Frame.

• #defineGBA_DISP_OBJ_HOFF0x0020

OBJ Processing in H Blank OFF.

• #defineGBA_DISP_OBJ_CHAR_2D_MAP0x0000

OBJ Character Data 2D Mapping.

• #defineGBA_DISP_OBJ_CHAR_1D_MAP0x0040




• #defineGBA_DISP_LCDC_OFF0x0080

LCDC OFF.

• #defineGBA_DISP_BG0_ON0x0100

BG0 ON.


BG1 ON.


BG2 ON.


BG3 ON.

• #defineGBA_DISP_BG_ALL_ON0x0f00

All BG ON.

• #defineGBA_DISP_OBJ_ON0x1000

OBJ ON.

• #defineGBA_DISP_OBJ_BG_ALL_ON0x1f00

All OBJ/BG ON.

• #defineGBA_DISP_WIN0_ON0x2000

Window 0 ON.


Window 1 ON.


Window 0,1 ON.

• #defineGBA_DISP_OBJWIN_ON0x8000

OBJ Window ON.

• #defineGBA_DISP_WIN_ALL_ON0xe000

All Window ON.

• #defineGBA_DISP_ALL_ON0x7f00

All ON.

• #defineGBA_BG_MODE_00• #defineGBA_BG_MODE_11• #defineGBA_BG_MODE_22• #defineGBA_BG_MODE_33• #defineGBA_BG_MODE_44• #defineGBA_BG_MODE_55• #defineGBA_BG0_ENABLE1



• #defineGBA_BG1_ENABLE2• #defineGBA_BG2_ENABLE4• #defineGBA_BG3_ENABLE8• #defineGBA_OBJ_ENABLE16• #defineGBA_OBJ_1D_MAP1• #defineGBA_OBJ_2D_MAP0• #defineGBA_DISPCNT0x00000000

LCD Control.

• #defineGBA_DISPSTAT0x00000004

General LCD Status (STAT,LYC).

• #defineGBA_VCOUNT0x00000006

Vertical Counter (LY).

• #defineGBA_BG0CNT0x00000008

BG0 Control.

• #defineGBA_BG1CNT0x0000000A

BG1 Control.

• #defineGBA_BG2CNT0x0000000C

BG2 Control.

• #defineGBA_BG3CNT0x0000000E

BG3 Control.

• #defineGBA_BG0HOFS0x00000010

BG0 X-Offset.

• #defineGBA_BG0VOFS0x00000012

BG0 Y-Offset.


BG1 X-Offset.

• #defineGBA_BG1VOFS0x00000016

BG1 Y-Offset.


BG2 X-Offset.

• #defineGBA_BG2VOFS0x0000001A

BG2 Y-Offset.

• #defineGBA_BG3HOFS0x0000001C

BG3 X-Offset.

• #defineGBA_BG3VOFS0x0000001E

BG3 Y-Offset.



• #defineGBA_BG2PA0x00000020

BG2 Rotation/Scaling Parameter A (dx).

• #defineGBA_BG2PB0x00000022

BG2 Rotation/Scaling Parameter B (dmx).

• #defineGBA_BG2PC0x00000024

BG2 Rotation/Scaling Parameter C (dy).

• #defineGBA_BG2PD0x00000026

BG2 Rotation/Scaling Parameter D (dmy).

• #defineGBA_BG2X0x00000028

BG2 Reference Point X-Coordinate.

• #defineGBA_BG2X_L0x00000028

BG2 Reference Point X-Coordinate low.

• #defineGBA_BG2X_H0x0000002A

BG2 Reference Point X-Coordinate high.

• #defineGBA_BG2Y0x0000002C

BG2 Reference Point Y-Coordinate.

• #defineGBA_BG2Y_L0x0000002C

BG2 Reference Point Y-Coordinate low.

• #defineGBA_BG2Y_H0x0000002E

BG2 Reference Point Y-Coordinate high.

• #defineGBA_BG3PA0x00000030


• #defineGBA_BG3PB0x00000032


• #defineGBA_BG3PC0x00000034


• #defineGBA_BG3PD0x00000036


• #defineGBA_BG3X0x00000038


• #defineGBA_BG3X_L0x00000038


• #defineGBA_BG3X_H0x0000003A




• #defineGBA_BG3Y0x0000003C


• #defineGBA_BG3Y_L0x0000003C


• #defineGBA_BG3Y_H0x0000003E

BG3 Reference Point Y-Coordinate hugh.

• #defineGBA_WIN0H 0x00000040

Window 0 Horizontal Dimensions.

• #defineGBA_WIN1H 0x00000042


• #defineGBA_WIN0V 0x00000044

Window 0 Vertical Dimensions.

• #defineGBA_WIN1V 0x00000046


• #defineGBA_WININ 0x00000048

Control Inside of Window(s).

• #defineGBA_WINOUT 0x0000004A

Control Outside of Windows & Inside of OBJ Window.

• #defineGBA_MOSAIC0x0000004C

Mosaic Size.

• #defineGBA_BLDCNT 0x00000050

Color Special Effects Selection.

• #defineGBA_BLDMOD 0x00000050

Color Special Effects Selection X.

• #defineGBA_BLDALPHA 0x00000052

Alpha Blending Coefficients.

• #defineGBA_COLEY10x00000052

Alpha Blending Coefficients X.

• #defineGBA_BLDY 0x00000054

Brightness (Fade-In/Out) Coefficient.

• #defineGBA_COLEY20x00000054

Brightness (Fade-In/Out) Coefficient X.



• #defineGBA_REG_DISPCNT_ADDRGBA_IO_REGS_ADDR + GBA_DISPCNT• #defineGBA_REG_DISPSTAT_ADDRGBA_IO_REGS_ADDR + GBA_DISPSTAT• #defineGBA_REG_VCOUNT_ADDRGBA_IO_REGS_ADDR + GBA_VCOUNT• #defineGBA_REG_BG0CNT_ADDRGBA_IO_REGS_ADDR + GBA_BG0CNT• #defineGBA_REG_BG1CNT_ADDRGBA_IO_REGS_ADDR + GBA_BG1CNT• #defineGBA_REG_BG2CNT_ADDRGBA_IO_REGS_ADDR + GBA_BG2CNT• #defineGBA_REG_BG3CNT_ADDRGBA_IO_REGS_ADDR + GBA_BG3CNT• #defineGBA_REG_BG0HOFS_ADDRGBA_IO_REGS_ADDR + GBA_BG0HOFS• #defineGBA_REG_BG0VOFS_ADDRGBA_IO_REGS_ADDR + GBA_BG0VOFS• #defineGBA_REG_BG1HOFS_ADDRGBA_IO_REGS_ADDR + GBA_BG1HOFS• #defineGBA_REG_BG1VOFS_ADDRGBA_IO_REGS_ADDR + GBA_BG1VOFS• #defineGBA_REG_BG2HOFS_ADDRGBA_IO_REGS_ADDR + GBA_BG2HOFS• #defineGBA_REG_BG2VOFS_ADDRGBA_IO_REGS_ADDR + GBA_BG2VOFS• #defineGBA_REG_BG3HOFS_ADDRGBA_IO_REGS_ADDR + GBA_BG3HOFS• #defineGBA_REG_BG3VOFS_ADDRGBA_IO_REGS_ADDR + GBA_BG3VOFS• #defineGBA_REG_BG2PA_ADDRGBA_IO_REGS_ADDR + GBA_BG2PA• #defineGBA_REG_BG2PB_ADDRGBA_IO_REGS_ADDR + GBA_BG2PB• #defineGBA_REG_BG2PC_ADDRGBA_IO_REGS_ADDR + GBA_BG2PC• #defineGBA_REG_BG2PD_ADDRGBA_IO_REGS_ADDR + GBA_BG2PD• #defineGBA_REG_BG2X_ADDRGBA_IO_REGS_ADDR + GBA_BG2X• #defineGBA_REG_BG2X_L_ADDRGBA_IO_REGS_ADDR + GBA_BG2X_L• #defineGBA_REG_BG2X_H_ADDRGBA_IO_REGS_ADDR + GBA_BG2X_H• #defineGBA_REG_BG2Y_ADDRGBA_IO_REGS_ADDR + GBA_BG2Y• #defineGBA_REG_BG2Y_L_ADDRGBA_IO_REGS_ADDR + GBA_BG2Y_L• #defineGBA_REG_BG2Y_H_ADDRGBA_IO_REGS_ADDR + GBA_BG2Y_H• #defineGBA_REG_BG3PA_ADDRGBA_IO_REGS_ADDR + GBA_BG3PA• #defineGBA_REG_BG3PB_ADDRGBA_IO_REGS_ADDR + GBA_BG3PB• #defineGBA_REG_BG3PC_ADDRGBA_IO_REGS_ADDR + GBA_BG3PC• #defineGBA_REG_BG3PD_ADDRGBA_IO_REGS_ADDR + GBA_BG3PD• #defineGBA_REG_BG3X_ADDRGBA_IO_REGS_ADDR + GBA_BG3X• #defineGBA_REG_BG3X_L_ADDRGBA_IO_REGS_ADDR + GBA_BG3X_L• #defineGBA_REG_BG3X_H_ADDRGBA_IO_REGS_ADDR + GBA_BG3X_H• #defineGBA_REG_BG3Y_ADDRGBA_IO_REGS_ADDR + GBA_BG3Y• #defineGBA_REG_BG3Y_L_ADDRGBA_IO_REGS_ADDR + GBA_BG3Y_L• #defineGBA_REG_BG3Y_H_ADDRGBA_IO_REGS_ADDR + GBA_BG3Y_H• #defineGBA_REG_WIN0H_ADDRGBA_IO_REGS_ADDR + GBA_WIN0H• #defineGBA_REG_WIN1H_ADDRGBA_IO_REGS_ADDR + GBA_WIN1H• #defineGBA_REG_WIN0V_ADDRGBA_IO_REGS_ADDR + GBA_WIN0V• #defineGBA_REG_WIN1V_ADDRGBA_IO_REGS_ADDR + GBA_WIN1V• #defineGBA_REG_WININ_ADDRGBA_IO_REGS_ADDR + GBA_WININ• #defineGBA_REG_WINOUT_ADDRGBA_IO_REGS_ADDR + GBA_WINOUT• #defineGBA_REG_MOSAIC_ADDRGBA_IO_REGS_ADDR + GBA_MOSAIC• #defineGBA_REG_BLDCNT_ADDRGBA_IO_REGS_ADDR + GBA_BLDCNT• #defineGBA_REG_BLDMOD_ADDRGBA_IO_REGS_ADDR + GBA_BLDMOD• #defineGBA_REG_BLDALPHA_ADDRGBA_IO_REGS_ADDR + GBA_BLDALPHA• #defineGBA_REG_COLEY1_ADDRGBA_IO_REGS_ADDR + GBA_COLEY1• #defineGBA_REG_BLDY_ADDRGBA_IO_REGS_ADDR + GBA_BLDY• #defineGBA_REG_COLEY2_ADDRGBA_IO_REGS_ADDR + GBA_COLEY2• #defineGBA_REG_DISPCNT(∗(volatile unsigned16∗)(GBA_REG_DISPCNT_ADDR))• #defineGBA_REG_DISPSTAT(∗(volatile unsigned16∗)(GBA_REG_DISPSTAT_ADDR))



• #defineGBA_REG_VCOUNT(∗(volatile unsigned16∗)(GBA_REG_VCOUNT_ADDR))• #defineGBA_REG_BG0CNT(∗(volatile unsigned16∗)(GBA_REG_BG0CNT_ADDR))• #defineGBA_REG_BG1CNT(∗(volatile unsigned16∗)(GBA_REG_BG1CNT_ADDR))• #defineGBA_REG_BG2CNT(∗(volatile unsigned16∗)(GBA_REG_BG2CNT_ADDR))• #defineGBA_REG_BG3CNT(∗(volatile unsigned16∗)(GBA_REG_BG3CNT_ADDR))• #defineGBA_REG_BG0HOFS(∗(volatile unsigned16∗)(GBA_REG_BG0HOFS_ADDR))• #defineGBA_REG_BG0VOFS(∗(volatile unsigned16∗)(GBA_REG_BG0VOFS_ADDR))• #defineGBA_REG_BG1HOFS(∗(volatile unsigned16∗)(GBA_REG_BG1HOFS_ADDR))• #defineGBA_REG_BG1VOFS(∗(volatile unsigned16∗)(GBA_REG_BG1VOFS_ADDR))• #defineGBA_REG_BG2HOFS(∗(volatile unsigned16∗)(GBA_REG_BG2HOFS_ADDR))• #defineGBA_REG_BG2VOFS(∗(volatile unsigned16∗)(GBA_REG_BG2VOFS_ADDR))• #defineGBA_REG_BG3HOFS(∗(volatile unsigned16∗)(GBA_REG_BG3HOFS_ADDR))• #defineGBA_REG_BG3VOFS(∗(volatile unsigned16∗)(GBA_REG_BG3VOFS_ADDR))• #defineGBA_REG_BG2PA(∗(volatile unsigned16∗)(GBA_REG_BG2PA_ADDR))• #defineGBA_REG_BG2PB(∗(volatile unsigned16∗)(GBA_REG_BG2PB_ADDR))• #defineGBA_REG_BG2PC(∗(volatile unsigned16∗)(GBA_REG_BG2PC_ADDR))• #defineGBA_REG_BG2PD(∗(volatile unsigned16∗)(GBA_REG_BG2PD_ADDR))• #defineGBA_REG_BG2X(∗(volatile unsigned32∗)(GBA_REG_BG2X_ADDR))• #defineGBA_REG_BG2X_L(∗(volatile unsigned16∗)(GBA_REG_BG2X_L_ADDR))• #defineGBA_REG_BG2X_H(∗(volatile unsigned16∗)(GBA_REG_BG2X_H_ADDR))• #defineGBA_REG_BG2Y(∗(volatile unsigned32∗)(GBA_REG_BG2Y_ADDR))• #defineGBA_REG_BG2Y_L(∗(volatile unsigned16∗)(GBA_REG_BG2Y_L_ADDR))• #defineGBA_REG_BG2Y_H(∗(volatile unsigned16∗)(GBA_REG_BG2Y_H_ADDR))• #defineGBA_REG_BG3PA(∗(volatile unsigned16∗)(GBA_REG_BG3PA_ADDR))• #defineGBA_REG_BG3PB(∗(volatile unsigned16∗)(GBA_REG_BG3PB_ADDR))• #defineGBA_REG_BG3PC(∗(volatile unsigned16∗)(GBA_REG_BG3PC_ADDR))• #defineGBA_REG_BG3PD(∗(volatile unsigned16∗)(GBA_REG_BG3PD_ADDR))• #defineGBA_REG_BG3X(∗(volatile unsigned32∗)(GBA_REG_BG3X_ADDR))• #defineGBA_REG_BG3X_L(∗(volatile unsigned16∗)(GBA_REG_BG3X_L_ADDR))• #defineGBA_REG_BG3X_H(∗(volatile unsigned16∗)(GBA_REG_BG3X_H_ADDR))• #defineGBA_REG_BG3Y(∗(volatile unsigned32∗)(GBA_REG_BG3Y_ADDR))• #defineGBA_REG_BG3Y_L(∗(volatile unsigned16∗)(GBA_REG_BG3Y_L_ADDR))• #defineGBA_REG_BG3Y_H(∗(volatile unsigned16∗)(GBA_REG_BG3Y_H_ADDR))• #defineGBA_REG_WIN0H(∗(volatile unsigned16∗)(GBA_REG_WIN0H_ADDR))• #defineGBA_REG_WIN1H(∗(volatile unsigned16∗)(GBA_REG_WIN1H_ADDR))• #defineGBA_REG_WIN0V(∗(volatile unsigned16∗)(GBA_REG_WIN0V_ADDR))• #defineGBA_REG_WIN1V(∗(volatile unsigned16∗)(GBA_REG_WIN1V_ADDR))• #defineGBA_REG_WININ(∗(volatile unsigned16∗)(GBA_REG_WININ_ADDR))• #defineGBA_REG_WINOUT(∗(volatile unsigned16∗)(GBA_REG_WINOUT_ADDR))• #defineGBA_REG_MOSAIC(∗(volatile unsigned16∗)(GBA_REG_MOSAIC_ADDR))• #defineGBA_REG_BLDCNT(∗(volatile unsigned16∗)(GBA_REG_BLDCNT_ADDR))• #defineGBA_REG_BLDMOD(∗(volatile unsigned16∗)(GBA_REG_BLDMOD_ADDR))• #defineGBA_REG_BLDALPHA(∗(volatile unsigned16∗)(GBA_REG_BLDALPHA_ADDR))• #defineGBA_REG_COLEY1(∗(volatile unsigned16∗)(GBA_REG_COLEY1_ADDR))• #defineGBA_REG_BLDY(∗(volatile unsigned16∗)(GBA_REG_BLDY_ADDR))• #defineGBA_REG_COLEY2(∗(volatile unsigned16∗)(GBA_REG_COLEY2_ADDR))• #defineGBA_SOUND_INIT0x8000

makes the sound restart

• #defineGBA_SOUND_DUTY870x0000



87.5% wave duty


75% wave duty


50% wave duty

• #defineGBA_SOUND_DUTY250x00C0

25% wave duty

• #defineGBA_SOUND1_PLAYONCE0x4000

play sound once

• #defineGBA_SOUND1_PLAYLOOP0x0000

play sound looped

• #defineGBA_SOUND1_INIT0x8000


• #defineGBA_SOUND1_SWEEPSHIFTS(n) n

number of sweep shifts (0-7)

• #defineGBA_SOUND1_SWEEPINC0x0000

sweep add (freq increase)

• #defineGBA_SOUND1_SWEEPDEC0x0008

sweep dec (freq decrese)

• #defineGBA_SOUND1_SWEEPTIME(n) (n<<4)

time of sweep (0-7)

• #defineGBA_SOUND1_ENVSTEPS(n) (n<<8)

envelope steps (0-7)

• #defineGBA_SOUND1_ENVINC0x0800

envelope increase

• #defineGBA_SOUND1_ENVDEC0x0000

envelope decrease

• #defineGBA_SOUND1_ENVINIT(n) (n<<12)

initial envelope volume (0-15)


play sound once


play sound looped








envelope increase


envelope decrease



• #defineGBA_SOUND3_BANK320x0000

Use two banks of 32 steps each.

• #defineGBA_SOUND3_BANK640x0020

Use one bank of 64 steps.

• #defineGBA_SOUND3_SETBANK00x0000

Bank to play 0 or 1 (non set bank is written to).

• #defineGBA_SOUND3_SETBANK10x0040• #defineGBA_SOUND3_PLAY0x0080

Output sound.

• #defineGBA_SOUND3_OUTPUT00x0000

Mute output.


Output unmodified.


Output 1/2.


Output 1/4.


Output 3/4.


Play sound once.


Play sound looped.




Makes the sound restart.


play sound once


play sound looped






envelope increase


envelope decrease



• #defineGBA_SOUND4_STEPS70x0004• #defineGBA_SOUND4_STEPS150x0000• #defineGBA_SOUND4_PLAYONCE0x4000

play sound once


play sound looped



• #defineGBA_SOUND1CNT_L0x00000060

Channel 1 sweep.

• #defineGBA_SG100x00000060

Channel 1 sweep low X.

• #defineGBA_SG10_L0x00000060

Channel 1 sweep high X.

• #defineGBA_SOUND1CNT_H0x00000062

Channel 1 Duty/Len/Env.

• #defineGBA_SG10_H0x00000062

Channel 1 Duty/Len/Env X.

• #defineGBA_SOUND1CNT_X0x00000064



Channel 1 Freq/Control.


Channel 1 Freq/Control X.





• #defineGBA_SOUND2CNT_H0x0000006C


• #defineGBA_SG210x0000006C



Channel 3 Stop/Wave RAM.


Channel 3 Stop/Wave RAM X.

• #defineGBA_SG30_L0x00000070


• #defineGBA_SOUND3CNT_H0x00000072

Channel 3 Len/Vol.

• #defineGBA_SG30_H0x00000072

Channel 3 Len/Vol X.

• #defineGBA_SOUND3CNT_X0x00000074




• #defineGBA_SG400x00000078• #defineGBA_SG410x0000007C• #defineGBA_SGCNT00x00000080• #defineGBA_SGCNT0_L0x00000080

DMG sound control.

• #defineGBA_SGCNT0_H0x00000082

Direct sound control.

• #defineGBA_SGCNT10x00000084

Extended sound control.



• #defineGBA_SGBIAS0x00000088

bit rate+sound bias

• #defineGBA_SGWR00x00000090• #defineGBA_SGWR0_L0x00000090• #defineGBA_SGWR0_H0x00000092• #defineGBA_SGWR10x00000094• #defineGBA_SGWR1_L0x00000094• #defineGBA_SGWR1_H0x00000096• #defineGBA_SGWR20x00000098• #defineGBA_SGWR2_L0x00000098• #defineGBA_SGWR2_H0x0000009A• #defineGBA_SGWR30x0000009C• #defineGBA_SGWR3_L0x0000009C• #defineGBA_SGWR3_H0x0000009E• #defineGBA_SGFIF0A0x000000A0• #defineGBA_SGFIFOA_L0x000000A0• #defineGBA_SGFIFOA_H0x000000A2• #defineGBA_SGFIFOB0x000000A4• #defineGBA_SGFIFOB_L0x000000A4• #defineGBA_SGFIFOB_H0x000000A6• #defineGBA_REG_SOUND1CNT_L_ADDRGBA_IO_REGS_ADDR + GBA_SOUND1CNT_L• #defineGBA_REG_SG10_ADDRGBA_IO_REGS_ADDR + GBA_SG10• #defineGBA_REG_SG10_L_ADDRGBA_IO_REGS_ADDR + GBA_SG10_L• #defineGBA_REG_SOUND1CNT_H_ADDRGBA_IO_REGS_ADDR + GBA_SOUND1CNT_H• #defineGBA_REG_SG10_H_ADDRGBA_IO_REGS_ADDR + GBA_SG10_H• #defineGBA_REG_SOUND1CNT_X_ADDRGBA_IO_REGS_ADDR + GBA_SOUND1CNT_X• #defineGBA_REG_SG11_ADDRGBA_IO_REGS_ADDR + GBA_SG11• #defineGBA_REG_SOUND2CNT_L_ADDRGBA_IO_REGS_ADDR + GBA_SOUND2CNT_L• #defineGBA_REG_SG20_ADDRGBA_IO_REGS_ADDR + GBA_SG20• #defineGBA_REG_SOUND2CNT_H_ADDRGBA_IO_REGS_ADDR + GBA_SOUND2CNT_H• #defineGBA_REG_SG21_ADDRGBA_IO_REGS_ADDR + GBA_SG21• #defineGBA_REG_SOUND3CNT_L_ADDRGBA_IO_REGS_ADDR + GBA_SOUND3CNT_L• #defineGBA_REG_SG30_ADDRGBA_IO_REGS_ADDR + GBA_SG30• #defineGBA_REG_SG30_L_ADDRGBA_IO_REGS_ADDR + GBA_SG30_L• #defineGBA_REG_SOUND3CNT_H_ADDRGBA_IO_REGS_ADDR + GBA_SOUND3CNT_H• #defineGBA_REG_SG30_H_ADDRGBA_IO_REGS_ADDR + GBA_SG30_H• #defineGBA_REG_SOUND3CNT_X_ADDRGBA_IO_REGS_ADDR + GBA_SOUND3CNT_X• #defineGBA_REG_SG31_ADDRGBA_IO_REGS_ADDR + GBA_SG31• #defineGBA_REG_SG40_ADDRGBA_IO_REGS_ADDR + GBA_SG40• #defineGBA_REG_SG41_ADDRGBA_IO_REGS_ADDR + GBA_SG41• #defineGBA_REG_SGCNT0_ADDRGBA_IO_REGS_ADDR + GBA_SGCNT0• #defineGBA_REG_SGCNT0_L_ADDRGBA_IO_REGS_ADDR + GBA_SGCNT0_L• #defineGBA_REG_SGCNT0_H_ADDRGBA_IO_REGS_ADDR + GBA_SGCNT0_H• #defineGBA_REG_SGCNT1_ADDRGBA_IO_REGS_ADDR + GBA_SGCNT1• #defineGBA_REG_SGBIAS_ADDRGBA_IO_REGS_ADDR + GBA_SGBIAS• #defineGBA_REG_SGWR0_ADDRGBA_IO_REGS_ADDR + GBA_SGWR0• #defineGBA_REG_SGWR0_L_ADDRGBA_IO_REGS_ADDR + GBA_SGWR0_L• #defineGBA_REG_SGWR0_H_ADDRGBA_IO_REGS_ADDR + GBA_SGWR0_H• #defineGBA_REG_SGWR1_ADDRGBA_IO_REGS_ADDR + GBA_SGWR1



• #defineGBA_REG_SGWR1_L_ADDRGBA_IO_REGS_ADDR + GBA_SGWR1_L• #defineGBA_REG_SGWR1_H_ADDRGBA_IO_REGS_ADDR + GBA_SGWR1_H• #defineGBA_REG_SGWR2_ADDRGBA_IO_REGS_ADDR + GBA_SGWR2• #defineGBA_REG_SGWR2_L_ADDRGBA_IO_REGS_ADDR + GBA_SGWR2_L• #defineGBA_REG_SGWR2_H_ADDRGBA_IO_REGS_ADDR + GBA_SGWR2_H• #defineGBA_REG_SGWR3_ADDRGBA_IO_REGS_ADDR + GBA_SGWR3• #defineGBA_REG_SGWR3_L_ADDRGBA_IO_REGS_ADDR + GBA_SGWR3_L)• #defineGBA_REG_SGWR3_H_ADDRGBA_IO_REGS_ADDR + GBA_SGWR3_H• #defineGBA_REG_SGFIF0A_ADDRGBA_IO_REGS_ADDR + GBA_SGFIF0A• #defineGBA_REG_SGFIFOA_L_ADDRGBA_IO_REGS_ADDR + GBA_SGFIFOA_L• #defineGBA_REG_SGFIFOA_H_ADDRGBA_IO_REGS_ADDR + GBA_SGFIFOA_H• #defineGBA_REG_SGFIFOB_ADDRGBA_IO_REGS_ADDR + GBA_SGFIFOB• #defineGBA_REG_SGFIFOB_L_ADDRGBA_IO_REGS_ADDR + GBA_SGFIFOB_L• #defineGBA_REG_SGFIFOB_H_ADDRGBA_IO_REGS_ADDR + GBA_SGFIFOB_H• #define GBA_REG_SOUND1CNT_L(∗(volatile unsigned32∗)(GBA_REG_SOUND1CNT_L_-

ADDR))• #defineGBA_REG_SG10(∗(volatile unsigned32∗)(GBA_REG_SG10_ADDR))• #defineGBA_REG_SG10_L(∗(volatile unsigned16∗)(GBA_REG_SG10_L_ADDR))• #defineGBA_REG_SOUND1CNT_H(∗(volatile unsigned16∗)(GBA_REG_SOUND1CNT_H_-

ADDR))• #defineGBA_REG_SG10_H(∗(volatile unsigned16∗)(GBA_REG_SG10_H_ADDR))• #defineGBA_REG_SOUND1CNT_X(∗(volatile unsigned16∗)(GGBA_REG_SOUND1CNT_X_-

ADDR))• #defineGBA_REG_SG11(∗(volatile unsigned16∗)(GBA_REG_SG11_ADDR))• #define GBA_REG_SOUND2CNT_L(∗(volatile unsigned16∗)(GBA_REG_SOUND2CNT_L_-

ADDR))• #defineGBA_REG_SG20(∗(volatile unsigned16∗)(GBA_REG_SG20_ADDR))• #defineGBA_REG_SOUND2CNT_H(∗(volatile unsigned16∗)(GBA_REG_SOUND2CNT_H_-

ADDR))• #defineGBA_REG_SG21(∗(volatile unsigned16∗)(GBA_REG_SG21_ADDR))• #define GBA_REG_SOUND3CNT_L(∗(volatile unsigned32∗)(GBA_REG_SOUND3CNT_L_-

ADDR))• #defineGBA_REG_SG30(∗(volatile unsigned32∗)(GBA_REG_SG30_ADDR))• #defineGBA_REG_SG30_L(∗(volatile unsigned16∗)(GBA_REG_SG30_L_ADDR))• #defineGBA_REG_SOUND3CNT_H(∗(volatile unsigned16∗)(GBA_REG_SOUND3CNT_H_-

ADDR))• #defineGBA_REG_SG30_H(∗(volatile unsigned16∗)(GBA_REG_SG30_H_ADDR))• #defineGBA_REG_SOUND3CNT_X(∗(volatile unsigned16∗)(GBA_REG_SOUND3CNT_X_-

ADDR))• #defineGBA_REG_SG31(∗(volatile unsigned16∗)(GBA_REG_SG31_ADDR))• #defineGBA_REG_SG40(∗(volatile unsigned16∗)(GBA_REG_SG40_ADDR))• #defineGBA_REG_SG41(∗(volatile unsigned16∗)(GBA_REG_SG41_ADDR))• #defineGBA_REG_SGCNT0(∗(volatile unsigned32∗)(GBA_REG_SGCNT0_ADDR))• #defineGBA_REG_SGCNT0_L(∗(volatile unsigned16∗)(GBA_REG_SGCNT0_L_ADDR))• #defineGBA_REG_SGCNT0_H(∗(volatile unsigned16∗)(GBA_REG_SGCNT0_H_ADDR))• #defineGBA_REG_SGCNT1(∗(volatile unsigned16∗)(GBA_REG_SGCNT1_ADDR))• #defineGBA_REG_SGBIAS(∗(volatile unsigned16∗)(GBA_REG_SGBIAS_ADDR))• #defineGBA_REG_SGWR0(∗(volatile unsigned32∗)(GBA_REG_SGWR0_ADDR))• #defineGBA_REG_SGWR0_L(∗(volatile unsigned16∗)(GBA_REG_SGWR0_L_ADDR))• #defineGBA_REG_SGWR0_H(∗(volatile unsigned16∗)(GBA_REG_SGWR0_H_ADDR))• #defineGBA_REG_SGWR1(∗(volatile unsigned32∗)(GBA_REG_SGWR1_ADDR))



• #defineGBA_REG_SGWR1_L(∗(volatile unsigned16∗)(GBA_REG_SGWR1_L_ADDR))• #defineGBA_REG_SGWR1_H(∗(volatile unsigned16∗)(GBA_REG_SGWR1_H_ADDR))• #defineGBA_REG_SGWR2(∗(volatile unsigned32∗)(GBA_REG_SGWR2_ADDR))• #defineGBA_REG_SGWR2_L(∗(volatile unsigned16∗)(GBA_REG_SGWR2_L_ADDR))• #defineGBA_REG_SGWR2_H(∗(volatile unsigned16∗)(GGBA_REG_SGWR2_H_ADDR))• #defineGBA_REG_SGWR3(∗(volatile unsigned32∗)(GBA_REG_SGWR3_ADDR))• #defineGBA_REG_SGWR3_L(∗(volatile unsigned16∗)(GBA_REG_SGWR3_L)• #defineGBA_REG_SGWR3_H(∗(volatile unsigned16∗)(GBA_REG_SGWR3_H_ADDR))• #defineGBA_REG_SGFIF0A(∗(volatile unsigned32∗)(GBA_REG_SGFIF0A_ADDR))• #defineGBA_REG_SGFIFOA_L(∗(volatile unsigned16∗)(GBA_REG_SGFIFOA_L_ADDR))• #defineGBA_REG_SGFIFOA_H(∗(volatile unsigned16∗)(GBA_REG_SGFIFOA_H_ADDR))• #defineGBA_REG_SGFIFOB(∗(volatile unsigned32∗)(GBA_REG_SGFIFOB_ADDR))• #defineGBA_REG_SGFIFOB_L(∗(volatile unsigned16∗)(GBA_REG_SGFIFOB_L_ADDR))• #defineGBA_REG_SGFIFOB_H(∗(volatile unsigned16∗)(GBA_REG_SGFIFOB_H_ADDR))• #defineGBA_DMA_ENABLE 0x80000000

DMA Enable.

• #defineGBA_DMA_IF_ENABLE 0x40000000

Interrupt Request Enable.

• #defineGBA_DMA_TIMMING_IMM 0x00000000

Run Immediately.

• #defineGBA_DMA_TIMMING_V_BLANK 0x10000000

Run V Blank.

• #defineGBA_DMA_TIMMING_H_BLANK 0x20000000

Run H Blank.

• #defineGBA_DMA_TIMMING_DISP 0x30000000

Run Display.

• #defineGBA_DMA_TIMMING_SOUND 0x30000000

Run Sound FIFO Request.

• #defineGBA_DMA_DREQ_ON0x08000000

Data Request Synchronize Mode ON.

• #defineGBA_DMA_16BIT_BUS0x00000000

Select Bus Size 16Bit.

• #defineGBA_DMA_32BIT_BUS0x04000000


• #defineGBA_DMA_CONTINUOUS_ON0x02000000

Continuous Mode ON.

• #defineGBA_DMA_SRC_INC0x00000000

Select Source Increment.



• #defineGBA_DMA_SRC_DEC0x00800000

Select Source Decrement.

• #defineGBA_DMA_SRC_FIX0x01000000

Select Source Fixed.

• #defineGBA_DMA_DEST_INC0x00000000

Select Destination Increment.

• #defineGBA_DMA_DEST_DEC0x00200000

Select Destination Decrement.

• #defineGBA_DMA_DEST_FIX0x00400000

Select Destination Fixed.

• #defineGBA_DMA_DEST_RELOAD0x00600000

Select Destination.

• #defineGBA_DMA0SAD 0x000000B0

DMA0 Source Address.

• #defineGBA_DMA0SAD_L 0x000000B0

DMA0 Source Address Low Value.

• #defineGBA_DMA0SAD_H0x000000B2

DMA0 Source Address High Value.

• #defineGBA_DMA0DAD 0x000000B4

DMA0 Destination Address.

• #defineGBA_DMA0DAD_L 0x000000B4

DMA0 Destination Address Low Value.

• #defineGBA_DMA0DAD_H 0x000000B6

DMA0 Destination Address High Value.

• #defineGBA_DMA0CNT 0x000000B8

DMA0 Control Word Count.

• #defineGBA_DMA0CNT_L 0x000000B8

DMA0 Control Low Value.

• #defineGBA_DMA0CNT_H0x000000BA

DMA0 Control High Value.

• #defineGBA_DMA1SAD 0x000000BC


• #defineGBA_DMA1SAD_L 0x000000BC




• #defineGBA_DMA1SAD_H0x000000BE


• #defineGBA_DMA1DAD 0x000000C0


• #defineGBA_DMA1DAD_L 0x000000C0


• #defineGBA_DMA1DAD_H 0x000000C2


• #defineGBA_DMA1CNT 0x000000C4


• #defineGBA_DMA1CNT_L 0x000000C4


• #defineGBA_DMA1CNT_H0x000000C6


• #defineGBA_DMA2SAD 0x000000C8


• #defineGBA_DMA2SAD_L 0x000000C8


• #defineGBA_DMA2SAD_H0x000000CA


• #defineGBA_DMA2DAD 0x000000CC


• #defineGBA_DMA2DAD_L 0x000000CC


• #defineGBA_DMA2DAD_H 0x000000CE


• #defineGBA_DMA2CNT 0x000000D0


• #defineGBA_DMA2CNT_L 0x000000D0


• #defineGBA_DMA2CNT_H0x000000D2


• #defineGBA_DMA3SAD 0x000000D4




• #defineGBA_DMA3SAD_L 0x000000D4


• #defineGBA_DMA3SAD_H0x000000D6


• #defineGBA_DMA3DAD 0x000000D8


• #defineGBA_DMA3DAD_L 0x000000D8


• #defineGBA_DMA3DAD_H 0x000000DA


• #defineGBA_DMA3CNT 0x000000DC


• #defineGBA_DMA3CNT_L 0x000000DC


• #defineGBA_DMA3CNT_H0x000000DE


• #defineGBA_REG_DMA0SAD_ADDRGBA_IO_REGS_ADDR + GBA_DMA0SAD• #defineGBA_REG_DMA0SAD_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA0SAD_L• #defineGBA_REG_DMA0SAD_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA0SAD_H• #defineGBA_REG_DMA0DAD_ADDRGBA_IO_REGS_ADDR + GBA_DMA0DAD• #defineGBA_REG_DMA0DAD_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA0DAD_L• #defineGBA_REG_DMA0DAD_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA0DAD_H• #defineGBA_REG_DMA0CNT_ADDRGBA_IO_REGS_ADDR + GBA_DMA0CNT• #defineGBA_REG_DMA0CNT_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA0CNT_L• #defineGBA_REG_DMA0CNT_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA0CNT_H• #defineGBA_REG_DMA1SAD_ADDRGBA_IO_REGS_ADDR + GBA_DMA1SAD• #defineGBA_REG_DMA1SAD_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA1SAD_L• #defineGBA_REG_DMA1SAD_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA1SAD_H• #defineGBA_REG_DMA1DAD_ADDRGBA_IO_REGS_ADDR + GBA_DMA1DAD)• #defineGBA_REG_DMA1DAD_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA1DAD_L• #defineGBA_REG_DMA1DAD_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA1DAD_H• #defineGBA_REG_DMA1CNT_ADDRGBA_IO_REGS_ADDR + GBA_DMA1CNT• #defineGBA_REG_DMA1CNT_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA1CNT_L• #defineGBA_REG_DMA1CNT_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA1CNT_H• #defineGBA_REG_DMA2SAD_ADDRGBA_IO_REGS_ADDR + GBA_DMA2SAD• #defineGBA_REG_DMA2SAD_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA2SAD_L• #defineGBA_REG_DMA2SAD_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA2SAD_H• #defineGBA_REG_DMA2DAD_ADDRGBA_IO_REGS_ADDR + GBA_DMA2DAD• #defineGBA_REG_DMA2DAD_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA2DAD_L• #defineGBA_REG_DMA2DAD_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA2DAD_H



• #defineGBA_REG_DMA2CNT_ADDRGBA_IO_REGS_ADDR + GBA_DMA2CNT• #defineGBA_REG_DMA2CNT_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA2CNT_L• #defineGBA_REG_DMA2CNT_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA2CNT_H• #defineGBA_REG_DMA3SAD_ADDRGBA_IO_REGS_ADDR + GBA_DMA3SAD• #defineGBA_REG_DMA3SAD_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA3SAD_L• #defineGBA_REG_DMA3SAD_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA3SAD_H• #defineGBA_REG_DMA3DAD_ADDRGBA_IO_REGS_ADDR + GBA_DMA3DAD• #defineGBA_REG_DMA3DAD_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA3DAD_L• #defineGBA_REG_DMA3DAD_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA3DAD_H• #defineGBA_REG_DMA3CNT_ADDRGBA_IO_REGS_ADDR + GBA_DMA3CNT• #defineGBA_REG_DMA3CNT_L_ADDRGBA_IO_REGS_ADDR + GBA_DMA3CNT_L• #defineGBA_REG_DMA3CNT_H_ADDRGBA_IO_REGS_ADDR + GBA_DMA3CNT_H• #defineGBA_REG_DMA0SAD(∗(volatile unsigned32∗)(GBA_REG_DMA0SAD_ADDR))• #defineGBA_REG_DMA0SAD_L(∗(volatile unsigned16∗)(GBA_REG_DMA0SAD_L_ADDR))• #defineGBA_REG_DMA0SAD_H(∗(volatile unsigned16∗)(GBA_REG_DMA0SAD_H_ADDR))• #defineGBA_REG_DMA0DAD(∗(volatile unsigned32∗)(GBA_REG_DMA0DAD_ADDR))• #defineGBA_REG_DMA0DAD_L(∗(volatile unsigned16∗)(GBA_REG_DMA0DAD_L_ADDR))• #define GBA_REG_DMA0DAD_H (∗(volatile unsigned16 ∗)(GBA_REG_DMA0DAD_H_-

ADDR))• #defineGBA_REG_DMA0CNT(∗(volatile unsigned32∗)(GBA_REG_DMA0CNT_ADDR))• #defineGBA_REG_DMA0CNT_L(∗(volatile unsigned16∗)(GBA_REG_DMA0CNT_L_ADDR))• #defineGBA_REG_DMA0CNT_H(∗(volatile unsigned16∗)(GBA_REG_DMA0CNT_H_ADDR))• #defineGBA_REG_DMA1SAD(∗(volatile unsigned32∗)(GBA_REG_DMA1SAD_ADDR))• #defineGBA_REG_DMA1SAD_L(∗(volatile unsigned16∗)(GBA_REG_DMA1SAD_L_ADDR))• #defineGBA_REG_DMA1SAD_H(∗(volatile unsigned16∗)(GBA_REG_DMA1SAD_H_ADDR))• #defineGBA_REG_DMA1DAD(∗(volatile unsigned32∗)(GBA_REG_DMA1DAD_ADDR))• #defineGBA_REG_DMA1DAD_L(∗(volatile unsigned16∗)(GBA_REG_DMA1DAD_L_ADDR))• #define GBA_REG_DMA1DAD_H (∗(volatile unsigned16 ∗)(GBA_REG_DMA1DAD_H_-



ADDR))• #defineGBA_REG_DMA3CNT(∗(volatile unsigned32∗)(GBA_REG_DMA3CNT_ADDR))



• #defineGBA_REG_DMA3CNT_L(∗(volatile unsigned16∗)(GBA_REG_DMA3CNT_L_ADDR))• #defineGBA_REG_DMA3CNT_H(∗(volatile unsigned16∗)(GBA_REG_DMA3CNT_H_ADDR))• #defineGBA_TMR_PRESCALER_1CK0x0000

Prescaler 1 clock.

• #defineGBA_TMR_PRESCALER_64CK0x0001

64 clocks


256 clocks


1024 clocks

• #defineGBA_TMR_IF_ENABLE0x0040


• #defineGBA_TMR_ENABLE0x0080

Run Timer.

• #defineGBA_TM0D 0x00000100

Timer 0 count value.

• #defineGBA_TM0CNT0x00000102

Timer 0 Control.



• #defineGBA_TM1CNT0x00000106

Timer 1 control.



• #defineGBA_TM2CNT0x0000010A

Timer 2 control.

• #defineGBA_TM3D 0x0000010C


• #defineGBA_TM3CNT0x0000010E

Timer 4 control.

• #defineGBA_REG_TM0D_ADDRGBA_IO_REGS_ADDR + GBA_TM0D• #defineGBA_REG_TM0CNT_ADDRGBA_IO_REGS_ADDR + GBA_TM0CNT• #defineGBA_REG_TM1D_ADDRGBA_IO_REGS_ADDR + GBA_TM1D• #defineGBA_REG_TM1CNT_ADDRGBA_IO_REGS_ADDR + GBA_TM1CNT• #defineGBA_REG_TM2D_ADDRGBA_IO_REGS_ADDR + GBA_TM2D• #defineGBA_REG_TM2CNT_ADDRGBA_IO_REGS_ADDR + GBA_TM2CNT



• #defineGBA_REG_TM3D_ADDRGBA_IO_REGS_ADDR + GBA_TM3D• #defineGBA_REG_TM3CNT_ADDRGBA_IO_REGS_ADDR + GBA_TM3CNT• #defineGBA_REG_TM0D(∗(volatile unsigned16∗)(GBA_REG_TM0D_ADDR))• #defineGBA_REG_TM0CNT(∗(volatile unsigned16∗)(GBA_REG_TM0CNT_ADDR))• #defineGBA_REG_TM1D(∗(volatile unsigned16∗)(GBA_REG_TM1D_ADDR))• #defineGBA_REG_TM1CNT(∗(volatile unsigned16∗)(GBA_REG_TM1CNT_ADDR))• #defineGBA_REG_TM2D(∗(volatile unsigned16∗)(GBA_REG_TM2D_ADDR))• #defineGBA_REG_TM2CNT(∗(volatile unsigned16∗)(GBA_REG_TM2CNT_ADDR))• #defineGBA_REG_TM3D(∗(volatile unsigned16∗)(GBA_REG_TM3D_ADDR))• #defineGBA_REG_TM3CNT(∗(volatile unsigned16∗)(GBA_REG_TM3CNT_ADDR))• #defineGBA_SER_BAUD_MASK0x0003• #defineGBA_SER_BAUD_96000x0000• #defineGBA_SER_BAUD_384000x0001• #defineGBA_SER_BAUD_576000x0002• #defineGBA_SER_BAUD_1152000x0003• #defineGBA_SER_CTS0x0004• #defineGBA_SCD00x00000120

Multi-play Communication Data 0.

• #defineGBA_SCD10x00000122






• #defineGBA_SCCNT0x00000128• #defineGBA_SCCNT_L0x00000128• #defineGBA_SCCNT_H0x0000012A• #defineGBA_REG_SCD0_ADDRGBA_IO_REGS_ADDR + GBA_SCD0• #defineGBA_REG_SCD1_ADDRGBA_IO_REGS_ADDR + GBA_SCD1• #defineGBA_REG_SCD2_ADDRGBA_IO_REGS_ADDR + GBA_SCD2• #defineGBA_REG_SCD3_ADDRGBA_IO_REGS_ADDR + GBA_SCD3• #defineGBA_REG_SCCNT_ADDRGBA_IO_REGS_ADDR + GBA_SCCNT• #defineGBA_REG_SCCNT_L_ADDRGBA_IO_REGS_ADDR + GBA_SCCNT_L• #defineGBA_REG_SCCNT_H_ADDRGBA_IO_REGS_ADDR + GBA_SCCNT_H• #defineGBA_REG_SCD0(∗(volatile unsigned16∗)(GBA_REG_SCD0_ADDR))• #defineGBA_REG_SCD1(∗(volatile unsigned16∗)(GBA_REG_SCD1_ADDR))• #defineGBA_REG_SCD2(∗(volatile unsigned16∗)(GBA_REG_SCD2_ADDR))• #defineGBA_REG_SCD3(∗(volatile unsigned16∗)(GBA_REG_SCD3_ADDR))• #defineGBA_REG_SCCNT(∗(volatile unsigned32∗)(GBA_REG_SCCNT_ADDR))• #defineGBA_REG_SCCNT_L(∗(volatile unsigned16∗)(GBA_REG_SCCNT_L_ADDR))• #defineGBA_REG_SCCNT_H(∗(volatile unsigned16∗)(GBA_REG_SCCNT_H_ADDR))• #defineGBA_KEY_A 0x0001• #defineGBA_KEY_B 0x0002• #defineGBA_KEY_SELECT0x0004• #defineGBA_KEY_START0x0008• #defineGBA_KEY_RIGHT0x0010



• #defineGBA_KEY_LEFT0x0020• #defineGBA_KEY_UP0x0040• #defineGBA_KEY_DOWN0x0080• #defineGBA_KEY_R0x0100• #defineGBA_KEY_L 0x0200• #defineGBA_KEY_ALL 0x03FF• #defineGBA_P10x00000130

Player 1 Input.

• #defineGBA_KEYINPUT 0x00000130

Formerly P1.

• #defineGBA_P1CNT0x00000132

Player 1 Input Interrupt Status.

• #defineGBA_KEYCNT 0x00000132

Formerly P1CNT.

• #defineGBA_REG_P1_ADDRGBA_IO_REGS_ADDR + GBA_P1• #defineGBA_REG_KEYINPUT_ADDRGBA_IO_REGS_ADDR + GBA_KEYINPUT• #defineGBA_REG_P1CNT_ADDRGBA_IO_REGS_ADDR + GBA_P1CNT• #defineGBA_REG_KEYCNT_ADDRGBA_IO_REGS_ADDR + GBA_KEYCNT• #defineGBA_REG_P1(∗(volatile unsigned16∗)(GBA_REG_P1_ADDR))• #defineGBA_REG_KEYINPUT(∗(volatile unsigned16∗)(GBA_REG_KEYINPUT_ADDR))• #defineGBA_REG_P1CNT(∗(volatile unsigned16∗)(GBA_REG_P1CNT_ADDR))• #defineGBA_REG_KEYCNT(∗(volatile unsigned16∗)(GBA_REG_KEYCNT_ADDR))• #defineGBA_R0x00000134• #defineGBA_HS_CTRL0x00000140• #defineGBA_JOYRE0x00000150• #defineGBA_JOYRE_L0x00000150• #defineGBA_JOYRE_H0x00000152• #defineGBA_JOYTR0x00000154• #defineGBA_JOYTR_L0x00000154• #defineGBA_JOYTR_H0x00000156• #defineGBA_JSTAT0x00000158• #defineGBA_JSTAT_L0x00000158• #defineGBA_JSTAT_H0x0000015A• #defineGBA_REG_R_ADDRGBA_IO_REGS_ADDR + GBA_R• #defineGBA_REG_HS_CTRL_ADDRGBA_IO_REGS_ADDR + GBA_HS_CTRL• #defineGBA_REG_JOYRE_ADDRGBA_IO_REGS_ADDR + GBA_JOYRE• #defineGBA_REG_JOYRE_L_ADDRGBA_IO_REGS_ADDR + GBA_JOYRE_L• #defineGBA_REG_JOYRE_H_ADDRGBA_IO_REGS_ADDR + GBA_JOYRE_H• #defineGBA_REG_JOYTR_ADDRGBA_IO_REGS_ADDR + GBA_JOYTR• #defineGBA_REG_JOYTR_L_ADDRGBA_IO_REGS_ADDR + GBA_JOYTR_L• #defineGBA_REG_JOYTR_H_ADDRGBA_IO_REGS_ADDR + GBA_JOYTR_H• #defineGBA_REG_JSTAT_ADDRGBA_IO_REGS_ADDR + GBA_JSTAT• #defineGBA_REG_JSTAT_L_ADDRGBA_IO_REGS_ADDR + GBA_JSTAT_L• #defineGBA_REG_JSTAT_H_ADDRGBA_IO_REGS_ADDR + GBA_JSTAT_H• #defineGBA_REG_R(∗(volatile unsigned16∗)(GBA_REG_R_ADDR))• #defineGBA_REG_HS_CTRL(∗(volatile unsigned16∗)(GBA_REG_HS_CTRL_ADDR))



• #defineGBA_REG_JOYRE(∗(volatile unsigned32∗)(GBA_REG_JOYRE_ADDR))• #defineGBA_REG_JOYRE_L(∗(volatile unsigned16∗)(GBA_REG_JOYRE_L_ADDR))• #defineGBA_REG_JOYRE_H(∗(volatile unsigned16∗)(GBA_REG_JOYRE_H_ADDR))• #defineGBA_REG_JOYTR(∗(volatile unsigned32∗)(GBA_REG_JOYTR_ADDR))• #defineGBA_REG_JOYTR_L(∗(volatile unsigned16∗)(GBA_REG_JOYTR_L_ADDR))• #defineGBA_REG_JOYTR_H(∗(volatile unsigned16∗)(GBA_REG_JOYTR_H_ADDR))• #defineGBA_REG_JSTAT(∗(volatile unsigned32∗)(GBA_REG_JSTAT_ADDR))• #defineGBA_REG_JSTAT_L(∗(volatile unsigned16∗)(GBA_REG_JSTAT_L_ADDR))• #defineGBA_REG_JSTAT_H(∗(volatile unsigned16∗)(GBA_REG_JSTAT_H_ADDR))• #defineGBA_INT_VBLANK 0x0001• #defineGBA_INT_HBLANK 0x0002• #defineGBA_INT_VCOUNT0x0004• #defineGBA_INT_TIMER00x0008• #defineGBA_INT_TIMER10x0010• #defineGBA_INT_TIMER20x0020• #defineGBA_INT_TIMER30x0040• #defineGBA_INT_SERIAL0x0080• #defineGBA_INT_DMA0 0x0100• #defineGBA_INT_DMA1 0x0200• #defineGBA_INT_DMA2 0x0400• #defineGBA_INT_DMA3 0x0800• #defineGBA_INT_KEY 0x1000• #defineGBA_INT_CART0x2000• #defineGBA_IE 0x00000200

Interrupt Enable.

• #defineGBA_IF 0x00000202

Interrupt Flags.

• #defineGBA_IME 0x00000208

Interrupt Master Enable.

• #defineGBA_REG_IE_ADDRGBA_IO_REGS_ADDR + GBA_IE• #defineGBA_REG_IF_ADDRGBA_IO_REGS_ADDR + GBA_IF• #defineGBA_REG_IME_ADDRGBA_IO_REGS_ADDR + GBA_IME• #defineGBA_REG_IE(∗(volatile unsigned16∗)(GBA_REG_IE_ADDR))• #defineGBA_REG_IF(∗(volatile unsigned16∗)(GBA_REG_IF_ADDR))• #defineGBA_REG_IME(∗(volatile unsigned16∗)(GBA_REG_IME_ADDR))• #defineGBA_PHI_MASK0x1800• #defineGBA_PHI_NONE0x0000• #defineGBA_PHI_4_19MHZ0x0800• #defineGBA_PHI_8_38MHZ0x1000• #defineGBA_PHI_16_76MHZ0x1800• #defineGBA_WSCNT0x00000204• #defineGBA_PAUSE0x00000300• #defineGBA_REG_WSCNT_ADDRGBA_IO_REGS_ADDR + GBA_WSCNT• #defineGBA_REG_PAUSE_ADDRGBA_IO_REGS_ADDR + GBA_PAUSE• #defineGBA_REG_WSCNT(∗(volatile unsigned16∗)(GBA_REG_WSCNT_ADDR))• #defineGBA_REG_PAUSE(∗(volatile unsigned16∗)(GBA_REG_PAUSE_ADDR))• #defineRSRBR0



• #defineRSTHR1• #defineRSIER2• #defineRSIIR3• #defineRSFCR4• #defineRSLCR5• #defineRSLSR6• #defineRSDLL 7• #defineRSDLH8• #defineRSCNT9

Variables

• volatile unsigned int∗ Regs

Chip registers.




RTEMS GBA BSP



Definition in file registers.h.


6.11.2.1 #define GBA_BASE_BIOS (unsigned8∗)GBA_BIOS_ADDR

BIOS - System ROM 16KBytes, protected.

Definition at line 75 of file registers.h.

6.11.2.2 #define GBA_BASE_EXT_RAM (unsigned8∗)GBA_EXT_RAM_ADDR

WRAM - On-board Work RAM 256KBytes.


6.11.2.3 #define GBA_BASE_INT_RAM (unsigned8∗)GBA_INT_RAM_ADDR

WRAM - In-chip Work RAM 32KBytes.


6.11.2.4 #define GBA_BASE_IO_REGS (unsigned8∗)GBA_IO_REGS_ADDR

I/O Registers.






6.11.2.5 #define GBA_BASE_MAX (unsigned8∗)GBA_MAX_ADDR



6.11.2.6 #define GBA_BASE_NOTUSED1 (unsigned8∗)GBA_NU1_ADDR

Not used.



Not used.



Not used.



Not used.



Not used.



Not used.



Not used.



Not used.


6.11.2.14 #define GBA_BASE_OAM (unsigned8∗)GBA_OAM_ADDR

OAM - OBJ Attribytes.




6.11.2.15 #define GBA_BASE_PAL_RAM (unsigned8∗)GBA_PAL_RAM_ADDR

BG/OBJ Palette RAM 1KBytes.


6.11.2.16 #define GBA_BASE_ROM0 (unsigned8∗)GBA_ROM0_ADDR

Pak ROM 32MB.



Pak ROM 32MB.



Pak ROM 32MB.


6.11.2.19 #define GBA_BASE_SRAM (unsigned8∗)GBA_SRAM_ADDR

Pak SRAM 64KBytes.


6.11.2.20 #define GBA_BASE_VRAM (unsigned8∗)GBA_VRAM_ADDR

VRAM - Video RAM 96KBytes.


6.11.2.21 #define GBA_BG0_ENABLE 1


6.11.2.22 #define GBA_BG0CNT 0x00000008

BG0 Control.


6.11.2.23 #define GBA_BG0HOFS 0x00000010

BG0 X-Offset.




6.11.2.24 #define GBA_BG0VOFS 0x00000012

BG0 Y-Offset.




6.11.2.26 #define GBA_BG1CNT 0x0000000A

BG1 Control.



BG1 X-Offset.


6.11.2.28 #define GBA_BG1VOFS 0x00000016

BG1 Y-Offset.




6.11.2.30 #define GBA_BG2CNT 0x0000000C

BG2 Control.



BG2 X-Offset.


6.11.2.32 #define GBA_BG2PA 0x00000020



6.11.2.33 #define GBA_BG2PB 0x00000022





6.11.2.34 #define GBA_BG2PC 0x00000024



6.11.2.35 #define GBA_BG2PD 0x00000026



6.11.2.36 #define GBA_BG2VOFS 0x0000001A

BG2 Y-Offset.


6.11.2.37 #define GBA_BG2X 0x00000028



6.11.2.38 #define GBA_BG2X_H 0x0000002A



6.11.2.39 #define GBA_BG2X_L 0x00000028



6.11.2.40 #define GBA_BG2Y 0x0000002C



6.11.2.41 #define GBA_BG2Y_H 0x0000002E

BG2 Reference Point Y-Coordinate high.


6.11.2.42 #define GBA_BG2Y_L 0x0000002C







6.11.2.44 #define GBA_BG3CNT 0x0000000E

BG3 Control.


6.11.2.45 #define GBA_BG3HOFS 0x0000001C

BG3 X-Offset.


6.11.2.46 #define GBA_BG3PA 0x00000030



6.11.2.47 #define GBA_BG3PB 0x00000032



6.11.2.48 #define GBA_BG3PC 0x00000034



6.11.2.49 #define GBA_BG3PD 0x00000036



6.11.2.50 #define GBA_BG3VOFS 0x0000001E

BG3 Y-Offset.


6.11.2.51 #define GBA_BG3X 0x00000038



6.11.2.52 #define GBA_BG3X_H 0x0000003A



6.11.2.53 #define GBA_BG3X_L 0x00000038





6.11.2.54 #define GBA_BG3Y 0x0000003C



6.11.2.55 #define GBA_BG3Y_H 0x0000003E

BG3 Reference Point Y-Coordinate hugh.


6.11.2.56 #define GBA_BG3Y_L 0x0000003C



6.11.2.57 #define GBA_BG_MODE_0 0












6.11.2.63 #define GBA_BIOS_ADDR 0x00000000


6.11.2.64 #define GBA_BLDALPHA 0x00000052

Alpha Blending Coefficients.




6.11.2.65 #define GBA_BLDCNT 0x00000050

Color Special Effects Selection.


6.11.2.66 #define GBA_BLDMOD 0x00000050

Color Special Effects Selection X.


6.11.2.67 #define GBA_BLDY 0x00000054

Brightness (Fade-In/Out) Coefficient.


6.11.2.68 #define GBA_COLEY1 0x00000052

Alpha Blending Coefficients X.


6.11.2.69 #define GBA_COLEY2 0x00000054

Brightness (Fade-In/Out) Coefficient X.


6.11.2.70 #define GBA_DISP_ALL_ON 0x7f00

All ON.


6.11.2.71 #define GBA_DISP_BG0_ON 0x0100

BG0 ON.



BG1 ON.



BG2 ON.






BG3 ON.


6.11.2.75 #define GBA_DISP_BG_ALL_ON 0x0f00

All BG ON.


6.11.2.76 #define GBA_DISP_BG_MODE_MASK 0x0007

BG Mode.


6.11.2.77 #define GBA_DISP_BG_MODE_SHIFT 0


6.11.2.78 #define GBA_DISP_BMP_FRAME_NO 0x0010

Bitmap Mode Display Frame.


6.11.2.79 #define GBA_DISP_LCDC_OFF 0x0080

LCDC OFF.


6.11.2.80 #define GBA_DISP_MODE_0 0x0000

BG Mode 0.



BG Mode 1.



BG Mode 2.



BG Mode 3.





BG Mode 4.




BG Mode 5.


6.11.2.86 #define GBA_DISP_OBJ_BG_ALL_ON 0x1f00

All OBJ/BG ON.


6.11.2.87 #define GBA_DISP_OBJ_CHAR_1D_MAP 0x0040



6.11.2.88 #define GBA_DISP_OBJ_CHAR_2D_MAP 0x0000



6.11.2.89 #define GBA_DISP_OBJ_HOFF 0x0020

OBJ Processing in H Blank OFF.


6.11.2.90 #define GBA_DISP_OBJ_ON 0x1000

OBJ ON.


6.11.2.91 #define GBA_DISP_OBJWIN_ON 0x8000

OBJ Window ON.


6.11.2.92 #define GBA_DISP_ON_MASK 0x1f00

OBJ BG ON.




6.11.2.93 #define GBA_DISP_ON_SHIFT 8


6.11.2.94 #define GBA_DISP_WIN01_ON 0x6000

Window 0,1 ON.



Window 0 ON.



Window 1 ON.


6.11.2.97 #define GBA_DISP_WIN_ALL_ON 0xe000

All Window ON.


6.11.2.98 #define GBA_DISP_WIN_MASK 0x6000

Window ON.


6.11.2.99 #define GBA_DISP_WIN_SHIFT 13


6.11.2.100 #define GBA_DISPCNT 0x00000000

LCD Control.


6.11.2.101 #define GBA_DISPSTAT 0x00000004

General LCD Status (STAT,LYC).


6.11.2.102 #define GBA_DMA0CNT 0x000000B8





6.11.2.103 #define GBA_DMA0CNT_H 0x000000BA



6.11.2.104 #define GBA_DMA0CNT_L 0x000000B8



6.11.2.105 #define GBA_DMA0DAD 0x000000B4



6.11.2.106 #define GBA_DMA0DAD_H 0x000000B6



6.11.2.107 #define GBA_DMA0DAD_L 0x000000B4



6.11.2.108 #define GBA_DMA0SAD 0x000000B0



6.11.2.109 #define GBA_DMA0SAD_H 0x000000B2



6.11.2.110 #define GBA_DMA0SAD_L 0x000000B0



6.11.2.111 #define GBA_DMA1CNT 0x000000C4



6.11.2.112 #define GBA_DMA1CNT_H 0x000000C6





6.11.2.113 #define GBA_DMA1CNT_L 0x000000C4



6.11.2.114 #define GBA_DMA1DAD 0x000000C0



6.11.2.115 #define GBA_DMA1DAD_H 0x000000C2



6.11.2.116 #define GBA_DMA1DAD_L 0x000000C0



6.11.2.117 #define GBA_DMA1SAD 0x000000BC



6.11.2.118 #define GBA_DMA1SAD_H 0x000000BE



6.11.2.119 #define GBA_DMA1SAD_L 0x000000BC



6.11.2.120 #define GBA_DMA2CNT 0x000000D0



6.11.2.121 #define GBA_DMA2CNT_H 0x000000D2





6.11.2.122 #define GBA_DMA2CNT_L 0x000000D0



6.11.2.123 #define GBA_DMA2DAD 0x000000CC



6.11.2.124 #define GBA_DMA2DAD_H 0x000000CE



6.11.2.125 #define GBA_DMA2DAD_L 0x000000CC



6.11.2.126 #define GBA_DMA2SAD 0x000000C8



6.11.2.127 #define GBA_DMA2SAD_H 0x000000CA



6.11.2.128 #define GBA_DMA2SAD_L 0x000000C8



6.11.2.129 #define GBA_DMA3CNT 0x000000DC



6.11.2.130 #define GBA_DMA3CNT_H 0x000000DE



6.11.2.131 #define GBA_DMA3CNT_L 0x000000DC





6.11.2.132 #define GBA_DMA3DAD 0x000000D8



6.11.2.133 #define GBA_DMA3DAD_H 0x000000DA



6.11.2.134 #define GBA_DMA3DAD_L 0x000000D8



6.11.2.135 #define GBA_DMA3SAD 0x000000D4



6.11.2.136 #define GBA_DMA3SAD_H 0x000000D6



6.11.2.137 #define GBA_DMA3SAD_L 0x000000D4



6.11.2.138 #define GBA_DMA_16BIT_BUS 0x00000000



6.11.2.139 #define GBA_DMA_32BIT_BUS 0x04000000



6.11.2.140 #define GBA_DMA_CONTINUOUS_ON 0x02000000

Continuous Mode ON.




6.11.2.141 #define GBA_DMA_DEST_DEC 0x00200000

Select Destination Decrement.


6.11.2.142 #define GBA_DMA_DEST_FIX 0x00400000

Select Destination Fixed.


6.11.2.143 #define GBA_DMA_DEST_INC 0x00000000

Select Destination Increment.


6.11.2.144 #define GBA_DMA_DEST_RELOAD 0x00600000

Select Destination.


6.11.2.145 #define GBA_DMA_DREQ_ON 0x08000000

Data Request Synchronize Mode ON.


6.11.2.146 #define GBA_DMA_ENABLE 0x80000000

DMA Enable.


6.11.2.147 #define GBA_DMA_IF_ENABLE 0x40000000



6.11.2.148 #define GBA_DMA_SRC_DEC 0x00800000

Select Source Decrement.


6.11.2.149 #define GBA_DMA_SRC_FIX 0x01000000

Select Source Fixed.


6.11.2.150 #define GBA_DMA_SRC_INC 0x00000000

Select Source Increment.




6.11.2.151 #define GBA_DMA_TIMMING_DISP 0x30000000

Run Display.


6.11.2.152 #define GBA_DMA_TIMMING_H_BLANK 0x20000000

Run H Blank.


6.11.2.153 #define GBA_DMA_TIMMING_IMM 0x00000000

Run Immediately.


6.11.2.154 #define GBA_DMA_TIMMING_SOUND 0x30000000

Run Sound FIFO Request.


6.11.2.155 #define GBA_DMA_TIMMING_V_BLANK 0x10000000

Run V Blank.


6.11.2.156 #define GBA_EXT_RAM_ADDR 0x02000000


6.11.2.157 #define GBA_HS_CTRL 0x00000140


6.11.2.158 #define GBA_IE 0x00000200

Interrupt Enable.


6.11.2.159 #define GBA_IF 0x00000202

Interrupt Flags.


6.11.2.160 #define GBA_IME 0x00000208

Interrupt Master Enable.




6.11.2.161 #define GBA_INT_CART 0x2000


6.11.2.162 #define GBA_INT_DMA0 0x0100








6.11.2.166 #define GBA_INT_HBLANK 0x0002


6.11.2.167 #define GBA_INT_KEY 0x1000


6.11.2.168 #define GBA_INT_RAM_ADDR 0x03000000


6.11.2.169 #define GBA_INT_SERIAL 0x0080


6.11.2.170 #define GBA_INT_TIMER0 0x0008










6.11.2.174 #define GBA_INT_VBLANK 0x0001


6.11.2.175 #define GBA_INT_VCOUNT 0x0004


6.11.2.176 #define GBA_IO_REGS_ADDR 0x04000000


6.11.2.177 #define GBA_JOYRE 0x00000150


6.11.2.178 #define GBA_JOYRE_H 0x00000152


6.11.2.179 #define GBA_JOYRE_L 0x00000150


6.11.2.180 #define GBA_JOYTR 0x00000154


6.11.2.181 #define GBA_JOYTR_H 0x00000156


6.11.2.182 #define GBA_JOYTR_L 0x00000154


6.11.2.183 #define GBA_JSTAT 0x00000158


6.11.2.184 #define GBA_JSTAT_H 0x0000015A


6.11.2.185 #define GBA_JSTAT_L 0x00000158


6.11.2.186 #define GBA_KEY_A 0x0001





6.11.2.187 #define GBA_KEY_ALL 0x03FF



6.11.2.188 #define GBA_KEY_B 0x0002



6.11.2.189 #define GBA_KEY_DOWN 0x0080



6.11.2.190 #define GBA_KEY_L 0x0200



6.11.2.191 #define GBA_KEY_LEFT 0x0020



6.11.2.192 #define GBA_KEY_R 0x0100



6.11.2.193 #define GBA_KEY_RIGHT 0x0010



6.11.2.194 #define GBA_KEY_SELECT 0x0004



6.11.2.195 #define GBA_KEY_START 0x0008



6.11.2.196 #define GBA_KEY_UP 0x0040





6.11.2.197 #define GBA_KEYCNT 0x00000132

Formerly P1CNT.


6.11.2.198 #define GBA_KEYINPUT 0x00000130

Formerly P1.


6.11.2.199 #define GBA_MAX_ADDR 0x10000000



6.11.2.200 #define GBA_MOSAIC 0x0000004C

Mosaic Size.


6.11.2.201 #define GBA_NU1_ADDR 0x00004000
















6.11.2.208 #define GBA_NU8_ADDR 0x0E010000


6.11.2.209 #define GBA_OAM_ADDR 0x07000000


6.11.2.210 #define GBA_OBJ_1D_MAP 1


6.11.2.211 #define GBA_OBJ_2D_MAP 0


6.11.2.212 #define GBA_OBJ_ENABLE 16


6.11.2.213 #define GBA_P1 0x00000130

Player 1 Input.


6.11.2.214 #define GBA_P1CNT 0x00000132

Player 1 Input Interrupt Status.


6.11.2.215 #define GBA_PAL_RAM_ADDR 0x05000000


6.11.2.216 #define GBA_PAUSE 0x00000300


6.11.2.217 #define GBA_PHI_16_76MHZ 0x1800








6.11.2.220 #define GBA_PHI_MASK 0x1800


6.11.2.221 #define GBA_PHI_NONE 0x0000


6.11.2.222 #define GBA_R 0x00000134


6.11.2.223 #define GBA_REG_BG0CNT (∗(volatile unsigned16∗)(GBA_REG_BG0CNT_ADDR))


6.11.2.224 #define GBA_REG_BG0CNT_ADDR GBA_IO_REGS_ADDR + GBA_BG0CNT


6.11.2.225 #define GBA_REG_BG0HOFS (∗(volatile unsigned16 ∗)(GBA_REG_BG0HOFS_-ADDR))


6.11.2.226 #define GBA_REG_BG0HOFS_ADDR GBA_IO_REGS_ADDR + GBA_BG0HOFS


6.11.2.227 #define GBA_REG_BG0VOFS (∗(volatile unsigned16 ∗)(GBA_REG_BG0VOFS_-ADDR))


6.11.2.228 #define GBA_REG_BG0VOFS_ADDR GBA_IO_REGS_ADDR + GBA_BG0VOFS
























6.11.2.239 #define GBA_REG_BG2PA (∗(volatile unsigned16∗)(GBA_REG_BG2PA_ADDR))


6.11.2.240 #define GBA_REG_BG2PA_ADDR GBA_IO_REGS_ADDR + GBA_BG2PA


6.11.2.241 #define GBA_REG_BG2PB (∗(volatile unsigned16∗)(GBA_REG_BG2PB_ADDR))


6.11.2.242 #define GBA_REG_BG2PB_ADDR GBA_IO_REGS_ADDR + GBA_BG2PB


6.11.2.243 #define GBA_REG_BG2PC (∗(volatile unsigned16∗)(GBA_REG_BG2PC_ADDR))




6.11.2.244 #define GBA_REG_BG2PC_ADDR GBA_IO_REGS_ADDR + GBA_BG2PC


6.11.2.245 #define GBA_REG_BG2PD (∗(volatile unsigned16∗)(GBA_REG_BG2PD_ADDR))


6.11.2.246 #define GBA_REG_BG2PD_ADDR GBA_IO_REGS_ADDR + GBA_BG2PD






6.11.2.249 #define GBA_REG_BG2X (∗(volatile unsigned32∗)(GBA_REG_BG2X_ADDR))


6.11.2.250 #define GBA_REG_BG2X_ADDR GBA_IO_REGS_ADDR + GBA_BG2X


6.11.2.251 #define GBA_REG_BG2X_H (∗(volatile unsigned16∗)(GBA_REG_BG2X_H_ADDR))


6.11.2.252 #define GBA_REG_BG2X_H_ADDR GBA_IO_REGS_ADDR + GBA_BG2X_H


6.11.2.253 #define GBA_REG_BG2X_L (∗(volatile unsigned16∗)(GBA_REG_BG2X_L_ADDR))


6.11.2.254 #define GBA_REG_BG2X_L_ADDR GBA_IO_REGS_ADDR + GBA_BG2X_L


6.11.2.255 #define GBA_REG_BG2Y (∗(volatile unsigned32∗)(GBA_REG_BG2Y_ADDR))




6.11.2.256 #define GBA_REG_BG2Y_ADDR GBA_IO_REGS_ADDR + GBA_BG2Y


6.11.2.257 #define GBA_REG_BG2Y_H (∗(volatile unsigned16∗)(GBA_REG_BG2Y_H_ADDR))


6.11.2.258 #define GBA_REG_BG2Y_H_ADDR GBA_IO_REGS_ADDR + GBA_BG2Y_H


6.11.2.259 #define GBA_REG_BG2Y_L (∗(volatile unsigned16∗)(GBA_REG_BG2Y_L_ADDR))


6.11.2.260 #define GBA_REG_BG2Y_L_ADDR GBA_IO_REGS_ADDR + GBA_BG2Y_L










6.11.2.265 #define GBA_REG_BG3PA (∗(volatile unsigned16∗)(GBA_REG_BG3PA_ADDR))


6.11.2.266 #define GBA_REG_BG3PA_ADDR GBA_IO_REGS_ADDR + GBA_BG3PA


6.11.2.267 #define GBA_REG_BG3PB (∗(volatile unsigned16∗)(GBA_REG_BG3PB_ADDR))




6.11.2.268 #define GBA_REG_BG3PB_ADDR GBA_IO_REGS_ADDR + GBA_BG3PB


6.11.2.269 #define GBA_REG_BG3PC (∗(volatile unsigned16∗)(GBA_REG_BG3PC_ADDR))


6.11.2.270 #define GBA_REG_BG3PC_ADDR GBA_IO_REGS_ADDR + GBA_BG3PC


6.11.2.271 #define GBA_REG_BG3PD (∗(volatile unsigned16∗)(GBA_REG_BG3PD_ADDR))


6.11.2.272 #define GBA_REG_BG3PD_ADDR GBA_IO_REGS_ADDR + GBA_BG3PD






6.11.2.275 #define GBA_REG_BG3X (∗(volatile unsigned32∗)(GBA_REG_BG3X_ADDR))


6.11.2.276 #define GBA_REG_BG3X_ADDR GBA_IO_REGS_ADDR + GBA_BG3X


6.11.2.277 #define GBA_REG_BG3X_H (∗(volatile unsigned16∗)(GBA_REG_BG3X_H_ADDR))


6.11.2.278 #define GBA_REG_BG3X_H_ADDR GBA_IO_REGS_ADDR + GBA_BG3X_H


6.11.2.279 #define GBA_REG_BG3X_L (∗(volatile unsigned16∗)(GBA_REG_BG3X_L_ADDR))




6.11.2.280 #define GBA_REG_BG3X_L_ADDR GBA_IO_REGS_ADDR + GBA_BG3X_L


6.11.2.281 #define GBA_REG_BG3Y (∗(volatile unsigned32∗)(GBA_REG_BG3Y_ADDR))


6.11.2.282 #define GBA_REG_BG3Y_ADDR GBA_IO_REGS_ADDR + GBA_BG3Y


6.11.2.283 #define GBA_REG_BG3Y_H (∗(volatile unsigned16∗)(GBA_REG_BG3Y_H_ADDR))


6.11.2.284 #define GBA_REG_BG3Y_H_ADDR GBA_IO_REGS_ADDR + GBA_BG3Y_H


6.11.2.285 #define GBA_REG_BG3Y_L (∗(volatile unsigned16∗)(GBA_REG_BG3Y_L_ADDR))


6.11.2.286 #define GBA_REG_BG3Y_L_ADDR GBA_IO_REGS_ADDR + GBA_BG3Y_L


6.11.2.287 #define GBA_REG_BLDALPHA (∗(volatile unsigned16∗)(GBA_REG_BLDALPHA_-ADDR))


6.11.2.288 #define GBA_REG_BLDALPHA_ADDR GBA_IO_REGS_ADDR + GBA_BLDALPHA


6.11.2.289 #define GBA_REG_BLDCNT (∗(volatile unsigned16∗)(GBA_REG_BLDCNT_ADDR))


6.11.2.290 #define GBA_REG_BLDCNT_ADDR GBA_IO_REGS_ADDR + GBA_BLDCNT


6.11.2.291 #define GBA_REG_BLDMOD (∗(volatile unsigned16 ∗)(GBA_REG_BLDMOD_-ADDR))




6.11.2.292 #define GBA_REG_BLDMOD_ADDR GBA_IO_REGS_ADDR + GBA_BLDMOD


6.11.2.293 #define GBA_REG_BLDY (∗(volatile unsigned16∗)(GBA_REG_BLDY_ADDR))


6.11.2.294 #define GBA_REG_BLDY_ADDR GBA_IO_REGS_ADDR + GBA_BLDY


6.11.2.295 #define GBA_REG_COLEY1 (∗(volatile unsigned16∗)(GBA_REG_COLEY1_ADDR))


6.11.2.296 #define GBA_REG_COLEY1_ADDR GBA_IO_REGS_ADDR + GBA_COLEY1


6.11.2.297 #define GBA_REG_COLEY2 (∗(volatile unsigned16∗)(GBA_REG_COLEY2_ADDR))


6.11.2.298 #define GBA_REG_COLEY2_ADDR GBA_IO_REGS_ADDR + GBA_COLEY2


6.11.2.299 #define GBA_REG_DISPCNT (∗(volatile unsigned16 ∗)(GBA_REG_DISPCNT_-ADDR))



6.11.2.300 #define GBA_REG_DISPCNT_ADDR GBA_IO_REGS_ADDR + GBA_DISPCNT


6.11.2.301 #define GBA_REG_DISPSTAT (∗(volatile unsigned16 ∗)(GBA_REG_DISPSTAT_-ADDR))


6.11.2.302 #define GBA_REG_DISPSTAT_ADDR GBA_IO_REGS_ADDR + GBA_DISPSTAT


6.11.2.303 #define GBA_REG_DMA0CNT (∗(volatile unsigned32 ∗)(GBA_REG_DMA0CNT_-ADDR))




6.11.2.304 #define GBA_REG_DMA0CNT_ADDR GBA_IO_REGS_ADDR + GBA_DMA0CNT


6.11.2.305 #define GBA_REG_DMA0CNT_H (∗(volatile unsigned16∗)(GBA_REG_DMA0CNT_-H_ADDR))


6.11.2.306 #define GBA_REG_DMA0CNT_H_ADDR GBA_IO_REGS_ADDR + GBA_-DMA0CNT_H


6.11.2.307 #define GBA_REG_DMA0CNT_L (∗(volatile unsigned16∗)(GBA_REG_DMA0CNT_-L_ADDR))


6.11.2.308 #define GBA_REG_DMA0CNT_L_ADDR GBA_IO_REGS_ADDR + GBA_-DMA0CNT_L


6.11.2.309 #define GBA_REG_DMA0DAD (∗(volatile unsigned32 ∗)(GBA_REG_DMA0DAD_-ADDR))


6.11.2.310 #define GBA_REG_DMA0DAD_ADDR GBA_IO_REGS_ADDR + GBA_DMA0DAD


6.11.2.311 #define GBA_REG_DMA0DAD_H (∗(volatile unsigned16∗)(GBA_REG_DMA0DAD_-H_ADDR))


6.11.2.312 #define GBA_REG_DMA0DAD_H_ADDR GBA_IO_REGS_ADDR + GBA_-DMA0DAD_H


6.11.2.313 #define GBA_REG_DMA0DAD_L (∗(volatile unsigned16∗)(GBA_REG_DMA0DAD_-L_ADDR))




6.11.2.314 #define GBA_REG_DMA0DAD_L_ADDR GBA_IO_REGS_ADDR + GBA_-DMA0DAD_L


6.11.2.315 #define GBA_REG_DMA0SAD (∗(volatile unsigned32 ∗)(GBA_REG_DMA0SAD_-ADDR))


6.11.2.316 #define GBA_REG_DMA0SAD_ADDR GBA_IO_REGS_ADDR + GBA_DMA0SAD


6.11.2.317 #define GBA_REG_DMA0SAD_H (∗(volatile unsigned16∗)(GBA_REG_DMA0SAD_-H_ADDR))


6.11.2.318 #define GBA_REG_DMA0SAD_H_ADDR GBA_IO_REGS_ADDR + GBA_-DMA0SAD_H


6.11.2.319 #define GBA_REG_DMA0SAD_L (∗(volatile unsigned16∗)(GBA_REG_DMA0SAD_-L_ADDR))


6.11.2.320 #define GBA_REG_DMA0SAD_L_ADDR GBA_IO_REGS_ADDR + GBA_-DMA0SAD_L


















6.11.2.328 #define GBA_REG_DMA1DAD_ADDR GBA_IO_REGS_ADDR + GBA_DMA1DAD)


































6.11.2.375 #define GBA_REG_HS_CTRL (∗(volatile unsigned16 ∗)(GBA_REG_HS_CTRL_-ADDR))


6.11.2.376 #define GBA_REG_HS_CTRL_ADDR GBA_IO_REGS_ADDR + GBA_HS_CTRL


6.11.2.377 #define GBA_REG_IE (∗(volatile unsigned16∗)(GBA_REG_IE_ADDR))


Referenced by BSP_install_rtems_irq_handler(), BSP_remove_rtems_irq_handler(), and BSP_rtems_irq_-mngt_init().



6.11.2.378 #define GBA_REG_IE_ADDR GBA_IO_REGS_ADDR + GBA_IE


6.11.2.379 #define GBA_REG_IF (∗(volatile unsigned16∗)(GBA_REG_IF_ADDR))


Referenced by BSP_install_rtems_irq_handler(), and BSP_rtems_irq_mngt_init().

6.11.2.380 #define GBA_REG_IF_ADDR GBA_IO_REGS_ADDR + GBA_IF


6.11.2.381 #define GBA_REG_IME (∗(volatile unsigned16∗)(GBA_REG_IME_ADDR))


Referenced by BSP_rtems_irq_mngt_init().

6.11.2.382 #define GBA_REG_IME_ADDR GBA_IO_REGS_ADDR + GBA_IME


6.11.2.383 #define GBA_REG_JOYRE (∗(volatile unsigned32∗)(GBA_REG_JOYRE_ADDR))


6.11.2.384 #define GBA_REG_JOYRE_ADDR GBA_IO_REGS_ADDR + GBA_JOYRE


6.11.2.385 #define GBA_REG_JOYRE_H (∗(volatile unsigned16 ∗)(GBA_REG_JOYRE_H_-ADDR))


6.11.2.386 #define GBA_REG_JOYRE_H_ADDR GBA_IO_REGS_ADDR + GBA_JOYRE_H


6.11.2.387 #define GBA_REG_JOYRE_L (∗(volatile unsigned16 ∗)(GBA_REG_JOYRE_L_-ADDR))


6.11.2.388 #define GBA_REG_JOYRE_L_ADDR GBA_IO_REGS_ADDR + GBA_JOYRE_L


6.11.2.389 #define GBA_REG_JOYTR (∗(volatile unsigned32∗)(GBA_REG_JOYTR_ADDR))




6.11.2.390 #define GBA_REG_JOYTR_ADDR GBA_IO_REGS_ADDR + GBA_JOYTR


6.11.2.391 #define GBA_REG_JOYTR_H (∗(volatile unsigned16 ∗)(GBA_REG_JOYTR_H_-ADDR))


6.11.2.392 #define GBA_REG_JOYTR_H_ADDR GBA_IO_REGS_ADDR + GBA_JOYTR_H


6.11.2.393 #define GBA_REG_JOYTR_L (∗(volatile unsigned16 ∗)(GBA_REG_JOYTR_L_-ADDR))


6.11.2.394 #define GBA_REG_JOYTR_L_ADDR GBA_IO_REGS_ADDR + GBA_JOYTR_L


6.11.2.395 #define GBA_REG_JSTAT (∗(volatile unsigned32∗)(GBA_REG_JSTAT_ADDR))


6.11.2.396 #define GBA_REG_JSTAT_ADDR GBA_IO_REGS_ADDR + GBA_JSTAT


6.11.2.397 #define GBA_REG_JSTAT_H (∗(volatile unsigned16∗)(GBA_REG_JSTAT_H_ADDR))


6.11.2.398 #define GBA_REG_JSTAT_H_ADDR GBA_IO_REGS_ADDR + GBA_JSTAT_H


6.11.2.399 #define GBA_REG_JSTAT_L (∗(volatile unsigned16∗)(GBA_REG_JSTAT_L_ADDR))


6.11.2.400 #define GBA_REG_JSTAT_L_ADDR GBA_IO_REGS_ADDR + GBA_JSTAT_L


6.11.2.401 #define GBA_REG_KEYCNT (∗(volatile unsigned16 ∗)(GBA_REG_KEYCNT_-ADDR))




6.11.2.402 #define GBA_REG_KEYCNT_ADDR GBA_IO_REGS_ADDR + GBA_KEYCNT


6.11.2.403 #define GBA_REG_KEYINPUT (∗(volatile unsigned16∗)(GBA_REG_KEYINPUT_-ADDR))


6.11.2.404 #define GBA_REG_KEYINPUT_ADDR GBA_IO_REGS_ADDR + GBA_KEYINPUT


6.11.2.405 #define GBA_REG_MOSAIC (∗(volatile unsigned16∗)(GBA_REG_MOSAIC_ADDR))


6.11.2.406 #define GBA_REG_MOSAIC_ADDR GBA_IO_REGS_ADDR + GBA_MOSAIC


6.11.2.407 #define GBA_REG_P1 (∗(volatile unsigned16∗)(GBA_REG_P1_ADDR))


6.11.2.408 #define GBA_REG_P1_ADDR GBA_IO_REGS_ADDR + GBA_P1


6.11.2.409 #define GBA_REG_P1CNT (∗(volatile unsigned16∗)(GBA_REG_P1CNT_ADDR))


6.11.2.410 #define GBA_REG_P1CNT_ADDR GBA_IO_REGS_ADDR + GBA_P1CNT


6.11.2.411 #define GBA_REG_PAUSE (∗(volatile unsigned16∗)(GBA_REG_PAUSE_ADDR))


6.11.2.412 #define GBA_REG_PAUSE_ADDR GBA_IO_REGS_ADDR + GBA_PAUSE


6.11.2.413 #define GBA_REG_R (∗(volatile unsigned16∗)(GBA_REG_R_ADDR))




6.11.2.414 #define GBA_REG_R_ADDR GBA_IO_REGS_ADDR + GBA_R


6.11.2.415 #define GBA_REG_SCCNT (∗(volatile unsigned32∗)(GBA_REG_SCCNT_ADDR))


6.11.2.416 #define GBA_REG_SCCNT_ADDR GBA_IO_REGS_ADDR + GBA_SCCNT


6.11.2.417 #define GBA_REG_SCCNT_H (∗(volatile unsigned16 ∗)(GBA_REG_SCCNT_H_-ADDR))


6.11.2.418 #define GBA_REG_SCCNT_H_ADDR GBA_IO_REGS_ADDR + GBA_SCCNT_H


6.11.2.419 #define GBA_REG_SCCNT_L (∗(volatile unsigned16 ∗)(GBA_REG_SCCNT_L_-ADDR))


6.11.2.420 #define GBA_REG_SCCNT_L_ADDR GBA_IO_REGS_ADDR + GBA_SCCNT_L


6.11.2.421 #define GBA_REG_SCD0 (∗(volatile unsigned16∗)(GBA_REG_SCD0_ADDR))


6.11.2.422 #define GBA_REG_SCD0_ADDR GBA_IO_REGS_ADDR + GBA_SCD0
















6.11.2.429 #define GBA_REG_SG10 (∗(volatile unsigned32∗)(GBA_REG_SG10_ADDR))


6.11.2.430 #define GBA_REG_SG10_ADDR GBA_IO_REGS_ADDR + GBA_SG10


6.11.2.431 #define GBA_REG_SG10_H (∗(volatile unsigned16∗)(GBA_REG_SG10_H_ADDR))


6.11.2.432 #define GBA_REG_SG10_H_ADDR GBA_IO_REGS_ADDR + GBA_SG10_H


6.11.2.433 #define GBA_REG_SG10_L (∗(volatile unsigned16∗)(GBA_REG_SG10_L_ADDR))


6.11.2.434 #define GBA_REG_SG10_L_ADDR GBA_IO_REGS_ADDR + GBA_SG10_L




















6.11.2.443 #define GBA_REG_SG30_H (∗(volatile unsigned16∗)(GBA_REG_SG30_H_ADDR))


6.11.2.444 #define GBA_REG_SG30_H_ADDR GBA_IO_REGS_ADDR + GBA_SG30_H


6.11.2.445 #define GBA_REG_SG30_L (∗(volatile unsigned16∗)(GBA_REG_SG30_L_ADDR))


6.11.2.446 #define GBA_REG_SG30_L_ADDR GBA_IO_REGS_ADDR + GBA_SG30_L
















6.11.2.453 #define GBA_REG_SGBIAS (∗(volatile unsigned16∗)(GBA_REG_SGBIAS_ADDR))


6.11.2.454 #define GBA_REG_SGBIAS_ADDR GBA_IO_REGS_ADDR + GBA_SGBIAS


6.11.2.455 #define GBA_REG_SGCNT0 (∗(volatile unsigned32∗)(GBA_REG_SGCNT0_ADDR))


6.11.2.456 #define GBA_REG_SGCNT0_ADDR GBA_IO_REGS_ADDR + GBA_SGCNT0


6.11.2.457 #define GBA_REG_SGCNT0_H (∗(volatile unsigned16 ∗)(GBA_REG_SGCNT0_H_-ADDR))


6.11.2.458 #define GBA_REG_SGCNT0_H_ADDR GBA_IO_REGS_ADDR + GBA_SGCNT0_H


6.11.2.459 #define GBA_REG_SGCNT0_L (∗(volatile unsigned16 ∗)(GBA_REG_SGCNT0_L_-ADDR))


6.11.2.460 #define GBA_REG_SGCNT0_L_ADDR GBA_IO_REGS_ADDR + GBA_SGCNT0_L


6.11.2.461 #define GBA_REG_SGCNT1 (∗(volatile unsigned16∗)(GBA_REG_SGCNT1_ADDR))


6.11.2.462 #define GBA_REG_SGCNT1_ADDR GBA_IO_REGS_ADDR + GBA_SGCNT1


6.11.2.463 #define GBA_REG_SGFIF0A (∗(volatile unsigned32∗)(GBA_REG_SGFIF0A_ADDR))




6.11.2.464 #define GBA_REG_SGFIF0A_ADDR GBA_IO_REGS_ADDR + GBA_SGFIF0A


6.11.2.465 #define GBA_REG_SGFIFOA_H (∗(volatile unsigned16∗)(GBA_REG_SGFIFOA_H_-ADDR))


6.11.2.466 #define GBA_REG_SGFIFOA_H_ADDR GBA_IO_REGS_ADDR + GBA_SGFIFOA_-H


6.11.2.467 #define GBA_REG_SGFIFOA_L (∗(volatile unsigned16∗)(GBA_REG_SGFIFOA_L_-ADDR))


6.11.2.468 #define GBA_REG_SGFIFOA_L_ADDR GBA_IO_REGS_ADDR + GBA_SGFIFOA_-L


6.11.2.469 #define GBA_REG_SGFIFOB (∗(volatile unsigned32 ∗)(GBA_REG_SGFIFOB_-ADDR))


6.11.2.470 #define GBA_REG_SGFIFOB_ADDR GBA_IO_REGS_ADDR + GBA_SGFIFOB


6.11.2.471 #define GBA_REG_SGFIFOB_H (∗(volatile unsigned16∗)(GBA_REG_SGFIFOB_H_-ADDR))


6.11.2.472 #define GBA_REG_SGFIFOB_H_ADDR GBA_IO_REGS_ADDR + GBA_SGFIFOB_-H


6.11.2.473 #define GBA_REG_SGFIFOB_L (∗(volatile unsigned16∗)(GBA_REG_SGFIFOB_L_-ADDR))


6.11.2.474 #define GBA_REG_SGFIFOB_L_ADDR GBA_IO_REGS_ADDR + GBA_SGFIFOB_-L




6.11.2.475 #define GBA_REG_SGWR0 (∗(volatile unsigned32∗)(GBA_REG_SGWR0_ADDR))


6.11.2.476 #define GBA_REG_SGWR0_ADDR GBA_IO_REGS_ADDR + GBA_SGWR0


6.11.2.477 #define GBA_REG_SGWR0_H (∗(volatile unsigned16 ∗)(GBA_REG_SGWR0_H_-ADDR))


6.11.2.478 #define GBA_REG_SGWR0_H_ADDR GBA_IO_REGS_ADDR + GBA_SGWR0_H


6.11.2.479 #define GBA_REG_SGWR0_L (∗(volatile unsigned16 ∗)(GBA_REG_SGWR0_L_-ADDR))


6.11.2.480 #define GBA_REG_SGWR0_L_ADDR GBA_IO_REGS_ADDR + GBA_SGWR0_L




















6.11.2.489 #define GBA_REG_SGWR2_H (∗(volatile unsigned16 ∗)(GGBA_REG_SGWR2_H_-ADDR))
















6.11.2.497 #define GBA_REG_SGWR3_L (∗(volatile unsigned16∗)(GBA_REG_SGWR3_L)


6.11.2.498 #define GBA_REG_SGWR3_L_ADDR GBA_IO_REGS_ADDR + GBA_SGWR3_L)




6.11.2.499 #define GBA_REG_SOUND1CNT_H (∗(volatile unsigned16 ∗)(GBA_REG_-SOUND1CNT_H_ADDR))


6.11.2.500 #define GBA_REG_SOUND1CNT_H_ADDR GBA_IO_REGS_ADDR + GBA_-SOUND1CNT_H


6.11.2.501 #define GBA_REG_SOUND1CNT_L (∗(volatile unsigned32 ∗)(GBA_REG_-SOUND1CNT_L_ADDR))


6.11.2.502 #define GBA_REG_SOUND1CNT_L_ADDR GBA_IO_REGS_ADDR + GBA_-SOUND1CNT_L


6.11.2.503 #define GBA_REG_SOUND1CNT_X (∗(volatile unsigned16 ∗)(GGBA_REG_-SOUND1CNT_X_ADDR))


6.11.2.504 #define GBA_REG_SOUND1CNT_X_ADDR GBA_IO_REGS_ADDR + GBA_-SOUND1CNT_X




















6.11.2.513 #define GBA_REG_SOUND3CNT_X (∗(volatile unsigned16 ∗)(GBA_REG_-SOUND3CNT_X_ADDR))


6.11.2.514 #define GBA_REG_SOUND3CNT_X_ADDR GBA_IO_REGS_ADDR + GBA_-SOUND3CNT_X


6.11.2.515 #define GBA_REG_TM0CNT (∗(volatile unsigned16∗)(GBA_REG_TM0CNT_ADDR))


Referenced by Read_timer(), and Timer_initialize().

6.11.2.516 #define GBA_REG_TM0CNT_ADDR GBA_IO_REGS_ADDR + GBA_TM0CNT


6.11.2.517 #define GBA_REG_TM0D (∗(volatile unsigned16∗)(GBA_REG_TM0D_ADDR))



6.11.2.518 #define GBA_REG_TM0D_ADDR GBA_IO_REGS_ADDR + GBA_TM0D






6.11.2.531 #define GBA_REG_VCOUNT (∗(volatile unsigned16 ∗)(GBA_REG_VCOUNT_-ADDR))


6.11.2.532 #define GBA_REG_VCOUNT_ADDR GBA_IO_REGS_ADDR + GBA_VCOUNT


6.11.2.533 #define GBA_REG_WIN0H (∗(volatile unsigned16∗)(GBA_REG_WIN0H_ADDR))


6.11.2.534 #define GBA_REG_WIN0H_ADDR GBA_IO_REGS_ADDR + GBA_WIN0H


6.11.2.535 #define GBA_REG_WIN0V (∗(volatile unsigned16∗)(GBA_REG_WIN0V_ADDR))


6.11.2.536 #define GBA_REG_WIN0V_ADDR GBA_IO_REGS_ADDR + GBA_WIN0V


6.11.2.537 #define GBA_REG_WIN1H (∗(volatile unsigned16∗)(GBA_REG_WIN1H_ADDR))


6.11.2.538 #define GBA_REG_WIN1H_ADDR GBA_IO_REGS_ADDR + GBA_WIN1H


6.11.2.539 #define GBA_REG_WIN1V (∗(volatile unsigned16∗)(GBA_REG_WIN1V_ADDR))


6.11.2.540 #define GBA_REG_WIN1V_ADDR GBA_IO_REGS_ADDR + GBA_WIN1V


6.11.2.541 #define GBA_REG_WININ (∗(volatile unsigned16∗)(GBA_REG_WININ_ADDR))


6.11.2.542 #define GBA_REG_WININ_ADDR GBA_IO_REGS_ADDR + GBA_WININ




6.11.2.543 #define GBA_REG_WINOUT (∗(volatile unsigned16 ∗)(GBA_REG_WINOUT_-ADDR))


6.11.2.544 #define GBA_REG_WINOUT_ADDR GBA_IO_REGS_ADDR + GBA_WINOUT


6.11.2.545 #define GBA_REG_WSCNT (∗(volatile unsigned16∗)(GBA_REG_WSCNT_ADDR))


6.11.2.546 #define GBA_REG_WSCNT_ADDR GBA_IO_REGS_ADDR + GBA_WSCNT


6.11.2.547 #define GBA_ROM0_ADDR 0x08000000


6.11.2.548 #define GBA_ROM1_ADDR 0x0A000000


6.11.2.549 #define GBA_ROM2_ADDR 0x0C000000


6.11.2.550 #define GBA_SCCNT 0x00000128


6.11.2.551 #define GBA_SCCNT_H 0x0000012A


6.11.2.552 #define GBA_SCCNT_L 0x00000128


6.11.2.553 #define GBA_SCD0 0x00000120



6.11.2.554 #define GBA_SCD1 0x00000122





6.11.2.555 #define GBA_SCD2 0x00000124



6.11.2.556 #define GBA_SCD3 0x00000126



6.11.2.557 #define GBA_SER_BAUD_115200 0x0003








6.11.2.561 #define GBA_SER_BAUD_MASK 0x0003


6.11.2.562 #define GBA_SER_CTS 0x0004


6.11.2.563 #define GBA_SG10 0x00000060

Channel 1 sweep low X.


6.11.2.564 #define GBA_SG10_H 0x00000062



6.11.2.565 #define GBA_SG10_L 0x00000060

Channel 1 sweep high X.




6.11.2.566 #define GBA_SG11 0x00000064



6.11.2.567 #define GBA_SG20 0x00000068



6.11.2.568 #define GBA_SG21 0x0000006C



6.11.2.569 #define GBA_SG30 0x00000070



6.11.2.570 #define GBA_SG30_H 0x00000072

Channel 3 Len/Vol X.


6.11.2.571 #define GBA_SG30_L 0x00000070



6.11.2.572 #define GBA_SG31 0x00000074



6.11.2.573 #define GBA_SG40 0x00000078


6.11.2.574 #define GBA_SG41 0x0000007C


6.11.2.575 #define GBA_SGBIAS 0x00000088

bit rate+sound bias




6.11.2.576 #define GBA_SGCNT0 0x00000080


6.11.2.577 #define GBA_SGCNT0_H 0x00000082

Direct sound control.


6.11.2.578 #define GBA_SGCNT0_L 0x00000080

DMG sound control.


6.11.2.579 #define GBA_SGCNT1 0x00000084

Extended sound control.


6.11.2.580 #define GBA_SGFIF0A 0x000000A0


6.11.2.581 #define GBA_SGFIFOA_H 0x000000A2


6.11.2.582 #define GBA_SGFIFOA_L 0x000000A0


6.11.2.583 #define GBA_SGFIFOB 0x000000A4


6.11.2.584 #define GBA_SGFIFOB_H 0x000000A6


6.11.2.585 #define GBA_SGFIFOB_L 0x000000A4


6.11.2.586 #define GBA_SGWR0 0x00000090


6.11.2.587 #define GBA_SGWR0_H 0x00000092




6.11.2.588 #define GBA_SGWR0_L 0x00000090


6.11.2.589 #define GBA_SGWR1 0x00000094


6.11.2.590 #define GBA_SGWR1_H 0x00000096




6.11.2.592 #define GBA_SGWR2 0x00000098


6.11.2.593 #define GBA_SGWR2_H 0x0000009A




6.11.2.595 #define GBA_SGWR3 0x0000009C


6.11.2.596 #define GBA_SGWR3_H 0x0000009E


6.11.2.597 #define GBA_SGWR3_L 0x0000009C


6.11.2.598 #define GBA_SOUND1_ENVDEC 0x0000

envelope decrease


6.11.2.599 #define GBA_SOUND1_ENVINC 0x0800

envelope increase




6.11.2.600 #define GBA_SOUND1_ENVINIT(n) (n<<12)



6.11.2.601 #define GBA_SOUND1_ENVSTEPS(n) (n<<8)



6.11.2.602 #define GBA_SOUND1_INIT 0x8000



6.11.2.603 #define GBA_SOUND1_PLAYLOOP 0x0000

play sound looped


6.11.2.604 #define GBA_SOUND1_PLAYONCE 0x4000

play sound once


6.11.2.605 #define GBA_SOUND1_SWEEPDEC 0x0008

sweep dec (freq decrese)


6.11.2.606 #define GBA_SOUND1_SWEEPINC 0x0000

sweep add (freq increase)


6.11.2.607 #define GBA_SOUND1_SWEEPSHIFTS(n) n

number of sweep shifts (0-7)


6.11.2.608 #define GBA_SOUND1_SWEEPTIME(n) (n<<4)

time of sweep (0-7)


6.11.2.609 #define GBA_SOUND1CNT_H 0x00000062





6.11.2.610 #define GBA_SOUND1CNT_L 0x00000060

Channel 1 sweep.


6.11.2.611 #define GBA_SOUND1CNT_X 0x00000064




envelope decrease



envelope increase












play sound looped



play sound once




6.11.2.619 #define GBA_SOUND2CNT_H 0x0000006C






6.11.2.621 #define GBA_SOUND3_BANK32 0x0000

Use two banks of 32 steps each.


6.11.2.622 #define GBA_SOUND3_BANK64 0x0020

Use one bank of 64 steps.



Makes the sound restart.


6.11.2.624 #define GBA_SOUND3_OUTPUT0 0x0000

Mute output.



Output unmodified.



Output 1/2.



Output 1/4.



Output 3/4.




6.11.2.629 #define GBA_SOUND3_PLAY 0x0080

Output sound.



Play sound looped.



Play sound once.


6.11.2.632 #define GBA_SOUND3_SETBANK0 0x0000

Bank to play 0 or 1 (non set bank is written to).


6.11.2.633 #define GBA_SOUND3_SETBANK1 0x0040


6.11.2.634 #define GBA_SOUND3CNT_H 0x00000072

Channel 3 Len/Vol.



Channel 3 Stop/Wave RAM.


6.11.2.636 #define GBA_SOUND3CNT_X 0x00000074




envelope decrease





envelope increase















play sound looped



play sound looped



play sound once



play sound once


6.11.2.647 #define GBA_SOUND4_STEPS15 0x0000




6.11.2.648 #define GBA_SOUND4_STEPS7 0x0004


6.11.2.649 #define GBA_SOUND_DUTY25 0x00C0

25% wave duty


6.11.2.650 #define GBA_SOUND_DUTY50 0x0080

50% wave duty



75% wave duty



87.5% wave duty


6.11.2.653 #define GBA_SOUND_INIT 0x8000



6.11.2.654 #define GBA_SRAM_ADDR 0x0E000000


6.11.2.655 #define GBA_TM0CNT 0x00000102

Timer 0 Control.


6.11.2.656 #define GBA_TM0D 0x00000100



6.11.2.657 #define GBA_TM1CNT 0x00000106

Timer 1 control.




6.11.2.658 #define GBA_TM1D 0x00000104



6.11.2.659 #define GBA_TM2CNT 0x0000010A

Timer 2 control.


6.11.2.660 #define GBA_TM2D 0x00000108



6.11.2.661 #define GBA_TM3CNT 0x0000010E

Timer 4 control.


6.11.2.662 #define GBA_TM3D 0x0000010C



6.11.2.663 #define GBA_TMR_ENABLE 0x0080

Run Timer.


6.11.2.664 #define GBA_TMR_IF_ENABLE 0x0040



6.11.2.665 #define GBA_TMR_PRESCALER_1024CK 0x0003

1024 clocks



Prescaler 1 clock.



256 clocks





64 clocks


6.11.2.669 #define GBA_VCOUNT 0x00000006

Vertical Counter (LY).


6.11.2.670 #define GBA_VRAM_ADDR 0x06000000


6.11.2.671 #define GBA_WIN0H 0x00000040



6.11.2.672 #define GBA_WIN0V 0x00000044



6.11.2.673 #define GBA_WIN1H 0x00000042



6.11.2.674 #define GBA_WIN1V 0x00000046



6.11.2.675 #define GBA_WININ 0x00000048

Control Inside of Window(s).


6.11.2.676 #define GBA_WINOUT 0x0000004A

Control Outside of Windows & Inside of OBJ Window.


6.11.2.677 #define GBA_WSCNT 0x00000204



6.12 gba/irq/bsp_irq_asm.S File Reference 152

6.11.2.678 #define RSCNT 9


6.11.2.679 #define RSDLH 8


6.11.2.680 #define RSDLL 7


6.11.2.681 #define RSFCR 4


6.11.2.682 #define RSIER 2


6.11.2.683 #define RSIIR 3


6.11.2.684 #define RSLCR 5


6.11.2.685 #define RSLSR 6


6.11.2.686 #define RSRBR 0


6.11.2.687 #define RSTHR 1



6.11.3.1 volatile unsigned int∗ Regs

Chip registers.


6.12 gba/irq/bsp_irq_asm.S File Reference


#include <asm_macros.h >


6.13 gba/irq/bsp_irq_init.c File Reference 153


#include <irq.h >

Include dependency graph for bsp_irq_asm.S:


asm_macros.h

registers.h

irq.h

mode_bits.h

rtems.h

Defines

• #define__asm__



RTEMS GBA BSP



Definition in filebsp_irq_asm.S.


6.12.2.1 #define __asm__

Definition at line 16 of file bsp_irq_asm.S.

6.13 gba/irq/bsp_irq_init.c File Reference


#include <irq.h >

#include <bsp.h >


Include dependency graph for bsp_irq_init.c:


irq.h

bsp.h

registers.h

rtems.h

bspopts.h

iosupp.h

console.h

clockdrv.h




6.14 gba/irq/irq.c File Reference 154

Functions

• void BSP_rtems_irq_mngt_init(void)




RTEMS GBA BSP



Definition in filebsp_irq_init.c.


6.13.2.1 void BSP_rtems_irq_mngt_init (void)




Definition at line 29 of file bsp_irq_init.c.

References GBA_REG_IE, GBA_REG_IF, and GBA_REG_IME.

Referenced by rtems_irq_mngt_init().

30 {31 / * clear all interrupt status flags * /32 GBA_REG_IF = 0xffff;33 / * disable all interrupts * /34 GBA_REG_IE = 0;35 / * set master interrupt enable * /36 GBA_REG_IME = 1;37 }

6.14 gba/irq/irq.c File Reference


#include <bsp.h >

#include <irq.h >


#include <rtems/score/thread.h >

#include <rtems/score/apiext.h >

Include dependency graph for irq.c:





gba/irq/irq.c

bsp.h

irq.h

registers.h

rtems/score/thread.h

rtems/score/apiext.h

bspopts.h

rtems.h

iosupp.h

console.h

clockdrv.h

Functions

• static intisValidInterrupt(int irq)

isValidInterrupt function check that the value given for the irq line is valid.

• int BSP_install_rtems_irq_handler(constrtems_irq_connect_data∗irq)


• int BSP_remove_rtems_irq_handler(constrtems_irq_connect_data∗irq)


• void _ThreadProcessSignalsFromIrq(CPU_Exception_frame∗ctx)

_ThreadProcessSignalsFromIrq function check that the value given for the irq line is valid.



RTEMS GBA BSP

Copyright (c) 2002 by Jay Monkman<[email protected] >

Copyright (c) 2002 by Charlie Steader<[email protected] >

Copyright (c) 2004 by Markku Puro<[email protected] >


Definition in file irq.c.


6.14.2.1 void _ThreadProcessSignalsFromIrq (CPU_Exception_frame∗ ctx)

_ThreadProcessSignalsFromIrq function check that the value given for the irq line is valid.

Input parameters: Exeption frame



149 {







150 / *151 * Process pending signals that have not already been152 * processed by _Thread_Dispatch. This happens quite153 * unfrequently : the ISR must have posted an action154 * to the current running thread.155 * /156 if ( _Thread_Do_post_task_switch_extension ||157 _Thread_Executing->do_post_task_switch_extension ) {158 _Thread_Executing->do_post_task_switch_extension = FALSE;159 _API_extensions_Run_postswitch();160 }161 }

6.14.2.2 int BSP_install_rtems_irq_handler (constrtems_irq_connect_data∗ irq)





References default_int_handler(), GBA_REG_IE, GBA_REG_IF, isValidInterrupt(), rtems_irq_hdl, andVECTOR_TABLE.

54 {55 rtems_irq_hdl * HdlTable;56 rtems_interrupt_level level;5758 if (!isValidInterrupt(irq->name)) {59 return 0;60 }61 / *62 * Check if default handler is actually connected. If not issue an error.63 * /64 HdlTable = (rtems_irq_hdl * ) (unsigned32)VECTOR_TABLE;65 if ( * (HdlTable + irq->name) != default_int_handler) {66 return 0;67 }6869 _CPU_ISR_Disable(level);7071 / *72 * store the new handler73 * /74 * (HdlTable + irq->name) = irq->hdl;7576 / *77 * ack pending interrupt78 * /79 GBA_REG_IF |= (1 << (irq->name));8081 / *82 * initialize the control register for the concerned interrupt83 * /84 GBA_REG_IE |= (1 << (irq->name));8586 / *87 * Enable interrupt on device88 * /89 irq->on(irq);9091 _CPU_ISR_Enable(level);92



93 return 1;94 }


BSP_install_rtems_irq_handler

default_int_handler

isValidInterrupt

6.14.2.3 int BSP_remove_rtems_irq_handler (constrtems_irq_connect_data∗ irq)





References default_int_handler(), GBA_REG_IE, isValidInterrupt(), rtems_irq_hdl, and VECTOR_-TABLE.

104 {105 rtems_irq_hdl * HdlTable;106 rtems_interrupt_level level;107108 if (!isValidInterrupt(irq->name)) {109 return 0;110 }111 / *112 * Check if the handler is actually connected. If not issue an error.113 * /114 HdlTable = (rtems_irq_hdl * ) (unsigned32)VECTOR_TABLE;115 if ( * (HdlTable + irq->name) != irq->hdl) {116 return 0;117 }118 _CPU_ISR_Disable(level);119120 / *121 * mask at INT controller level122 * /123 GBA_REG_IE &= ~(1 << irq->name);124125 / *126 * Disable interrupt on device127 * /128 irq->off(irq);129130 / *131 * restore the default irq value132 * /133 * (HdlTable + irq->name) = default_int_handler;134135 _CPU_ISR_Enable(level);136137 return 1;138 }



6.15 gba/irq/irq_asm.S File Reference 158

BSP_remove_rtems_irq_handler

default_int_handler

isValidInterrupt

6.14.2.4 static int isValidInterrupt (int irq) [static]

isValidInterrupt function check that the value given for the irq line is valid.

Input parameters: irq nro



References BSP_MAX_INT.

Referenced by BSP_install_rtems_irq_handler(), and BSP_remove_rtems_irq_handler().

35 {36 if ( (irq < 0) || (irq > BSP_MAX_INT))37 return 0;38 return 1;39 }

6.15 gba/irq/irq_asm.S File Reference


#include <asm.h >


Include dependency graph for irq_asm.S:

gba/irq/irq_asm.S

asm.h

asm_macros.h mode_bits.h

Defines

• #define__asm__



RTEMS GBA BSP

Copyright (c) 2002 Advent Networks, Inc. Jay Monkman<[email protected] >

Copyright (C) 2000 Canon Research France SA. Emmanuel Raguet, mailto:[email protected]

Modified Andy Dachs<[email protected] > Copyright (c) 2001 Surrey Satellite Technolgy Lim-ited

Modified Markku Puro<[email protected] > Copyright (c) 2004






6.16 gba/irq/irq_init.c File Reference 159


Definition in file irq_asm.S.


6.15.2.1 #define __asm__

Definition at line 29 of file irq_asm.S.

6.16 gba/irq/irq_init.c File Reference


#include <bsp.h >

#include <irq.h >


Include dependency graph for irq_init.c:

gba/irq/irq_init.c bsp.h

irq.h

rtems/bspIo.h

bspopts.h

rtems.h

iosupp.h

console.h

clockdrv.h

Functions

• void _ISR_Handler(void)

default int vector

• void default_int_handler(void)


• void rtems_irq_mngt_init(void)

rtems_irq_mngt_init BSP routine initialize rtems_irq_mngt

Variables

• void _irq_max_vector

max number of vectors, defined in linkcmds



6.16 gba/irq/irq_init.c File Reference 160



RTEMS GBA BSP

CopyRight (C) 2000 Canon Research Centre France SA. Emmanuel Raguet,mailto:[email protected]



Definition in file irq_init.c.


6.16.2.1 void _ISR_Handler (void)

default int vector

6.16.2.2 void default_int_handler (void)


Input parameters:




38 {39 printk("raw_idt_notify has been called \n");40 }

6.16.2.3 void rtems_irq_mngt_init (void)




!!!!GBA - We can’t use exception vectors in GBA because they are already in GBA ROM BIOS


References _irq_max_vector, BSP_rtems_irq_mngt_init(), default_int_handler(), and VECTOR_TABLE.


50 {51 int i;52 unsigned32 * vectorTable;53 rtems_interrupt_level level;5455 vectorTable = (unsigned32 * )VECTOR_TABLE;56





6.17 gba/start/logo.S File Reference 161

57 _CPU_ISR_Disable(level);5859 / * !!!!!GBA - We can’t use exception vectors in GBA because they are already in GBA ROM BIOS * /60 / * First, connect the ISR_Handler for IRQ and FIQ interrupts * /61 / * _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ISR_Handler, NULL); * /62 / * _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _ISR_Handler, NULL); * /6364 / * Initialize the vector table contents with default handler * /65 for (i=0 ; i < (unsigned32)&_irq_max_vector ; i++)66 * (vectorTable + i) = (unsigned32)(default_int_handler);6768 / * Initialize the INT at the BSP level * /69 BSP_rtems_irq_mngt_init();70 }


rtems_irq_mngt_init

BSP_rtems_irq_mngt_init

default_int_handler



max number of vectors, defined in linkcmds

6.17 gba/start/logo.S File Reference

RTEMS GBA BSP.


gba/start/logo.S gba/start/start.S


RTEMS GBA BSP.

Nintendo Logo Character Data [offset 0x04].

The license and distribution terms for this file may be found in the file LICENSE in this distribution or at


Definition in file logo.S.

6.18 gba/start/start.S File Reference

RTEMS entry point.

#include <asm.h >


#include "logo.S"



6.18 gba/start/start.S File Reference 162

Include dependency graph for start.S:

gba/start/start.S

asm.h

asm_macros.h

logo.S

mode_bits.h

Defines

• #defineNINTENDO_LOGO1• #defineGBA_MULTIBOOT 1• #defineGAME_TITLE "RTEMS-RTOS "• #defineGAME_CODE"MB "• #defineCOMPLEMENT_CHECK0xE2• #defineMAKER_CODE"00"


RTEMS entry point.

RTEMS GBA BSP

Copyright (c) by Jeff Frohwein.

Copyright (c) 2003, Jason Wilkins.




Definition in filestart.S.


6.18.2.1 #define COMPLEMENT_CHECK 0xE2

Definition at line 70 of file start.S.

6.18.2.2 #define GAME_CODE "MB "


6.18.2.3 #define GAME_TITLE "RTEMS-RTOS "


6.18.2.4 #define GBA_MULTIBOOT 1





6.19 gba/startup/bspstart.c File Reference 163

6.18.2.5 #define MAKER_CODE "00"


6.18.2.6 #define NINTENDO_LOGO 1


6.19 gba/startup/bspstart.c File Reference


#include <stdio.h >

#include <bsp.h >



#include <rtems/libcsupport.h >

#include <gba.h >

#include <conio.h >

Include dependency graph for bspstart.c:


stdio.h

bsp.h

rtems/bspIo.h

rtems/libio.h

rtems/libcsupport.h

gba.h

conio.h

bspopts.h

rtems.h

iosupp.h

console.h

clockdrv.h

registers.h

Defines

• #defineBSP_DEBUG1

Functions

• void bsp_cleanup(void)

bsp_cleanup BSP routine wait input from user for rebooting

• void rtems_irq_mngt_init(void)


• void bsp_libc_init(void ∗, rtems_unsigned32, int)



• void bsp_postdriver_hook(void)• void bsp_pretasking_hook(void)

BSP pretasking hook.

• void bsp_start_default(void)

BSP Start.

Variables

• void _end• void _stack_size• void _irq_max_vector• void __heap_limit• void __ro_start• void __ro_end• void __data_start• void __data_end• void __load_start_data• void __load_stop_data• void __ewram_start• void __ewram_end• void __load_start_ewram• void __load_stop_ewram• void __iwram_start• void __iwram_end• void __load_start_iwram• void __load_stop_iwram• void __bss_start• void __bss_end• rtems_configuration_tableConfiguration• rtems_configuration_tableBSP_Configuration


• volatile unsigned int∗ Regs= (unsigned int∗)GBA_IO_REGS_ADDR

Chip registers.

• rtems_unsigned32_heap_size= 0

Size of heap if it is 0 it will be dynamically defined by memory size, otherwise the value should be changedby binary patch.

• rtems_unsigned32rtemsFreeMemStart

Address of start of free memory - should be updated after creating new partitions or regions.

• rtems_cpu_tableCpu_table

CPU configuration table.

• char∗ rtems_progname

Program name - from main().





It includes application, board, and monitor specific initialization and configuration. The generic CPUdependent initialization has been performed before this routine is invoked.

RTEMS GBA BSP



Definition in filebspstart.c.


6.19.2.1 #define BSP_DEBUG 1



6.19.3.1 void bsp_cleanup (void)


Normally at this point, the console driver is disconnected => we must use polled output/input. This isexactly what printk does.






47 {48 static const char line[]="\nEXECUTIVE SHUTDOWN! Press button to reboot...";49 printk("\n");50 printk("%s",line);51 while( !GBA_ANY_KEY(GBA_KEY_ALL) );52 rtemsReboot();53 }


bsp_cleanup rtemsReboot

6.19.3.2 void bsp_libc_init (void∗, rtems_unsigned32, int)

Referenced by bsp_pretasking_hook().





6.19.3.3 void bsp_postdriver_hook (void)


6.19.3.4 void bsp_pretasking_hook (void)

BSP pretasking hook.

Called just before drivers are initialized. Used to setup libc and install any BSP extensions.

NOTE: Must not use libc (to do io) from here, since drivers are not yet initialized.

Global Variables: None. Arguments: None. Returns: Nothing.


References __bss_end, __bss_start, __data_end, __data_start, __ewram_end, __ewram_start, __heap_-limit, __iwram_end, __iwram_start, __load_start_data, __load_start_ewram, __load_start_iwram, __-load_stop_data, __load_stop_ewram, __load_stop_iwram, __ro_end, __ro_start, _heap_size, _irq_max_-vector, _stack_size, bsp_libc_init(), and rtemsFreeMemStart.


94 {9596 if(_heap_size == 0)97 {98 _heap_size = (rtems_unsigned32)&__heap_limit - rtemsFreeMemStart;99 }100101 bsp_libc_init((void * )rtemsFreeMemStart, _heap_size, 0);102103 rtemsFreeMemStart += _heap_size;104105106 #ifdef RTEMS_DEBUG107 rtems_debug_enable(RTEMS_DEBUG_ALL_MASK);108 #endif / * RTEMS_DEBUG* /109110 #if BSP_DEBUG111 / * The following information is very useful when debugging. * /112 printk("[bsp_pretasking_hook]\n");113 printk("_heap_size = 0x%x\n", _heap_size);114 printk("_stack_size = 0x%x\n", (rtems_unsigned32)&_stack_size);115 printk("_irq_max_vector = 0x%x\n", (rtems_unsigned32)&_irq_max_vector);116 printk("__ro_start = 0x%x : __ro_end = 0x%x\n", (rtems_unsigned32)&__ro_start, (rtems_unsigned32)&__ro_end);117 printk("__ewram_start = 0x%x : __ewram_end = 0x%x\n", (rtems_unsigned32)&__ewram_start, (rtems_unsigned32)&__ewram_end);118 printk("__data_start = 0x%x : __data_end = 0x%x\n", (rtems_unsigned32)&__data_start, (rtems_unsigned32)&__data_end);119 printk("__bss_start = 0x%x : __bss_end = 0x%x\n", (rtems_unsigned32)&__bss_start,(rtems_unsigned32)&__bss_end);120 printk("__iwram_start = 0x%x : __iwram_end = 0x%x\n", (rtems_unsigned32)&__iwram_start,(rtems_unsigned32)&__iwram_end);121 printk("__load_start_iwram = 0x%x\n", (rtems_unsigned32)&__load_start_iwram);122 printk("__load_stop_iwram = 0x%x\n", (rtems_unsigned32)&__load_stop_iwram);123 printk("__load_start_ewram = 0x%x\n", (rtems_unsigned32)&__load_start_ewram);124 printk("__load_stop_ewram = 0x%x\n", (rtems_unsigned32)&__load_stop_ewram);125 printk("__load_start_data = 0x%x\n", (rtems_unsigned32)&__load_start_data);126 printk("__load_stop_data = 0x%x\n", (rtems_unsigned32)&__load_stop_data);127 #endif128 } / * bsp_pretasking_hook * /


bsp_pretasking_hook bsp_libc_init



6.19.3.5 void bsp_start_default (void)

BSP Start.

Called before main is invoked.

Global Variables: None. Arguments: None. Returns: Nothing.

!!!!GBA - Can’t use exception vectors in GBA because they are already in GBA ROM BIOS


References __heap_limit, _end, bsp_cleanup(), BSP_Configuration, bsp_postdriver_hook(), bsp_-pretasking_hook(), CO60, Cpu_table, gba_textmode(), rtems_irq_mngt_init(), and rtemsFreeMemStart.

141 {142 / * set the value of start of free memory. * /143 rtemsFreeMemStart = (rtems_unsigned32)&_end;144145 / * If we don’t have command line arguments set default program name. * /146 Cpu_table.pretasking_hook = bsp_pretasking_hook; / * init libc, etc. * /147 Cpu_table.predriver_hook = NULL; / * use system’s * /148 Cpu_table.postdriver_hook = bsp_postdriver_hook;149 Cpu_table.idle_task = NULL; / * don’t override system IDLE task * /150 Cpu_table.do_zero_of_workspace = TRUE;151 Cpu_table.interrupt_stack_size = 0;152 Cpu_table.extra_mpci_receive_server_stack = 0;153154155 / * Place RTEMS workspace at beginning of free memory. * /156 BSP_Configuration.work_space_start = (void * )rtemsFreeMemStart;157 rtemsFreeMemStart += BSP_Configuration.work_space_size;158159 / * Init conio * /160 gba_textmode(CO60);161162 / * Init rtems exceptions management * /163 / * !!!!!GBA - Can’t use exception vectors in GBA because they are already in GBA ROM BIOS * /164 / * rtems_exception_init_mngt(); * /165166 / * Init rtems interrupt management * /167 rtems_irq_mngt_init();168169 #if BSP_DEBUG170 / * The following information is very useful when debugging. * /171 printk("[bsp_start]\n");172 printk("rtemsFreeMemStart= 0x%x\n", rtemsFreeMemStart);173 printk("__heap_limit = 0x%x\n", (rtems_unsigned32)&__heap_limit);174 printk("work_space_start = 0x%x size = 0x%x\n", BSP_Configuration.work_space_start,BSP_Configuration.work_space_size);175 printk("maximum_extensions = 0x%x\n", BSP_Configuration.maximum_extensions);176 printk("microseconds_per_tick = 0x%x\n", BSP_Configuration.microseconds_per_tick);177 printk("ticks_per_timeslice = 0x%x\n", BSP_Configuration.ticks_per_timeslice);178 printk("maximum_devices = 0x%x\n", BSP_Configuration.maximum_devices);179 printk("number_of_device_drivers = 0x%x\n", BSP_Configuration.number_of_device_drivers);180 printk("Device_driver_table = 0x%x\n", BSP_Configuration.Device_driver_table);181 #endif182183 / * Do we have enough memory * /184 if((rtems_unsigned32)&__heap_limit < rtemsFreeMemStart) {185 printk("\nFatal Error: Memory overflow[0x%x]!\n",rtemsFreeMemStart);186 bsp_cleanup();187 }188189 } / * bsp_start * /




bsp_start_default

bsp_cleanup

bsp_postdriver_hook

bsp_pretasking_hook

gba_textmode

rtems_irq_mngt_init

rtemsReboot

bsp_libc_init

gba_initconio

gba_clrscr

gba_textattr

gba_textbackground

gba_textcolor

gba_clearline

gba_gotoxy


default_int_handler

6.19.3.6 void rtems_irq_mngt_init (void)




!!!!GBA - We can’t use exception vectors in GBA because they are already in GBA ROM BIOS


References _irq_max_vector, BSP_rtems_irq_mngt_init(), default_int_handler(), and VECTOR_TABLE.


50 {51 int i;52 unsigned32 * vectorTable;53 rtems_interrupt_level level;5455 vectorTable = (unsigned32 * )VECTOR_TABLE;5657 _CPU_ISR_Disable(level);5859 / * !!!!!GBA - We can’t use exception vectors in GBA because they are already in GBA ROM BIOS * /60 / * First, connect the ISR_Handler for IRQ and FIQ interrupts * /61 / * _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ISR_Handler, NULL); * /62 / * _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _ISR_Handler, NULL); * /6364 / * Initialize the vector table contents with default handler * /65 for (i=0 ; i < (unsigned32)&_irq_max_vector ; i++)66 * (vectorTable + i) = (unsigned32)(default_int_handler);6768 / * Initialize the INT at the BSP level * /69 BSP_rtems_irq_mngt_init();70 }


rtems_irq_mngt_init


default_int_handler


6.19.4.1 void__bss_end




6.19.4.2 void__bss_start


6.19.4.3 void__data_end


6.19.4.4 void__data_start


6.19.4.5 void__ewram_end


6.19.4.6 void__ewram_start


6.19.4.7 void__heap_limit

Referenced by bsp_pretasking_hook(), and bsp_start_default().

6.19.4.8 void__iwram_end


6.19.4.9 void__iwram_start


6.19.4.10 void__load_start_data


6.19.4.11 void__load_start_ewram


6.19.4.12 void__load_start_iwram


6.19.4.13 void__load_stop_data




6.19.4.14 void__load_stop_ewram


6.19.4.15 void__load_stop_iwram


6.19.4.16 void__ro_end


6.19.4.17 void__ro_start


6.19.4.18 void_end


6.19.4.19 rtems_unsigned32_heap_size= 0

Size of heap if it is 0 it will be dynamically defined by memory size, otherwise the value should be changedby binary patch.




6.19.4.21 void_stack_size





6.19.4.23 rtems_configuration_tableConfiguration

6.19.4.24 rtems_cpu_tableCpu_table

CPU configuration table.




6.20 gba/startup/cpu.c File Reference 171

6.19.4.25 volatile unsigned int∗ Regs= (unsigned int∗)GBA_IO_REGS_ADDR

Chip registers.


6.19.4.26 char∗ rtems_progname

Program name - from main().


6.19.4.27 rtems_unsigned32rtemsFreeMemStart

Address of start of free memory - should be updated after creating new partitions or regions.


Referenced by bsp_pretasking_hook(), and bsp_start_default().

6.20 gba/startup/cpu.c File Reference


#include <rtems/system.h >

#include <rtems.h >


#include <rtems/score/isr.h >

#include <rtems/score/wkspace.h >

#include <rtems/score/thread.h >

#include <rtems/score/cpu.h >

#include <mode_bits.h >

Include dependency graph for cpu.c:

gba/startup/cpu.c

rtems/system.h

rtems.h

rtems/bspIo.h

rtems/score/isr.h

rtems/score/wkspace.h

rtems/score/thread.h

rtems/score/cpu.h

mode_bits.h



Functions

• void _CPU_Initialize(rtems_cpu_table∗cpu_table, void(∗thread_dispatch))

_CPU_Initialize routine performs processor dependent initialization

• unsigned32_CPU_ISR_Get_level(void)

_CPU_ISR_Get_level returns the current interrupt level

• __inline__ void _CPU_ISR_install_vector(unsigned32 vector, proc_ptr new_handler, proc_ptr∗old_handler)

_CPU_ISR_install_vector kernel routine installs the RTEMS handler for the specified vector

• void _CPU_Context_Initialize(Context_Control∗the_context, unsigned32∗stack_base, unsigned32size, unsigned32 new_level, void∗entry_point, boolean is_fp)

_CPU_Context_Initialize kernel routine initialize the specified context

• __inline__ void_CPU_Install_interrupt_stack(void)

_CPU_Install_interrupt_stack function is empty since the BSP must set up the interrupt stacks.

• void _defaultExcHandler(CPU_Exception_frame∗ctx)

_defaultExcHandler function is empty

• __inline__ voidrtems_exception_init_mngt()

rtems_exception_init_mngt function is empty since the BSP must set up the interrupt stacks.

• __inline__ voiddo_data_abort(unsigned32 insn, unsigned32 spsr, CPU_Exception_frame∗ctx)

do_data_abort function is empty

Variables

• cpuExcHandlerType_currentExcHandler= _defaultExcHandler

_currentExcHandler function is empty (_defaultExcHandler)



RTEMS GBA BSP

COPYRIGHT (c) 2000 Canon Research Centre France SA. Emmanuel Raguet,mailto:[email protected]

Copyright (c) 2002 Advent Networks, Inc Jay Monkman<[email protected] >



Definition in filecpu.c.








6.20.2.1 void _CPU_Context_Initialize (Context_Control∗ the_context, unsigned32∗ stack_base,unsigned32size, unsigned32new_level, void ∗ entry_point, booleanis_fp)

_CPU_Context_Initialize kernel routine initialize the specified context

Input parameters:

• the_context :

• stack_base :

• size :

• new_level :

• entry_point :

• is_fp :


Definition at line 95 of file cpu.c.

References ModePriv.

103 {104 the_context->register_sp = (unsigned32)stack_base + size ;105 the_context->register_lr = (unsigned32)entry_point;106 the_context->register_cpsr = new_level | ModePriv;107 }

6.20.2.2 void _CPU_Initialize (rtems_cpu_table∗ cpu_table, void ∗ thread_dispatch)

_CPU_Initialize routine performs processor dependent initialization

Input parameters:

• cpu_table : CPU table to initialize

• thread_dispatch : address of ISR disptaching routine (unused)



44 {45 _CPU_Table = * cpu_table;46 }

6.20.2.3 __inline__ void _CPU_Install_interrupt_stack (void)

_CPU_Install_interrupt_stack function is empty since the BSP must set up the interrupt stacks.

!!We Can’t use exception vectors in GBA because they are already in GBA ROM BIOS!!



6.20.2.4 unsigned32 _CPU_ISR_Get_level (void)

_CPU_ISR_Get_level returns the current interrupt level


Output parameters: int level


56 {57 unsigned32 reg = 0; / * to avoid warning * /5859 asm volatile ("mrs %0, cpsr \n" \60 "and %0, %0, #0xc0 \n" \61 : "=r" (reg) \62 : "0" (reg) );63 return reg;64 }

6.20.2.5 __inline__ void _CPU_ISR_install_vector (unsigned32vector, proc_ptr new_handler,proc_ptr ∗ old_handler)

_CPU_ISR_install_vector kernel routine installs the RTEMS handler for the specified vector

Input parameters:

• vector : interrupt vector number

• new_handler : replacement ISR for this vector number

• old_handler : pointer to store former ISR for this vector number



6.20.2.6 void _defaultExcHandler (CPU_Exception_frame∗ ctx)

_defaultExcHandler function is empty


6.20.2.7 __inline__ void do_data_abort (unsigned32insn, unsigned32spsr, CPU_Exception_frame∗ ctx)

do_data_abort function is empty

This function figure out what caused the data abort

!!Can’t use exception vectors in GBA because they are already in GBA ROM BIOS!! This function issupposed to figure out what caused the data abort, do that, then return. All unhandled instructions causethe system to hang.

6.20.2.8 __inline__ void rtems_exception_init_mngt ()

rtems_exception_init_mngt function is empty since the BSP must set up the interrupt stacks.



6.21 gba/startup/cpu_asm.S File Reference 175


6.20.3.1 cpuExcHandlerType_currentExcHandler = _defaultExcHandler

_currentExcHandler function is empty (_defaultExcHandler)



6.21 gba/startup/cpu_asm.S File Reference


#include <asm.h >

#include <rtems/score/cpu_asm.h >


Include dependency graph for cpu_asm.S:


asm.h

rtems/score/cpu_asm.h

asm_macros.h mode_bits.h



RTEMS GBA BSP

Copyright (c) 2002 by Advent Networks, Inc. Jay Monkman<[email protected] >

COPYRIGHT (c) 2000 Canon Research Centre France SA. Emmanuel Raguet,mailto:[email protected]



Definition in filecpu_asm.S.

6.22 gba/startup/exit.c File Reference


#include <stdio.h >

#include <bsp.h >



#include <gba.h >

Include dependency graph for exit.c:






6.22 gba/startup/exit.c File Reference 176

gba/startup/exit.c

stdio.h

bsp.h

rtems/bspIo.h

rtems/libio.h

gba.h

bspopts.h

rtems.h

iosupp.h

console.h

clockdrv.h

registers.h

Functions

• void rtemsReboot(void)


• void bsp_cleanup(void)




RTEMS GBA BSP



Definition in fileexit.c.


6.22.2.1 void bsp_cleanup (void)


Normally at this point, the console driver is disconnected => we must use polled output/input. This isexactly what printk does.






47 {48 static const char line[]="\nEXECUTIVE SHUTDOWN! Press button to reboot...";49 printk("\n");50 printk("%s",line);51 while( !GBA_ANY_KEY(GBA_KEY_ALL) );




6.23 gba/startup/linkcmds File Reference 177

52 rtemsReboot();53 }


bsp_cleanup rtemsReboot

6.22.2.2 void rtemsReboot (void)






31 {32 asm volatile ("ldr r0, =_gba_reset");33 asm volatile ("bx r0");34 }

6.23 gba/startup/linkcmds File Reference

BSP linker script.


BSP linker script.

RTEMS GBA BSP linker script

Copyright (c) Jeff Frohwein

Copyright (c) 2003 Jason Wilkins




Definition in file linkcmds.

6.24 gba/timer/timer.c File Reference

GBA Timer driver.

#include <rtems.h >

#include <bsp.h >

#include <irq.h >

#include <gba.h >




6.24 gba/timer/timer.c File Reference 178

Include dependency graph for timer.c:

gba/timer/timer.c

rtems.h

bsp.h

irq.h

gba.h

bspopts.h

iosupp.h

console.h

clockdrv.h

registers.h

Defines

• #define__TimePreScaler1• #define__TimeTickTime_ns((1000000000L/__ClockFrequency)∗__TimePreScaler)• #define__TimeTickTime_us((1000000L/__ClockFrequency)∗__TimePreScaler)• #defineGBA_TM0CNT_PS0x0000• #defineAVG_OVERHEAD5

It typically takesX.Xmicroseconds.

• #defineLEAST_VALID 1

Don’t trust a clicks value lower than this.

Functions

• void Timer_initialize(void)

Timer_initialize start TM0 and TM1.

• int Read_timer(void)

Read_timer return timer countervalue in microseconds.

• rtems_status_codeEmpty_function(void)

Empty function.

• void Set_find_average_overhead(rtems_boolean find_flag)

Set Timer_driver_Find_average_overhead flag.

Variables

• rtems_booleanTimer_driver_Find_average_overhead




GBA Timer driver.

RTEMS GBA BSP

Copyright (c) 2002 by Jay Monkman<[email protected] >



Notes: This file manages the benchmark timer used by the RTEMS Timing Test Suite. Each measuredtime period is demarcated by calls toTimer_initialize()andRead_timer(). Read_timer()usually returnsthe number of microseconds sinceTimer_initialize()exitted.

It is important that the timer start/stop overhead be determined when porting or modifying this code.

Definition in file timer.c.


6.24.2.1 #define __TimePreScaler 1

Definition at line 40 of file timer.c.

6.24.2.2 #define __TimeTickTime_ns ((1000000000L/__ClockFrequency)∗__TimePreScaler)


Referenced by Read_timer().

6.24.2.3 #define __TimeTickTime_us ((1000000L/__ClockFrequency)∗__TimePreScaler)


6.24.2.4 #define AVG_OVERHEAD 5

It typically takesX.X microseconds.



6.24.2.5 #define GBA_TM0CNT_PS 0x0000


Referenced by Timer_initialize().

6.24.2.6 #define LEAST_VALID 1

Don’t trust a clicks value lower than this.









6.24.3.1 rtems_status_code Empty_function (void)

Empty function.

Empty function call used in loops to measure basic cost of looping in Timing Test Suite.

Input parameters:

Output parameters:


130 {131 return RTEMS_SUCCESSFUL;132 }

6.24.3.2 int Read_timer (void)

Read_timer return timer countervalue in microseconds.

Used in Timing Test Suite.

Input parameters:

Output parameters:


References __TimeTickTime_ns, AVG_OVERHEAD, GBA_REG_TM0CNT, GBA_REG_TM0D, GBA_-REG_TM1CNT, GBA_REG_TM1D, LEAST_VALID, and Timer_driver_Find_average_overhead.

99 {100 rtems_unsigned32 ticks;101 rtems_unsigned32 total;102103 / * Stop Counters * /104 GBA_REG_TM0CNT = 0x0000;105 GBA_REG_TM1CNT = 0x0000;106 / * Read Counters * /107 ticks = (GBA_REG_TM1D<<16) | GBA_REG_TM0D;108 if ( ticks < LEAST_VALID ) return 0; / * below timer resolution * /109 / * convert to uS * /110 total = ((ticks * __TimeTickTime_ns) / 1000);111 if ( Timer_driver_Find_average_overhead == 1 )112 return total; / * in microseconds * /113 else {114 if ( total < AVG_OVERHEAD ) return 0;115 return (total - AVG_OVERHEAD);116 }117 }

6.24.3.3 void Set_find_average_overhead (rtems_booleanfind_flag)

Set Timer_driver_Find_average_overhead flag.

Used in Timing Test Suite.

Input parameters:

Output parameters:




References Timer_driver_Find_average_overhead.

144 {145 Timer_driver_Find_average_overhead = find_flag;146 }

6.24.3.4 void Timer_initialize (void)

Timer_initialize start TM0 and TM1.

Input parameters:

Output parameters:


References GBA_REG_TM0CNT, GBA_REG_TM0D, GBA_REG_TM1CNT, GBA_REG_TM1D, andGBA_TM0CNT_PS.

66 {67 GBA_REG_TM1CNT = 0x0000; /* Stop Counters * /68 GBA_REG_TM0CNT = 0x0000;69 GBA_REG_TM1D = 0x0000; / * Reset Counters * /70 GBA_REG_TM0D = 0x0000;71 / * Start Counters * /72 GBA_REG_TM1CNT = 0x0084; /* Start Count Up timing * /73 GBA_REG_TM0CNT = (0x0080|GBA_TM0CNT_PS); /* Start Count * /74 }


6.24.4.1 rtems_booleanTimer_driver_Find_average_overhead


Referenced by Read_timer(), and Set_find_average_overhead().


Index_CPU_Context_Initialize

cpu.c,173_CPU_ISR_Get_level

cpu.c,173_CPU_ISR_install_vector

cpu.c,174_CPU_Initialize

cpu.c,173_CPU_Install_interrupt_stack

cpu.c,173_ISR_Handler

irq_init.c, 160_ThreadProcessSignalsFromIrq

irq.c, 155__ClockFrequency

gba.h,54__TimPreScaler

gba.h,54__TimTickTime_ns

clockdrv.c,12__TimTickTime_us

clockdrv.c,12__TimePreScaler

timer.c,179__TimeTickTime_ns

timer.c,179__TimeTickTime_us

timer.c,179__asm__

bsp_irq_asm.S,153irq_asm.S,159

__assertconsole.c,31

__bss_endbspstart.c,168

__bss_startbspstart.c,169

__data_endbspstart.c,169

__data_startbspstart.c,169

__ewram_endbspstart.c,169

__ewram_startbspstart.c,169

__heap_limitbspstart.c,169

__iwram_endbspstart.c,169

__iwram_start

bspstart.c,169__load_start_data

bspstart.c,169__load_start_ewram

bspstart.c,169__load_start_iwram

bspstart.c,169__load_stop_data

bspstart.c,169__load_stop_ewram

bspstart.c,169__load_stop_iwram

bspstart.c,170__ro_end

bspstart.c,170__ro_start

bspstart.c,170__rtems_irq_connect_data__,7

hdl, 8irqLevel,8irqTrigger,8isOn,8name,8off, 8on,8

_currentExcHandlercpu.c,175

_defaultExcHandlercpu.c,174

_endbspstart.c,170

_heap_sizebspstart.c,170

_irq_max_vectorbspstart.c,170irq.h,62irq_init.c, 161

_stack_sizebspstart.c,170

_textattrconio.c,29

_wherexconio.c,29

_whereyconio.c,29

ASCII_BELconio.h,44

ASCII_BSconio.h,44

ASCII_CR

INDEX 183

conio.h,45ASCII_ESC

conio.h,45ASCII_LF

conio.h,45ASCII_TAB

conio.h,45ASCII_XOFF

conio.h,45ASCII_XON

conio.h,45asm_macros.h

LABEL_END, 39OBJECT,39PUBLIC_ARM_FUNCTION,39PUBLIC_THUMB_FUNCTION,39STATIC_ARM_FUNCTION,39STATIC_OBJECT,39STATIC_THUMB_FUNCTION,39WEAK_OBJECT,39

AVG_OVERHEADtimer.c,179

bg_bitmap0conio.c,18

BG_BITMAP0_VRAMconio.c,18


BG_BITMAP1_VRAMconio.c,18


bg_bitmap4aconio.c,18

bg_bitmap4bconio.c,18

bg_bitmap5aconio.c,18

bg_bitmap5bconio.c,18

bg_paletteconio.c,18

BgAffineDestData,9BgAffineDestData

H_DiffX, 10H_DiffY, 10StartX,10StartY,10V_DiffX, 10V_DiffY, 10

Bitmap3conio.c,20

Bitmap4

conio.c,20Bitmap5

conio.c,20BLACK

conio.h,46BLUE

conio.h,46BROWN

conio.h,46bsp.h

BSP_Configuration,42Cause_tm27_intr,41Clear_tm27_intr,41CONFIGURE_NUMBER_OF_TERMIOS_-

PORTS,41gba_move_memory,42gba_set_memory,42gba_zero_memory,42Install_tm27_vector,41Lower_tm27_intr,41MUST_WAIT_FOR_INTERRUPT,41OPERATION_COUNT,42rtems_bsp_delay,42

bsp_cleanupbspstart.c,165exit.c,176

BSP_Configurationbsp.h,42bspstart.c,170clockdrv.c,14

BSP_DEBUGbspstart.c,165

BSP_get_current_rtems_irq_handlerirq.h,59

BSP_install_rtems_irq_handlerirq.c, 156irq.h,59

bsp_irq_asm.S__asm__,153

BSP_IRQ_CARTirq.h,59

BSP_IRQ_DMA0irq.h,59




BSP_IRQ_HBLANKirq.h,58

bsp_irq_init.cBSP_rtems_irq_mngt_init,154

BSP_IRQ_KEY


INDEX 184

irq.h,59BSP_IRQ_NA14

irq.h,59BSP_IRQ_NA15

irq.h,59BSP_IRQ_SERIAL

irq.h,59BSP_IRQ_TIMER0




irq.h,59BSP_IRQ_VBLANK

irq.h,58BSP_IRQ_VCOUNTER

irq.h,58bsp_libc_init

bspstart.c,165BSP_MAX_INT

irq.h,59BSP_output_char

console.c,37BSP_poll_char

console.c,37bsp_postdriver_hook

bspstart.c,165bsp_pretasking_hook

bspstart.c,166BSP_remove_rtems_irq_handler

irq.c, 157irq.h,60

BSP_rtems_irq_mngt_initbsp_irq_init.c,154irq.h,61

bsp_start_defaultbspstart.c,166

bspstart.c__bss_end,168__bss_start,169__data_end,169__data_start,169__ewram_end,169__ewram_start,169__heap_limit,169__iwram_end,169__iwram_start,169__load_start_data,169__load_start_ewram,169__load_start_iwram,169__load_stop_data,169__load_stop_ewram,169

__load_stop_iwram,170__ro_end,170__ro_start,170_end,170_heap_size,170_irq_max_vector,170_stack_size,170bsp_cleanup,165BSP_Configuration,170BSP_DEBUG,165bsp_libc_init,165bsp_postdriver_hook,165bsp_pretasking_hook,166bsp_start_default,166Configuration,170Cpu_table,170Regs,170rtems_irq_mngt_init,168rtems_progname,171rtemsFreeMemStart,171

Cause_tm27_intrbsp.h,41

Clear_tm27_intrbsp.h,41

Clock_driver_support_at_tickclockdrv.c,12

Clock_driver_support_initialize_hardwareclockdrv.c,13

Clock_driver_support_install_isrclockdrv.c,12

Clock_driver_support_shutdown_hardwareclockdrv.c,12

Clock_isrclockdrv.c,13

clock_isr_dataclockdrv.c,14

clock_isr_is_onclockdrv.c,13

clock_isr_offclockdrv.c,13

clock_isr_onclockdrv.c,13

CLOCK_VECTORclockdrv.c,12

clockdrv.c__TimTickTime_ns,12__TimTickTime_us,12BSP_Configuration,14Clock_driver_support_at_tick,12Clock_driver_support_initialize_hardware,13Clock_driver_support_install_isr,12Clock_driver_support_shutdown_hardware,

12


INDEX 185

Clock_isr,13clock_isr_data,14clock_isr_is_on,13clock_isr_off,13clock_isr_on,13CLOCK_VECTOR,12GBA_TMCNT_PS,12

CLRSCR_SIZEconio.c,18

CO60conio.h,46

CODE_IN_IWRAMgba.h,54

CODE_IN_ROMgba.h,54

COLORSconio.h,46

COMPLEMENT_CHECKstart.S,162

Configurationbspstart.c,170

CONFIGURE_NUMBER_OF_TERMIOS_PORTSbsp.h,41

conio.c_textattr,29_wherex,29_wherey,29bg_bitmap0,18BG_BITMAP0_VRAM, 18bg_bitmap1,18BG_BITMAP1_VRAM, 18bg_bitmap3,18bg_bitmap4a,18bg_bitmap4b,18bg_bitmap5a,18bg_bitmap5b,18bg_palette,18Bitmap3,20Bitmap4,20Bitmap5,20CLRSCR_SIZE,18DEFAULT_FONT_HEIGHT,19DEFAULT_FONT_WIDTH,19delay_loop,20gba_clearline,20gba_clrscr,21gba_getch,21gba_gotoxy,23gba_initconio,23gba_nextline,24gba_printf,24gba_put,25gba_putch,25gba_putchar,26

gba_puts,27gba_textattr,27gba_textbackground,27gba_textcolor,28gba_textmode,28H, 19inputch,29Palette,20Palettes,20rBg2Affine,19RGB,19vBgAffineDestData,20VRAM, 19VRAM_END, 19W, 19

conio.hASCII_BEL, 44ASCII_BS,44ASCII_CR,45ASCII_ESC,45ASCII_LF, 45ASCII_TAB, 45ASCII_XOFF,45ASCII_XON, 45BLACK, 46BLUE, 46BROWN,46CO60,46COLORS,46CYAN, 46DARKGRAY, 46DEF_TEXTBACKGROUND,45DEF_TEXTCOLOR,45gba_clrscr,47gba_getch,47gba_gotoxy,49gba_printf,49gba_putch,49gba_puts,50gba_textattr,50gba_textbackground,51gba_textcolor,51gba_textmode,51GREEN,46LIGHTBLUE, 46LIGHTCYAN, 46LIGHTGRAY, 46LIGHTGREEN,46LIGHTMAGENTA, 46LIGHTRED, 46MAGENTA, 46MAXCOLORS,46MAXMODES, 46RED,46


INDEX 186

TEXT_MODES,46WHITE, 46YELLOW, 46

console.c__assert,31BSP_output_char,37BSP_poll_char,37console_close,32console_control,32console_first_open,32console_initialize,33console_last_close,33console_open,34console_read,34console_write,35gba_pollRead,35gba_setAttributes,35gba_write,36rtemsReboot,36

console_closeconsole.c,32

console_controlconsole.c,32

console_first_openconsole.c,32

console_initializeconsole.c,33

console_last_closeconsole.c,33

console_openconsole.c,34

console_readconsole.c,34

console_writeconsole.c,35

cpu.c_CPU_Context_Initialize,173_CPU_ISR_Get_level,173_CPU_ISR_install_vector,174_CPU_Initialize,173_CPU_Install_interrupt_stack,173_currentExcHandler,175_defaultExcHandler,174do_data_abort,174rtems_exception_init_mngt,174

Cpu_tablebspstart.c,170

CYANconio.h,46

DARKGRAYconio.h,46

DEF_TEXTBACKGROUNDconio.h,45

DEF_TEXTCOLORconio.h,45

DEFAULT_FONT_HEIGHTconio.c,19

DEFAULT_FONT_WIDTHconio.c,19

default_int_handlerirq.h,61irq_init.c, 160

defaultfont.cfont3x5,38GEN_FONT_DATA,37X, 38

delay_loopconio.c,20

DISABLE_IRQirq.h,58

do_data_abortcpu.c,174

Empty_functiontimer.c,180

ENABLE_IRQirq.h,58

exit.cbsp_cleanup,176rtemsReboot,177

F_Bitmode_bits.h,63

font3x5defaultfont.c,38

GAME_CODEstart.S,162

GAME_TITLEstart.S,162

gba.h__ClockFrequency,54__TimPreScaler,54CODE_IN_IWRAM,54CODE_IN_ROM,54GBA_ANY_KEY, 54GBA_KEY, 54GBA_KEYS_PRESSED,54GBA_LCD_ASPECT,54GBA_LCD_HEIGHT,54GBA_LCD_WIDTH, 54GBA_MODE5_HEIGHT,54GBA_MODE5_WIDTH,55IN_EWRAM, 55IN_IWRAM, 55IWRAMBSS,55IWRAMDATA, 55


INDEX 187

MULTIBOOT, 55NO_KEY, 55OK_KEY, 55

gba/ Directory Reference,3gba/clock/ Directory Reference,2gba/clock/clockdrv.c,10gba/console/ Directory Reference,3gba/console/conio.c,14gba/console/console.c,29gba/console/defaultfont.c,37gba/include/ Directory Reference,4gba/include/asm_macros.h,38gba/include/bsp.h,39gba/include/conio.h,42gba/include/gba.h,52gba/include/irq.h,56gba/include/mode_bits.h,62gba/include/registers.h,65gba/irq/ Directory Reference,4gba/irq/bsp_irq_asm.S,152gba/irq/bsp_irq_init.c,153gba/irq/irq.c,154gba/irq/irq_asm.S,158gba/irq/irq_init.c,159gba/start/ Directory Reference,5gba/start/logo.S,161gba/start/start.S,161gba/startup/ Directory Reference,6gba/startup/bspstart.c,163gba/startup/cpu.c,171gba/startup/cpu_asm.S,175gba/startup/exit.c,175gba/startup/linkcmds,177gba/timer/ Directory Reference,6gba/timer/timer.c,177GBA_ANY_KEY

gba.h,54GBA_BASE_BIOS

registers.h,89GBA_BASE_EXT_RAM

registers.h,89GBA_BASE_INT_RAM

registers.h,89GBA_BASE_IO_REGS

registers.h,89GBA_BASE_MAX

registers.h,89GBA_BASE_NOTUSED1








registers.h,90GBA_BASE_OAM

registers.h,90GBA_BASE_PAL_RAM

registers.h,91GBA_BASE_ROM0



registers.h,91GBA_BASE_SRAM

registers.h,91GBA_BASE_VRAM

registers.h,91GBA_BG0_ENABLE

registers.h,91GBA_BG0CNT

registers.h,91GBA_BG0HOFS

registers.h,91GBA_BG0VOFS








registers.h,92GBA_BG2PA

registers.h,92GBA_BG2PB

registers.h,92GBA_BG2PC

registers.h,92GBA_BG2PD



INDEX 188

registers.h,93GBA_BG2X

registers.h,93GBA_BG2X_H

registers.h,93GBA_BG2X_L

registers.h,93GBA_BG2Y

registers.h,93GBA_BG2Y_H

registers.h,93GBA_BG2Y_L




registers.h,94GBA_BG3PA

registers.h,94GBA_BG3PB

registers.h,94GBA_BG3PC

registers.h,94GBA_BG3PD


registers.h,94GBA_BG3X

registers.h,94GBA_BG3X_H

registers.h,94GBA_BG3X_L

registers.h,94GBA_BG3Y

registers.h,95GBA_BG3Y_H

registers.h,95GBA_BG3Y_L

registers.h,95GBA_BG_MODE_0






registers.h,95GBA_BIOS_ADDR

registers.h,95GBA_BLDALPHA

registers.h,95GBA_BLDCNT

registers.h,95GBA_BLDMOD

registers.h,96GBA_BLDY

registers.h,96gba_clearline

conio.c,20gba_clrscr

conio.c,21conio.h,47

GBA_COLEY1registers.h,96

GBA_COLEY2registers.h,96

GBA_DISP_ALL_ONregisters.h,96

GBA_DISP_BG0_ONregisters.h,96




GBA_DISP_BG_ALL_ONregisters.h,97

GBA_DISP_BG_MODE_MASKregisters.h,97

GBA_DISP_BG_MODE_SHIFTregisters.h,97

GBA_DISP_BMP_FRAME_NOregisters.h,97

GBA_DISP_LCDC_OFFregisters.h,97

GBA_DISP_MODE_0registers.h,97






GBA_DISP_OBJ_BG_ALL_ONregisters.h,98

GBA_DISP_OBJ_CHAR_1D_MAPregisters.h,98


INDEX 189

GBA_DISP_OBJ_CHAR_2D_MAPregisters.h,98

GBA_DISP_OBJ_HOFFregisters.h,98

GBA_DISP_OBJ_ONregisters.h,98

GBA_DISP_OBJWIN_ONregisters.h,98

GBA_DISP_ON_MASKregisters.h,98

GBA_DISP_ON_SHIFTregisters.h,98

GBA_DISP_WIN01_ONregisters.h,99



GBA_DISP_WIN_ALL_ONregisters.h,99

GBA_DISP_WIN_MASKregisters.h,99

GBA_DISP_WIN_SHIFTregisters.h,99

GBA_DISPCNTregisters.h,99

GBA_DISPSTATregisters.h,99

GBA_DMA0CNTregisters.h,99

GBA_DMA0CNT_Hregisters.h,99

GBA_DMA0CNT_Lregisters.h,100

GBA_DMA0DADregisters.h,100

GBA_DMA0DAD_Hregisters.h,100

GBA_DMA0DAD_Lregisters.h,100

GBA_DMA0SADregisters.h,100

GBA_DMA0SAD_Hregisters.h,100

GBA_DMA0SAD_Lregisters.h,100




























GBA_DMA_16BIT_BUSregisters.h,103

GBA_DMA_32BIT_BUSregisters.h,103

GBA_DMA_CONTINUOUS_ONregisters.h,103

GBA_DMA_DEST_DECregisters.h,103


INDEX 190

GBA_DMA_DEST_FIXregisters.h,104

GBA_DMA_DEST_INCregisters.h,104

GBA_DMA_DEST_RELOADregisters.h,104

GBA_DMA_DREQ_ONregisters.h,104

GBA_DMA_ENABLEregisters.h,104

GBA_DMA_IF_ENABLEregisters.h,104

GBA_DMA_SRC_DECregisters.h,104

GBA_DMA_SRC_FIXregisters.h,104

GBA_DMA_SRC_INCregisters.h,104

GBA_DMA_TIMMING_DISPregisters.h,105

GBA_DMA_TIMMING_H_BLANKregisters.h,105

GBA_DMA_TIMMING_IMMregisters.h,105

GBA_DMA_TIMMING_SOUNDregisters.h,105

GBA_DMA_TIMMING_V_BLANKregisters.h,105

GBA_EXT_RAM_ADDRregisters.h,105

gba_getchconio.c,21conio.h,47

gba_gotoxyconio.c,23conio.h,49

GBA_HS_CTRLregisters.h,105

GBA_IEregisters.h,105

GBA_IFregisters.h,105

GBA_IMEregisters.h,105

gba_initconioconio.c,23

GBA_INT_CARTregisters.h,105

GBA_INT_DMA0registers.h,106




GBA_INT_HBLANKregisters.h,106

GBA_INT_KEYregisters.h,106

GBA_INT_RAM_ADDRregisters.h,106

GBA_INT_SERIALregisters.h,106

GBA_INT_TIMER0registers.h,106




GBA_INT_VBLANKregisters.h,106

GBA_INT_VCOUNTregisters.h,107

GBA_IO_REGS_ADDRregisters.h,107

GBA_JOYREregisters.h,107

GBA_JOYRE_Hregisters.h,107

GBA_JOYRE_Lregisters.h,107

GBA_JOYTRregisters.h,107

GBA_JOYTR_Hregisters.h,107

GBA_JOYTR_Lregisters.h,107

GBA_JSTATregisters.h,107

GBA_JSTAT_Hregisters.h,107

GBA_JSTAT_Lregisters.h,107

GBA_KEYgba.h,54

GBA_KEY_Aregisters.h,107

GBA_KEY_ALLregisters.h,107

GBA_KEY_Bregisters.h,108

GBA_KEY_DOWNregisters.h,108

GBA_KEY_Lregisters.h,108


INDEX 191

GBA_KEY_LEFTregisters.h,108

GBA_KEY_Rregisters.h,108

GBA_KEY_RIGHTregisters.h,108

GBA_KEY_SELECTregisters.h,108

GBA_KEY_STARTregisters.h,108

GBA_KEY_UPregisters.h,108

GBA_KEYCNTregisters.h,109

GBA_KEYINPUTregisters.h,109

GBA_KEYS_PRESSEDgba.h,54

GBA_LCD_ASPECTgba.h,54

GBA_LCD_HEIGHTgba.h,54

GBA_LCD_WIDTHgba.h,54

GBA_MAX_ADDRregisters.h,109

GBA_MODE5_HEIGHTgba.h,54

GBA_MODE5_WIDTHgba.h,55

GBA_MOSAICregisters.h,109

gba_move_memorybsp.h,42

GBA_MULTIBOOTstart.S,162

gba_nextlineconio.c,24

GBA_NU1_ADDRregisters.h,109








GBA_OAM_ADDRregisters.h,110

GBA_OBJ_1D_MAPregisters.h,110

GBA_OBJ_2D_MAPregisters.h,110

GBA_OBJ_ENABLEregisters.h,110

GBA_P1registers.h,110

GBA_P1CNTregisters.h,110

GBA_PAL_RAM_ADDRregisters.h,110

GBA_PAUSEregisters.h,110

GBA_PHI_16_76MHZregisters.h,110



GBA_PHI_MASKregisters.h,110

GBA_PHI_NONEregisters.h,111

gba_pollReadconsole.c,35

gba_printfconio.c,24conio.h,49

gba_putconio.c,25

gba_putchconio.c,25conio.h,49

gba_putcharconio.c,26

gba_putsconio.c,27conio.h,50

GBA_Rregisters.h,111

GBA_REG_BG0CNTregisters.h,111

GBA_REG_BG0CNT_ADDRregisters.h,111

GBA_REG_BG0HOFSregisters.h,111

GBA_REG_BG0HOFS_ADDRregisters.h,111

GBA_REG_BG0VOFSregisters.h,111

GBA_REG_BG0VOFS_ADDR


INDEX 192

registers.h,111GBA_REG_BG1CNT

registers.h,111GBA_REG_BG1CNT_ADDR

registers.h,111GBA_REG_BG1HOFS

registers.h,111GBA_REG_BG1HOFS_ADDR

registers.h,111GBA_REG_BG1VOFS

registers.h,112GBA_REG_BG1VOFS_ADDR





registers.h,112GBA_REG_BG2PA

registers.h,112GBA_REG_BG2PA_ADDR

registers.h,112GBA_REG_BG2PB

registers.h,112GBA_REG_BG2PB_ADDR

registers.h,112GBA_REG_BG2PC

registers.h,112GBA_REG_BG2PC_ADDR

registers.h,112GBA_REG_BG2PD

registers.h,113GBA_REG_BG2PD_ADDR



registers.h,113GBA_REG_BG2X

registers.h,113GBA_REG_BG2X_ADDR

registers.h,113GBA_REG_BG2X_H

registers.h,113GBA_REG_BG2X_H_ADDR

registers.h,113GBA_REG_BG2X_L

registers.h,113GBA_REG_BG2X_L_ADDR

registers.h,113GBA_REG_BG2Y

registers.h,113GBA_REG_BG2Y_ADDR

registers.h,113GBA_REG_BG2Y_H

registers.h,114GBA_REG_BG2Y_H_ADDR

registers.h,114GBA_REG_BG2Y_L

registers.h,114GBA_REG_BG2Y_L_ADDR





registers.h,114GBA_REG_BG3PA

registers.h,114GBA_REG_BG3PA_ADDR

registers.h,114GBA_REG_BG3PB

registers.h,114GBA_REG_BG3PB_ADDR

registers.h,114GBA_REG_BG3PC

registers.h,115GBA_REG_BG3PC_ADDR

registers.h,115GBA_REG_BG3PD

registers.h,115GBA_REG_BG3PD_ADDR



registers.h,115GBA_REG_BG3X

registers.h,115GBA_REG_BG3X_ADDR

registers.h,115GBA_REG_BG3X_H

registers.h,115GBA_REG_BG3X_H_ADDR

registers.h,115GBA_REG_BG3X_L

registers.h,115GBA_REG_BG3X_L_ADDR

registers.h,115GBA_REG_BG3Y

registers.h,116GBA_REG_BG3Y_ADDR


INDEX 193

registers.h,116GBA_REG_BG3Y_H

registers.h,116GBA_REG_BG3Y_H_ADDR

registers.h,116GBA_REG_BG3Y_L

registers.h,116GBA_REG_BG3Y_L_ADDR

registers.h,116GBA_REG_BLDALPHA

registers.h,116GBA_REG_BLDALPHA_ADDR

registers.h,116GBA_REG_BLDCNT

registers.h,116GBA_REG_BLDCNT_ADDR

registers.h,116GBA_REG_BLDMOD

registers.h,116GBA_REG_BLDMOD_ADDR

registers.h,116GBA_REG_BLDY

registers.h,117GBA_REG_BLDY_ADDR

registers.h,117GBA_REG_COLEY1

registers.h,117GBA_REG_COLEY1_ADDR

registers.h,117GBA_REG_COLEY2

registers.h,117GBA_REG_COLEY2_ADDR

registers.h,117GBA_REG_DISPCNT

registers.h,117GBA_REG_DISPCNT_ADDR

registers.h,117GBA_REG_DISPSTAT

registers.h,117GBA_REG_DISPSTAT_ADDR

registers.h,117GBA_REG_DMA0CNT

registers.h,117GBA_REG_DMA0CNT_ADDR

registers.h,117GBA_REG_DMA0CNT_H

registers.h,118GBA_REG_DMA0CNT_H_ADDR

registers.h,118GBA_REG_DMA0CNT_L

registers.h,118GBA_REG_DMA0CNT_L_ADDR

registers.h,118GBA_REG_DMA0DAD

registers.h,118GBA_REG_DMA0DAD_ADDR

registers.h,118GBA_REG_DMA0DAD_H

registers.h,118GBA_REG_DMA0DAD_H_ADDR

registers.h,118GBA_REG_DMA0DAD_L

registers.h,118GBA_REG_DMA0DAD_L_ADDR

registers.h,118GBA_REG_DMA0SAD

registers.h,119GBA_REG_DMA0SAD_ADDR

registers.h,119GBA_REG_DMA0SAD_H

registers.h,119GBA_REG_DMA0SAD_H_ADDR

registers.h,119GBA_REG_DMA0SAD_L

registers.h,119GBA_REG_DMA0SAD_L_ADDR


















INDEX 194







































registers.h,124GBA_REG_HS_CTRL

registers.h,124GBA_REG_HS_CTRL_ADDR

registers.h,124GBA_REG_IE

registers.h,124GBA_REG_IE_ADDR

registers.h,124GBA_REG_IF

registers.h,125GBA_REG_IF_ADDR

registers.h,125GBA_REG_IME

registers.h,125GBA_REG_IME_ADDR

registers.h,125GBA_REG_JOYRE

registers.h,125GBA_REG_JOYRE_ADDR

registers.h,125GBA_REG_JOYRE_H

registers.h,125GBA_REG_JOYRE_H_ADDR

registers.h,125GBA_REG_JOYRE_L

registers.h,125GBA_REG_JOYRE_L_ADDR

registers.h,125GBA_REG_JOYTR

registers.h,125GBA_REG_JOYTR_ADDR


INDEX 195

registers.h,125GBA_REG_JOYTR_H

registers.h,126GBA_REG_JOYTR_H_ADDR

registers.h,126GBA_REG_JOYTR_L

registers.h,126GBA_REG_JOYTR_L_ADDR

registers.h,126GBA_REG_JSTAT

registers.h,126GBA_REG_JSTAT_ADDR

registers.h,126GBA_REG_JSTAT_H

registers.h,126GBA_REG_JSTAT_H_ADDR

registers.h,126GBA_REG_JSTAT_L

registers.h,126GBA_REG_JSTAT_L_ADDR

registers.h,126GBA_REG_KEYCNT

registers.h,126GBA_REG_KEYCNT_ADDR

registers.h,126GBA_REG_KEYINPUT

registers.h,127GBA_REG_KEYINPUT_ADDR

registers.h,127GBA_REG_MOSAIC

registers.h,127GBA_REG_MOSAIC_ADDR

registers.h,127GBA_REG_P1

registers.h,127GBA_REG_P1_ADDR

registers.h,127GBA_REG_P1CNT

registers.h,127GBA_REG_P1CNT_ADDR

registers.h,127GBA_REG_PAUSE

registers.h,127GBA_REG_PAUSE_ADDR

registers.h,127GBA_REG_R

registers.h,127GBA_REG_R_ADDR

registers.h,127GBA_REG_SCCNT

registers.h,128GBA_REG_SCCNT_ADDR

registers.h,128GBA_REG_SCCNT_H

registers.h,128GBA_REG_SCCNT_H_ADDR

registers.h,128GBA_REG_SCCNT_L

registers.h,128GBA_REG_SCCNT_L_ADDR

registers.h,128GBA_REG_SCD0

registers.h,128GBA_REG_SCD0_ADDR







registers.h,129GBA_REG_SG10

registers.h,129GBA_REG_SG10_ADDR

registers.h,129GBA_REG_SG10_H

registers.h,129GBA_REG_SG10_H_ADDR

registers.h,129GBA_REG_SG10_L

registers.h,129GBA_REG_SG10_L_ADDR









registers.h,130GBA_REG_SG30_H

registers.h,130GBA_REG_SG30_H_ADDR


INDEX 196

registers.h,130GBA_REG_SG30_L

registers.h,130GBA_REG_SG30_L_ADDR







registers.h,130GBA_REG_SGBIAS

registers.h,130GBA_REG_SGBIAS_ADDR

registers.h,131GBA_REG_SGCNT0

registers.h,131GBA_REG_SGCNT0_ADDR

registers.h,131GBA_REG_SGCNT0_H

registers.h,131GBA_REG_SGCNT0_H_ADDR

registers.h,131GBA_REG_SGCNT0_L

registers.h,131GBA_REG_SGCNT0_L_ADDR

registers.h,131GBA_REG_SGCNT1

registers.h,131GBA_REG_SGCNT1_ADDR

registers.h,131GBA_REG_SGFIF0A

registers.h,131GBA_REG_SGFIF0A_ADDR

registers.h,131GBA_REG_SGFIFOA_H

registers.h,132GBA_REG_SGFIFOA_H_ADDR

registers.h,132GBA_REG_SGFIFOA_L

registers.h,132GBA_REG_SGFIFOA_L_ADDR

registers.h,132GBA_REG_SGFIFOB

registers.h,132GBA_REG_SGFIFOB_ADDR

registers.h,132GBA_REG_SGFIFOB_H

registers.h,132GBA_REG_SGFIFOB_H_ADDR

registers.h,132GBA_REG_SGFIFOB_L

registers.h,132GBA_REG_SGFIFOB_L_ADDR

registers.h,132GBA_REG_SGWR0

registers.h,132GBA_REG_SGWR0_ADDR

registers.h,133GBA_REG_SGWR0_H

registers.h,133GBA_REG_SGWR0_H_ADDR

registers.h,133GBA_REG_SGWR0_L

registers.h,133GBA_REG_SGWR0_L_ADDR




















INDEX 197

registers.h,134GBA_REG_SOUND1CNT_H

registers.h,134GBA_REG_SOUND1CNT_H_ADDR

registers.h,135GBA_REG_SOUND1CNT_L

registers.h,135GBA_REG_SOUND1CNT_L_ADDR

registers.h,135GBA_REG_SOUND1CNT_X

registers.h,135GBA_REG_SOUND1CNT_X_ADDR









registers.h,136GBA_REG_SOUND3CNT_X

registers.h,136GBA_REG_SOUND3CNT_X_ADDR

registers.h,136GBA_REG_TM0CNT

registers.h,136GBA_REG_TM0CNT_ADDR

registers.h,136GBA_REG_TM0D

registers.h,136GBA_REG_TM0D_ADDR













registers.h,137GBA_REG_VCOUNT

registers.h,138GBA_REG_VCOUNT_ADDR

registers.h,138GBA_REG_WIN0H

registers.h,138GBA_REG_WIN0H_ADDR

registers.h,138GBA_REG_WIN0V

registers.h,138GBA_REG_WIN0V_ADDR

registers.h,138GBA_REG_WIN1H

registers.h,138GBA_REG_WIN1H_ADDR

registers.h,138GBA_REG_WIN1V

registers.h,138GBA_REG_WIN1V_ADDR

registers.h,138GBA_REG_WININ

registers.h,138GBA_REG_WININ_ADDR

registers.h,138GBA_REG_WINOUT

registers.h,138GBA_REG_WINOUT_ADDR

registers.h,139GBA_REG_WSCNT

registers.h,139GBA_REG_WSCNT_ADDR

registers.h,139GBA_ROM0_ADDR



registers.h,139GBA_SCCNT

registers.h,139GBA_SCCNT_H

registers.h,139GBA_SCCNT_L


INDEX 198

registers.h,139GBA_SCD0




registers.h,140GBA_SER_BAUD_115200




registers.h,140GBA_SER_BAUD_MASK

registers.h,140GBA_SER_CTS

registers.h,140gba_set_memory

bsp.h,42gba_setAttributes

console.c,35GBA_SG10

registers.h,140GBA_SG10_H

registers.h,140GBA_SG10_L

registers.h,140GBA_SG11




registers.h,141GBA_SG30_H

registers.h,141GBA_SG30_L




registers.h,141GBA_SGBIAS

registers.h,141GBA_SGCNT0

registers.h,141GBA_SGCNT0_H

registers.h,142GBA_SGCNT0_L

registers.h,142GBA_SGCNT1

registers.h,142GBA_SGFIF0A

registers.h,142GBA_SGFIFOA_H

registers.h,142GBA_SGFIFOA_L

registers.h,142GBA_SGFIFOB

registers.h,142GBA_SGFIFOB_H

registers.h,142GBA_SGFIFOB_L

registers.h,142GBA_SGWR0

registers.h,142GBA_SGWR0_H

registers.h,142GBA_SGWR0_L










registers.h,143GBA_SOUND1_ENVDEC

registers.h,143GBA_SOUND1_ENVINC

registers.h,143GBA_SOUND1_ENVINIT

registers.h,143GBA_SOUND1_ENVSTEPS

registers.h,144GBA_SOUND1_INIT

registers.h,144GBA_SOUND1_PLAYLOOP

registers.h,144GBA_SOUND1_PLAYONCE


INDEX 199

registers.h,144GBA_SOUND1_SWEEPDEC

registers.h,144GBA_SOUND1_SWEEPINC

registers.h,144GBA_SOUND1_SWEEPSHIFTS

registers.h,144GBA_SOUND1_SWEEPTIME

registers.h,144GBA_SOUND1CNT_H

registers.h,144GBA_SOUND1CNT_L

registers.h,145GBA_SOUND1CNT_X










registers.h,146GBA_SOUND3_BANK32

registers.h,146GBA_SOUND3_BANK64


registers.h,146GBA_SOUND3_OUTPUT0





registers.h,146GBA_SOUND3_PLAY



registers.h,147GBA_SOUND3_SETBANK0

registers.h,147GBA_SOUND3_SETBANK1



registers.h,147GBA_SOUND3CNT_X








registers.h,148GBA_SOUND4_STEPS15

registers.h,148GBA_SOUND4_STEPS7

registers.h,148GBA_SOUND_DUTY25




registers.h,149GBA_SOUND_INIT

registers.h,149GBA_SRAM_ADDR

registers.h,149gba_textattr

conio.c,27conio.h,50

gba_textbackgroundconio.c,27conio.h,51

gba_textcolorconio.c,28conio.h,51

gba_textmodeconio.c,28conio.h,51

GBA_TM0CNT


INDEX 200

registers.h,149GBA_TM0CNT_PS

timer.c,179GBA_TM0D

registers.h,149GBA_TM1CNT

registers.h,149GBA_TM1D





registers.h,150GBA_TMCNT_PS

clockdrv.c,12GBA_TMR_ENABLE

registers.h,150GBA_TMR_IF_ENABLE

registers.h,150GBA_TMR_PRESCALER_1024CK




registers.h,151GBA_VCOUNT

registers.h,151GBA_VRAM_ADDR

registers.h,151GBA_WIN0H

registers.h,151GBA_WIN0V

registers.h,151GBA_WIN1H

registers.h,151GBA_WIN1V

registers.h,151GBA_WININ

registers.h,151GBA_WINOUT

registers.h,151gba_write

console.c,36GBA_WSCNT

registers.h,151gba_zero_memory

bsp.h,42GEN_FONT_DATA

defaultfont.c,37GREEN

conio.h,46

Hconio.c,19

H_DiffXBgAffineDestData,10

H_DiffYBgAffineDestData,10

hdl__rtems_irq_connect_data__,8

I_Bitmode_bits.h,63

IN_EWRAMgba.h,55

IN_IWRAMgba.h,55

inputchconio.c,29

Install_tm27_vectorbsp.h,41

Int_Bitsmode_bits.h,63

irq.c_ThreadProcessSignalsFromIrq,155BSP_install_rtems_irq_handler,156BSP_remove_rtems_irq_handler,157isValidInterrupt,158

irq.h_irq_max_vector,62BSP_get_current_rtems_irq_handler,59BSP_install_rtems_irq_handler,59BSP_IRQ_CART,59BSP_IRQ_DMA0,59BSP_IRQ_DMA1,59BSP_IRQ_DMA2,59BSP_IRQ_DMA3,59BSP_IRQ_HBLANK,58BSP_IRQ_KEY,59BSP_IRQ_NA14,59BSP_IRQ_NA15,59BSP_IRQ_SERIAL,59BSP_IRQ_TIMER0,58BSP_IRQ_TIMER1,58BSP_IRQ_TIMER2,59BSP_IRQ_TIMER3,59BSP_IRQ_VBLANK,58BSP_IRQ_VCOUNTER,58BSP_MAX_INT,59BSP_remove_rtems_irq_handler,60BSP_rtems_irq_mngt_init,61default_int_handler,61


INDEX 201

DISABLE_IRQ,58ENABLE_IRQ,58irq_vector_table,62rtems_irq_connect_data,58rtems_irq_disable,58rtems_irq_enable,58rtems_irq_hdl,62rtems_irq_is_enabled,58rtems_irq_level,58rtems_irq_symbolic_name,58rtems_irq_trigger,58VECTOR_TABLE,58

irq_asm.S__asm__,159

irq_init.c_ISR_Handler,160_irq_max_vector,161default_int_handler,160rtems_irq_mngt_init,160

irq_vector_tableirq.h,62

irqLevel__rtems_irq_connect_data__,8

irqTrigger__rtems_irq_connect_data__,8

isOn__rtems_irq_connect_data__,8

isValidInterruptirq.c, 158

IWRAMBSSgba.h,55

IWRAMDATAgba.h,55

LABEL_ENDasm_macros.h,39

LEAST_VALIDtimer.c,179

LIGHTBLUEconio.h,46

LIGHTCYANconio.h,46

LIGHTGRAYconio.h,46

LIGHTGREENconio.h,46

LIGHTMAGENTAconio.h,46

LIGHTREDconio.h,46

Lower_tm27_intrbsp.h,41

MAGENTA

conio.h,46MAKER_CODE

start.S,162MAXCOLORS

conio.h,46MAXMODES

conio.h,46Mode_ABORT

mode_bits.h,63Mode_ABT

mode_bits.h,63Mode_Bits

mode_bits.h,64mode_bits.h

F_Bit, 63I_Bit, 63Int_Bits,63Mode_ABORT,63Mode_ABT,63Mode_Bits,64Mode_FIQ,64Mode_IRQ,64Mode_IRQ_MIRQ,64Mode_IRQ_UIRQ,64Mode_SVC,64Mode_SVC_MIRQ,64Mode_SVC_UIRQ,64Mode_SYS,64Mode_UNDEF,64Mode_USR,64ModePriv,64

Mode_FIQmode_bits.h,64

Mode_IRQmode_bits.h,64

Mode_IRQ_MIRQmode_bits.h,64

Mode_IRQ_UIRQmode_bits.h,64

Mode_SVCmode_bits.h,64

Mode_SVC_MIRQmode_bits.h,64

Mode_SVC_UIRQmode_bits.h,64

Mode_SYSmode_bits.h,64

Mode_UNDEFmode_bits.h,64

Mode_USRmode_bits.h,64

ModePrivmode_bits.h,64

MULTIBOOT


INDEX 202

gba.h,55MUST_WAIT_FOR_INTERRUPT

bsp.h,41

name__rtems_irq_connect_data__,8

NINTENDO_LOGOstart.S,163

NO_KEYgba.h,55

OBJECTasm_macros.h,39

off__rtems_irq_connect_data__,8

OK_KEYgba.h,55

on__rtems_irq_connect_data__,8

OPERATION_COUNTbsp.h,42

Paletteconio.c,20

Palettesconio.c,20

PUBLIC_ARM_FUNCTIONasm_macros.h,39

PUBLIC_THUMB_FUNCTIONasm_macros.h,39

rBg2Affineconio.c,19

Read_timertimer.c,180

REDconio.h,46

registers.hGBA_BASE_BIOS,89GBA_BASE_EXT_RAM,89GBA_BASE_INT_RAM,89GBA_BASE_IO_REGS,89GBA_BASE_MAX, 89GBA_BASE_NOTUSED1,90GBA_BASE_NOTUSED2,90GBA_BASE_NOTUSED3,90GBA_BASE_NOTUSED4,90GBA_BASE_NOTUSED5,90GBA_BASE_NOTUSED6,90GBA_BASE_NOTUSED7,90GBA_BASE_NOTUSED8,90GBA_BASE_OAM,90GBA_BASE_PAL_RAM,91GBA_BASE_ROM0,91

GBA_BASE_ROM1,91GBA_BASE_ROM2,91GBA_BASE_SRAM,91GBA_BASE_VRAM,91GBA_BG0_ENABLE,91GBA_BG0CNT,91GBA_BG0HOFS,91GBA_BG0VOFS,91GBA_BG1_ENABLE,92GBA_BG1CNT,92GBA_BG1HOFS,92GBA_BG1VOFS,92GBA_BG2_ENABLE,92GBA_BG2CNT,92GBA_BG2HOFS,92GBA_BG2PA,92GBA_BG2PB,92GBA_BG2PC,92GBA_BG2PD,93GBA_BG2VOFS,93GBA_BG2X,93GBA_BG2X_H,93GBA_BG2X_L,93GBA_BG2Y,93GBA_BG2Y_H,93GBA_BG2Y_L,93GBA_BG3_ENABLE,93GBA_BG3CNT,93GBA_BG3HOFS,94GBA_BG3PA,94GBA_BG3PB,94GBA_BG3PC,94GBA_BG3PD,94GBA_BG3VOFS,94GBA_BG3X,94GBA_BG3X_H,94GBA_BG3X_L,94GBA_BG3Y,95GBA_BG3Y_H,95GBA_BG3Y_L,95GBA_BG_MODE_0,95GBA_BG_MODE_1,95GBA_BG_MODE_2,95GBA_BG_MODE_3,95GBA_BG_MODE_4,95GBA_BG_MODE_5,95GBA_BIOS_ADDR,95GBA_BLDALPHA, 95GBA_BLDCNT, 95GBA_BLDMOD, 96GBA_BLDY, 96GBA_COLEY1,96GBA_COLEY2,96GBA_DISP_ALL_ON,96


INDEX 203

GBA_DISP_BG0_ON,96GBA_DISP_BG1_ON,96GBA_DISP_BG2_ON,96GBA_DISP_BG3_ON,96GBA_DISP_BG_ALL_ON,97GBA_DISP_BG_MODE_MASK,97GBA_DISP_BG_MODE_SHIFT,97GBA_DISP_BMP_FRAME_NO,97GBA_DISP_LCDC_OFF,97GBA_DISP_MODE_0,97GBA_DISP_MODE_1,97GBA_DISP_MODE_2,97GBA_DISP_MODE_3,97GBA_DISP_MODE_4,97GBA_DISP_MODE_5,98GBA_DISP_OBJ_BG_ALL_ON,98GBA_DISP_OBJ_CHAR_1D_MAP,98GBA_DISP_OBJ_CHAR_2D_MAP,98GBA_DISP_OBJ_HOFF,98GBA_DISP_OBJ_ON,98GBA_DISP_OBJWIN_ON,98GBA_DISP_ON_MASK,98GBA_DISP_ON_SHIFT,98GBA_DISP_WIN01_ON,99GBA_DISP_WIN0_ON,99GBA_DISP_WIN1_ON,99GBA_DISP_WIN_ALL_ON,99GBA_DISP_WIN_MASK,99GBA_DISP_WIN_SHIFT,99GBA_DISPCNT,99GBA_DISPSTAT,99GBA_DMA0CNT, 99GBA_DMA0CNT_H,99GBA_DMA0CNT_L, 100GBA_DMA0DAD, 100GBA_DMA0DAD_H, 100GBA_DMA0DAD_L, 100GBA_DMA0SAD, 100GBA_DMA0SAD_H,100GBA_DMA0SAD_L, 100GBA_DMA1CNT, 100GBA_DMA1CNT_H,100GBA_DMA1CNT_L, 101GBA_DMA1DAD, 101GBA_DMA1DAD_H, 101GBA_DMA1DAD_L, 101GBA_DMA1SAD, 101GBA_DMA1SAD_H,101GBA_DMA1SAD_L, 101GBA_DMA2CNT, 101GBA_DMA2CNT_H,101GBA_DMA2CNT_L, 101GBA_DMA2DAD, 102GBA_DMA2DAD_H, 102

GBA_DMA2DAD_L, 102GBA_DMA2SAD, 102GBA_DMA2SAD_H,102GBA_DMA2SAD_L, 102GBA_DMA3CNT, 102GBA_DMA3CNT_H,102GBA_DMA3CNT_L, 102GBA_DMA3DAD, 103GBA_DMA3DAD_H, 103GBA_DMA3DAD_L, 103GBA_DMA3SAD, 103GBA_DMA3SAD_H,103GBA_DMA3SAD_L, 103GBA_DMA_16BIT_BUS,103GBA_DMA_32BIT_BUS,103GBA_DMA_CONTINUOUS_ON,103GBA_DMA_DEST_DEC,103GBA_DMA_DEST_FIX,104GBA_DMA_DEST_INC,104GBA_DMA_DEST_RELOAD,104GBA_DMA_DREQ_ON,104GBA_DMA_ENABLE, 104GBA_DMA_IF_ENABLE, 104GBA_DMA_SRC_DEC,104GBA_DMA_SRC_FIX,104GBA_DMA_SRC_INC,104GBA_DMA_TIMMING_DISP, 105GBA_DMA_TIMMING_H_BLANK, 105GBA_DMA_TIMMING_IMM, 105GBA_DMA_TIMMING_SOUND, 105GBA_DMA_TIMMING_V_BLANK, 105GBA_EXT_RAM_ADDR,105GBA_HS_CTRL,105GBA_IE, 105GBA_IF, 105GBA_IME, 105GBA_INT_CART,105GBA_INT_DMA0, 106GBA_INT_DMA1, 106GBA_INT_DMA2, 106GBA_INT_DMA3, 106GBA_INT_HBLANK, 106GBA_INT_KEY, 106GBA_INT_RAM_ADDR, 106GBA_INT_SERIAL,106GBA_INT_TIMER0,106GBA_INT_TIMER1,106GBA_INT_TIMER2,106GBA_INT_TIMER3,106GBA_INT_VBLANK, 106GBA_INT_VCOUNT,107GBA_IO_REGS_ADDR,107GBA_JOYRE,107GBA_JOYRE_H,107


INDEX 204

GBA_JOYRE_L,107GBA_JOYTR,107GBA_JOYTR_H,107GBA_JOYTR_L,107GBA_JSTAT,107GBA_JSTAT_H,107GBA_JSTAT_L,107GBA_KEY_A, 107GBA_KEY_ALL, 107GBA_KEY_B, 108GBA_KEY_DOWN,108GBA_KEY_L, 108GBA_KEY_LEFT,108GBA_KEY_R,108GBA_KEY_RIGHT,108GBA_KEY_SELECT,108GBA_KEY_START,108GBA_KEY_UP,108GBA_KEYCNT, 109GBA_KEYINPUT, 109GBA_MAX_ADDR, 109GBA_MOSAIC,109GBA_NU1_ADDR,109GBA_NU2_ADDR,109GBA_NU3_ADDR,109GBA_NU4_ADDR,109GBA_NU5_ADDR,109GBA_NU6_ADDR,109GBA_NU7_ADDR,109GBA_NU8_ADDR,109GBA_OAM_ADDR, 110GBA_OBJ_1D_MAP,110GBA_OBJ_2D_MAP,110GBA_OBJ_ENABLE,110GBA_P1,110GBA_P1CNT,110GBA_PAL_RAM_ADDR,110GBA_PAUSE,110GBA_PHI_16_76MHZ,110GBA_PHI_4_19MHZ,110GBA_PHI_8_38MHZ,110GBA_PHI_MASK,110GBA_PHI_NONE,111GBA_R,111GBA_REG_BG0CNT,111GBA_REG_BG0CNT_ADDR,111GBA_REG_BG0HOFS,111GBA_REG_BG0HOFS_ADDR,111GBA_REG_BG0VOFS,111GBA_REG_BG0VOFS_ADDR,111GBA_REG_BG1CNT,111GBA_REG_BG1CNT_ADDR,111GBA_REG_BG1HOFS,111GBA_REG_BG1HOFS_ADDR,111

GBA_REG_BG1VOFS,112GBA_REG_BG1VOFS_ADDR,112GBA_REG_BG2CNT,112GBA_REG_BG2CNT_ADDR,112GBA_REG_BG2HOFS,112GBA_REG_BG2HOFS_ADDR,112GBA_REG_BG2PA,112GBA_REG_BG2PA_ADDR,112GBA_REG_BG2PB,112GBA_REG_BG2PB_ADDR,112GBA_REG_BG2PC,112GBA_REG_BG2PC_ADDR,112GBA_REG_BG2PD,113GBA_REG_BG2PD_ADDR,113GBA_REG_BG2VOFS,113GBA_REG_BG2VOFS_ADDR,113GBA_REG_BG2X,113GBA_REG_BG2X_ADDR,113GBA_REG_BG2X_H,113GBA_REG_BG2X_H_ADDR,113GBA_REG_BG2X_L,113GBA_REG_BG2X_L_ADDR,113GBA_REG_BG2Y,113GBA_REG_BG2Y_ADDR,113GBA_REG_BG2Y_H,114GBA_REG_BG2Y_H_ADDR,114GBA_REG_BG2Y_L,114GBA_REG_BG2Y_L_ADDR,114GBA_REG_BG3CNT,114GBA_REG_BG3CNT_ADDR,114GBA_REG_BG3HOFS,114GBA_REG_BG3HOFS_ADDR,114GBA_REG_BG3PA,114GBA_REG_BG3PA_ADDR,114GBA_REG_BG3PB,114GBA_REG_BG3PB_ADDR,114GBA_REG_BG3PC,115GBA_REG_BG3PC_ADDR,115GBA_REG_BG3PD,115GBA_REG_BG3PD_ADDR,115GBA_REG_BG3VOFS,115GBA_REG_BG3VOFS_ADDR,115GBA_REG_BG3X,115GBA_REG_BG3X_ADDR,115GBA_REG_BG3X_H,115GBA_REG_BG3X_H_ADDR,115GBA_REG_BG3X_L,115GBA_REG_BG3X_L_ADDR,115GBA_REG_BG3Y,116GBA_REG_BG3Y_ADDR,116GBA_REG_BG3Y_H,116GBA_REG_BG3Y_H_ADDR,116GBA_REG_BG3Y_L,116GBA_REG_BG3Y_L_ADDR,116


INDEX 205

GBA_REG_BLDALPHA,116GBA_REG_BLDALPHA_ADDR,116GBA_REG_BLDCNT,116GBA_REG_BLDCNT_ADDR,116GBA_REG_BLDMOD,116GBA_REG_BLDMOD_ADDR,116GBA_REG_BLDY,117GBA_REG_BLDY_ADDR,117GBA_REG_COLEY1,117GBA_REG_COLEY1_ADDR,117GBA_REG_COLEY2,117GBA_REG_COLEY2_ADDR,117GBA_REG_DISPCNT,117GBA_REG_DISPCNT_ADDR,117GBA_REG_DISPSTAT,117GBA_REG_DISPSTAT_ADDR,117GBA_REG_DMA0CNT,117GBA_REG_DMA0CNT_ADDR,117GBA_REG_DMA0CNT_H,118GBA_REG_DMA0CNT_H_ADDR,118GBA_REG_DMA0CNT_L,118GBA_REG_DMA0CNT_L_ADDR,118GBA_REG_DMA0DAD,118GBA_REG_DMA0DAD_ADDR,118GBA_REG_DMA0DAD_H,118GBA_REG_DMA0DAD_H_ADDR,118GBA_REG_DMA0DAD_L,118GBA_REG_DMA0DAD_L_ADDR,118GBA_REG_DMA0SAD,119GBA_REG_DMA0SAD_ADDR,119GBA_REG_DMA0SAD_H,119GBA_REG_DMA0SAD_H_ADDR,119GBA_REG_DMA0SAD_L,119GBA_REG_DMA0SAD_L_ADDR,119GBA_REG_DMA1CNT,119GBA_REG_DMA1CNT_ADDR,119GBA_REG_DMA1CNT_H,119GBA_REG_DMA1CNT_H_ADDR,119GBA_REG_DMA1CNT_L,119GBA_REG_DMA1CNT_L_ADDR,120GBA_REG_DMA1DAD,120GBA_REG_DMA1DAD_ADDR,120GBA_REG_DMA1DAD_H,120GBA_REG_DMA1DAD_H_ADDR,120GBA_REG_DMA1DAD_L,120GBA_REG_DMA1DAD_L_ADDR,120GBA_REG_DMA1SAD,120GBA_REG_DMA1SAD_ADDR,120GBA_REG_DMA1SAD_H,120GBA_REG_DMA1SAD_H_ADDR,120GBA_REG_DMA1SAD_L,121GBA_REG_DMA1SAD_L_ADDR,121GBA_REG_DMA2CNT,121GBA_REG_DMA2CNT_ADDR,121

GBA_REG_DMA2CNT_H,121GBA_REG_DMA2CNT_H_ADDR,121GBA_REG_DMA2CNT_L,121GBA_REG_DMA2CNT_L_ADDR,121GBA_REG_DMA2DAD,121GBA_REG_DMA2DAD_ADDR,121GBA_REG_DMA2DAD_H,122GBA_REG_DMA2DAD_H_ADDR,122GBA_REG_DMA2DAD_L,122GBA_REG_DMA2DAD_L_ADDR,122GBA_REG_DMA2SAD,122GBA_REG_DMA2SAD_ADDR,122GBA_REG_DMA2SAD_H,122GBA_REG_DMA2SAD_H_ADDR,122GBA_REG_DMA2SAD_L,122GBA_REG_DMA2SAD_L_ADDR,122GBA_REG_DMA3CNT,122GBA_REG_DMA3CNT_ADDR,123GBA_REG_DMA3CNT_H,123GBA_REG_DMA3CNT_H_ADDR,123GBA_REG_DMA3CNT_L,123GBA_REG_DMA3CNT_L_ADDR,123GBA_REG_DMA3DAD,123GBA_REG_DMA3DAD_ADDR,123GBA_REG_DMA3DAD_H,123GBA_REG_DMA3DAD_H_ADDR,123GBA_REG_DMA3DAD_L,123GBA_REG_DMA3DAD_L_ADDR,124GBA_REG_DMA3SAD,124GBA_REG_DMA3SAD_ADDR,124GBA_REG_DMA3SAD_H,124GBA_REG_DMA3SAD_H_ADDR,124GBA_REG_DMA3SAD_L,124GBA_REG_DMA3SAD_L_ADDR,124GBA_REG_HS_CTRL,124GBA_REG_HS_CTRL_ADDR,124GBA_REG_IE,124GBA_REG_IE_ADDR,124GBA_REG_IF,125GBA_REG_IF_ADDR,125GBA_REG_IME,125GBA_REG_IME_ADDR,125GBA_REG_JOYRE,125GBA_REG_JOYRE_ADDR,125GBA_REG_JOYRE_H,125GBA_REG_JOYRE_H_ADDR,125GBA_REG_JOYRE_L,125GBA_REG_JOYRE_L_ADDR,125GBA_REG_JOYTR,125GBA_REG_JOYTR_ADDR,125GBA_REG_JOYTR_H,126GBA_REG_JOYTR_H_ADDR,126GBA_REG_JOYTR_L,126GBA_REG_JOYTR_L_ADDR,126


INDEX 206

GBA_REG_JSTAT,126GBA_REG_JSTAT_ADDR,126GBA_REG_JSTAT_H,126GBA_REG_JSTAT_H_ADDR,126GBA_REG_JSTAT_L,126GBA_REG_JSTAT_L_ADDR,126GBA_REG_KEYCNT,126GBA_REG_KEYCNT_ADDR,126GBA_REG_KEYINPUT,127GBA_REG_KEYINPUT_ADDR,127GBA_REG_MOSAIC,127GBA_REG_MOSAIC_ADDR,127GBA_REG_P1,127GBA_REG_P1_ADDR,127GBA_REG_P1CNT,127GBA_REG_P1CNT_ADDR,127GBA_REG_PAUSE,127GBA_REG_PAUSE_ADDR,127GBA_REG_R,127GBA_REG_R_ADDR,127GBA_REG_SCCNT,128GBA_REG_SCCNT_ADDR,128GBA_REG_SCCNT_H,128GBA_REG_SCCNT_H_ADDR,128GBA_REG_SCCNT_L,128GBA_REG_SCCNT_L_ADDR,128GBA_REG_SCD0,128GBA_REG_SCD0_ADDR,128GBA_REG_SCD1,128GBA_REG_SCD1_ADDR,128GBA_REG_SCD2,128GBA_REG_SCD2_ADDR,128GBA_REG_SCD3,128GBA_REG_SCD3_ADDR,129GBA_REG_SG10,129GBA_REG_SG10_ADDR,129GBA_REG_SG10_H,129GBA_REG_SG10_H_ADDR,129GBA_REG_SG10_L,129GBA_REG_SG10_L_ADDR,129GBA_REG_SG11,129GBA_REG_SG11_ADDR,129GBA_REG_SG20,129GBA_REG_SG20_ADDR,129GBA_REG_SG21,129GBA_REG_SG21_ADDR,129GBA_REG_SG30,130GBA_REG_SG30_ADDR,130GBA_REG_SG30_H,130GBA_REG_SG30_H_ADDR,130GBA_REG_SG30_L,130GBA_REG_SG30_L_ADDR,130GBA_REG_SG31,130GBA_REG_SG31_ADDR,130

GBA_REG_SG40,130GBA_REG_SG40_ADDR,130GBA_REG_SG41,130GBA_REG_SG41_ADDR,130GBA_REG_SGBIAS,130GBA_REG_SGBIAS_ADDR,131GBA_REG_SGCNT0,131GBA_REG_SGCNT0_ADDR,131GBA_REG_SGCNT0_H,131GBA_REG_SGCNT0_H_ADDR,131GBA_REG_SGCNT0_L,131GBA_REG_SGCNT0_L_ADDR,131GBA_REG_SGCNT1,131GBA_REG_SGCNT1_ADDR,131GBA_REG_SGFIF0A,131GBA_REG_SGFIF0A_ADDR,131GBA_REG_SGFIFOA_H,132GBA_REG_SGFIFOA_H_ADDR,132GBA_REG_SGFIFOA_L,132GBA_REG_SGFIFOA_L_ADDR,132GBA_REG_SGFIFOB,132GBA_REG_SGFIFOB_ADDR,132GBA_REG_SGFIFOB_H,132GBA_REG_SGFIFOB_H_ADDR,132GBA_REG_SGFIFOB_L,132GBA_REG_SGFIFOB_L_ADDR,132GBA_REG_SGWR0,132GBA_REG_SGWR0_ADDR,133GBA_REG_SGWR0_H,133GBA_REG_SGWR0_H_ADDR,133GBA_REG_SGWR0_L,133GBA_REG_SGWR0_L_ADDR,133GBA_REG_SGWR1,133GBA_REG_SGWR1_ADDR,133GBA_REG_SGWR1_H,133GBA_REG_SGWR1_H_ADDR,133GBA_REG_SGWR1_L,133GBA_REG_SGWR1_L_ADDR,133GBA_REG_SGWR2,133GBA_REG_SGWR2_ADDR,134GBA_REG_SGWR2_H,134GBA_REG_SGWR2_H_ADDR,134GBA_REG_SGWR2_L,134GBA_REG_SGWR2_L_ADDR,134GBA_REG_SGWR3,134GBA_REG_SGWR3_ADDR,134GBA_REG_SGWR3_H,134GBA_REG_SGWR3_H_ADDR,134GBA_REG_SGWR3_L,134GBA_REG_SGWR3_L_ADDR,134GBA_REG_SOUND1CNT_H,134GBA_REG_SOUND1CNT_H_ADDR,135GBA_REG_SOUND1CNT_L,135GBA_REG_SOUND1CNT_L_ADDR,135


INDEX 207

GBA_REG_SOUND1CNT_X,135GBA_REG_SOUND1CNT_X_ADDR,135GBA_REG_SOUND2CNT_H,135GBA_REG_SOUND2CNT_H_ADDR,135GBA_REG_SOUND2CNT_L,135GBA_REG_SOUND2CNT_L_ADDR,135GBA_REG_SOUND3CNT_H,135GBA_REG_SOUND3CNT_H_ADDR,136GBA_REG_SOUND3CNT_L,136GBA_REG_SOUND3CNT_L_ADDR,136GBA_REG_SOUND3CNT_X,136GBA_REG_SOUND3CNT_X_ADDR,136GBA_REG_TM0CNT,136GBA_REG_TM0CNT_ADDR,136GBA_REG_TM0D,136GBA_REG_TM0D_ADDR,136GBA_REG_TM1CNT,136GBA_REG_TM1CNT_ADDR,137GBA_REG_TM1D,137GBA_REG_TM1D_ADDR,137GBA_REG_TM2CNT,137GBA_REG_TM2CNT_ADDR,137GBA_REG_TM2D,137GBA_REG_TM2D_ADDR,137GBA_REG_TM3CNT,137GBA_REG_TM3CNT_ADDR,137GBA_REG_TM3D,137GBA_REG_TM3D_ADDR,137GBA_REG_VCOUNT,138GBA_REG_VCOUNT_ADDR,138GBA_REG_WIN0H,138GBA_REG_WIN0H_ADDR,138GBA_REG_WIN0V,138GBA_REG_WIN0V_ADDR,138GBA_REG_WIN1H,138GBA_REG_WIN1H_ADDR,138GBA_REG_WIN1V,138GBA_REG_WIN1V_ADDR,138GBA_REG_WININ,138GBA_REG_WININ_ADDR,138GBA_REG_WINOUT,138GBA_REG_WINOUT_ADDR,139GBA_REG_WSCNT,139GBA_REG_WSCNT_ADDR,139GBA_ROM0_ADDR,139GBA_ROM1_ADDR,139GBA_ROM2_ADDR,139GBA_SCCNT,139GBA_SCCNT_H,139GBA_SCCNT_L,139GBA_SCD0,139GBA_SCD1,139GBA_SCD2,139GBA_SCD3,140

GBA_SER_BAUD_115200,140GBA_SER_BAUD_38400,140GBA_SER_BAUD_57600,140GBA_SER_BAUD_9600,140GBA_SER_BAUD_MASK,140GBA_SER_CTS,140GBA_SG10,140GBA_SG10_H,140GBA_SG10_L,140GBA_SG11,140GBA_SG20,141GBA_SG21,141GBA_SG30,141GBA_SG30_H,141GBA_SG30_L,141GBA_SG31,141GBA_SG40,141GBA_SG41,141GBA_SGBIAS,141GBA_SGCNT0,141GBA_SGCNT0_H,142GBA_SGCNT0_L,142GBA_SGCNT1,142GBA_SGFIF0A,142GBA_SGFIFOA_H,142GBA_SGFIFOA_L,142GBA_SGFIFOB,142GBA_SGFIFOB_H,142GBA_SGFIFOB_L,142GBA_SGWR0,142GBA_SGWR0_H,142GBA_SGWR0_L,142GBA_SGWR1,143GBA_SGWR1_H,143GBA_SGWR1_L,143GBA_SGWR2,143GBA_SGWR2_H,143GBA_SGWR2_L,143GBA_SGWR3,143GBA_SGWR3_H,143GBA_SGWR3_L,143GBA_SOUND1_ENVDEC,143GBA_SOUND1_ENVINC,143GBA_SOUND1_ENVINIT,143GBA_SOUND1_ENVSTEPS,144GBA_SOUND1_INIT,144GBA_SOUND1_PLAYLOOP,144GBA_SOUND1_PLAYONCE,144GBA_SOUND1_SWEEPDEC,144GBA_SOUND1_SWEEPINC,144GBA_SOUND1_SWEEPSHIFTS,144GBA_SOUND1_SWEEPTIME,144GBA_SOUND1CNT_H,144GBA_SOUND1CNT_L,145


INDEX 208

GBA_SOUND1CNT_X,145GBA_SOUND2_ENVDEC,145GBA_SOUND2_ENVINC,145GBA_SOUND2_ENVINIT,145GBA_SOUND2_ENVSTEPS,145GBA_SOUND2_INIT,145GBA_SOUND2_PLAYLOOP,145GBA_SOUND2_PLAYONCE,145GBA_SOUND2CNT_H,145GBA_SOUND2CNT_L,146GBA_SOUND3_BANK32,146GBA_SOUND3_BANK64,146GBA_SOUND3_INIT,146GBA_SOUND3_OUTPUT0,146GBA_SOUND3_OUTPUT1,146GBA_SOUND3_OUTPUT12,146GBA_SOUND3_OUTPUT14,146GBA_SOUND3_OUTPUT34,146GBA_SOUND3_PLAY,147GBA_SOUND3_PLAYLOOP,147GBA_SOUND3_PLAYONCE,147GBA_SOUND3_SETBANK0,147GBA_SOUND3_SETBANK1,147GBA_SOUND3CNT_H,147GBA_SOUND3CNT_L,147GBA_SOUND3CNT_X,147GBA_SOUND4_ENVDEC,147GBA_SOUND4_ENVINC,147GBA_SOUND4_ENVINIT,148GBA_SOUND4_ENVSTEPS,148GBA_SOUND4_INIT,148GBA_SOUND4_PLAYLOOP,148GBA_SOUND4_PLAYONCE,148GBA_SOUND4_STEPS15,148GBA_SOUND4_STEPS7,148GBA_SOUND_DUTY25,149GBA_SOUND_DUTY50,149GBA_SOUND_DUTY75,149GBA_SOUND_DUTY87,149GBA_SOUND_INIT,149GBA_SRAM_ADDR,149GBA_TM0CNT,149GBA_TM0D, 149GBA_TM1CNT,149GBA_TM1D, 149GBA_TM2CNT,150GBA_TM2D, 150GBA_TM3CNT,150GBA_TM3D, 150GBA_TMR_ENABLE,150GBA_TMR_IF_ENABLE,150GBA_TMR_PRESCALER_1024CK,150GBA_TMR_PRESCALER_1CK,150GBA_TMR_PRESCALER_256CK,150

GBA_TMR_PRESCALER_64CK,151GBA_VCOUNT,151GBA_VRAM_ADDR, 151GBA_WIN0H, 151GBA_WIN0V, 151GBA_WIN1H, 151GBA_WIN1V, 151GBA_WININ, 151GBA_WINOUT, 151GBA_WSCNT,151Regs,152RSCNT,151RSDLH,152RSDLL, 152RSFCR,152RSIER,152RSIIR,152RSLCR,152RSLSR,152RSRBR,152RSTHR,152

Regsbspstart.c,170registers.h,152

RGBconio.c,19

RSCNTregisters.h,151

RSDLHregisters.h,152

RSDLLregisters.h,152

RSFCRregisters.h,152

RSIERregisters.h,152

RSIIRregisters.h,152

RSLCRregisters.h,152

RSLSRregisters.h,152

RSRBRregisters.h,152

RSTHRregisters.h,152

rtems_bsp_delaybsp.h,42

rtems_exception_init_mngtcpu.c,174

rtems_irq_connect_datairq.h,58

rtems_irq_disableirq.h,58


INDEX 209

rtems_irq_enableirq.h,58

rtems_irq_hdlirq.h,62

rtems_irq_is_enabledirq.h,58

rtems_irq_levelirq.h,58

rtems_irq_mngt_initbspstart.c,168irq_init.c, 160

rtems_irq_symbolic_nameirq.h,58

rtems_irq_triggerirq.h,58

rtems_prognamebspstart.c,171

rtemsFreeMemStartbspstart.c,171

rtemsRebootconsole.c,36exit.c,177

Set_find_average_overheadtimer.c,180

start.SCOMPLEMENT_CHECK,162GAME_CODE,162GAME_TITLE, 162GBA_MULTIBOOT, 162MAKER_CODE,162NINTENDO_LOGO,163

StartXBgAffineDestData,10

StartYBgAffineDestData,10

STATIC_ARM_FUNCTIONasm_macros.h,39

STATIC_OBJECTasm_macros.h,39

STATIC_THUMB_FUNCTIONasm_macros.h,39

TEXT_MODESconio.h,46

timer.c__TimePreScaler,179__TimeTickTime_ns,179__TimeTickTime_us,179AVG_OVERHEAD,179Empty_function,180GBA_TM0CNT_PS,179LEAST_VALID, 179Read_timer,180

Set_find_average_overhead,180Timer_driver_Find_average_overhead,181Timer_initialize,181

Timer_driver_Find_average_overheadtimer.c,181

Timer_initializetimer.c,181

V_DiffXBgAffineDestData,10

V_DiffYBgAffineDestData,10

vBgAffineDestDataconio.c,20

VECTOR_TABLEirq.h,58

VRAMconio.c,19

VRAM_ENDconio.c,19

Wconio.c,19

WEAK_OBJECTasm_macros.h,39

WHITEconio.h,46

Xdefaultfont.c,38

YELLOWconio.h,46


RTEMS Reference Manualeh60/spring2006/EE 458...Game Boy Advance registers. 4.5 gba/irq/ Directory...

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Transcript of RTEMS Reference Manualeh60/spring2006/EE 458...Game Boy Advance registers. 4.5 gba/irq/ Directory...