RSVM: a Region-based Software Virtual Memory for GPU

Feng Ji*, Heshan Lin†, Xiaosong Ma*‡* North Carolina State Univeristy

† Virginia Tech‡Oak Ridge National Lab

PACT 2013

2

GPU Presence Today

Compute Graphics

3

GPU Computing Challenge

• Parallel computing• Memory management

Core 0

Core 1

Core 2

Core 3

Main memory Device memory

L1/ Shared memory

PCI-E

CPU GPU

cache cache

cache cache

cache L2

SM

4

Problematic Manual GPU Memory Management

• Malloc()– Resource

limit

• Memcpy()– Hardcoded

• Working set

A

B

C

Matrix Mul C = A x B

Host Code

Device Code

5

CPU-GPU Memory Management• State of the art: host-side memory management

– GPU compilers [Jablin:PLDI11, Jabin:CGO12; Pai:PACT12]– Task scheduling runtimes [Rossbach: SOSP11]– GPU ADSM [Gelado: ASPLOS10]

• Limitations– Memory management action before/after GPU kernel– No fine-grained control in GPU code– Cannot leverage GPU online data access

GPU Runtime

VM Driver

DRAM CPU BUS GPU

Host Code Device Code

GPGPU API

Application

OS

Hardware

CPU-GPU memory management Our solution: Enabling memory

management in GPU kernel

Host-side management

Existing solution: host

side controlling

GPU memory

6

Region-based software virtual memory• Match host-side virtual memory

– Abstract memory domains– Automate data movement on demand– Swap out device memory

• Unique challenges of CPU-GPU heterogeneous memory system– No existing architecture support for VM

• Solution: software-based mechanisms

– GPU processing massively parallel• Solution: building on GPU atomic operations

– GPU and drivers being black boxes• Solution: implementing using standard GPGPU APIs

– CPU-GPU synchronization expensive• Solution: asynchronous runtimes, relaxed consistency

– GPU-initiated communication difficult• Solution: GPU callback

• Region– Repeated idea (CRL [Johnson:SOS95], ADSM [Gelado: ASPLOS10], etc.)– Finer granularity

7

Roadmap

• Introduction • RSVM: region-based software virtual memory

for GPU– Region API– Design: region table, transparent GPU swap

• Evaluation results• Conclusion

8

Region-based Software Virtual Memory for GPU (RSVM)

• User specifies via Region API– Defining RSVM managed data unit (create)– Annotating data unit access code block (map/unmap)

• RSVM manages both CPU and GPU memory– Moving data on-demand across CPU and GPU– Intra-kernel data fetching to GPU– Transparent GPU memory swapping to host

memory• For GPU kernels with excessive memory requirement

9

RSVM Design

GPU Runtime

VM Driver

DRAM CPU BUS GPU

Host Code Device Code

GPGPU API

Application

OS

Hardware

RSVM

Region API Region API

Callback Server

Region Manager

Region Table

Callback RPC

Region Manager

Region Table

Callback

10

Region as basic data unit• Decide system-managed basic data

unit– Page? One size fit all?

• Region– User-defined data block– Linear or multi-D (CUDA supports 3D

memory layout): <width, height, stride>

• Benefit– Abstracts CPU/GPU memory domain– Allows optimization of PCIe efficiency

by varying region’s definition• developers know it better than system

– No false sharing

A

B

C

11

Region API 1: define region and region collection

rgn_id r_A = rgn_create_cpu (size_A);

rgn_coll_id rc_B = rgn_coll_create (size_B, num_rgns_in_B, B_row_length, //stride threadBlock.y, //width

B_rows); //heightrgn_coll_id rc_C = rgn_coll_create

(size_C, num_rgns_in_C, C_row_length,

threadBlock.y, C_rows);

A

B

C

• Region Collection: a set of regions.

• Rgn_coll_create: iteratively create all regions in this set.

12

Region API 2: use region in the host

float *A = rgn_map_cpu (r_A, rgn_op_writeonly, NULL, NULL);

rgn_coll_meta meta_B = rgn_coll_get_meta_cpu (rc_B);

for(i: 0 to blockDim.y) { float *pB = rgn_map_cpu

(meta_B->rgns[i], rgn_op_writeonly, NULL, NULL);

} A

B

C

• Region Collection Meta: metadata of region collection.

• An array of rgn_ID’s.• Implemented as a

region Itself.

meta_B

13

Region API 3: exchange information

rsvm_sync();mmKernel<<<NB, NT>>>

(rc_C, r_A, rc_B);

A

B

C

• rsvm_sync(): host-side API.

• Exchange information across CPU-GPU.

• GPU side runtime knows r_A, rc_B, and rc_C exist.

14

Region API 4: use region in GPU kernel

int complete, req;float *dA = rgn_map_gpu

(r_A, rgn_op_readonly, &complete, &req);

if (!complete) dA = rgn_wait_map_gpu(r_A, req);

rgn_unmap_gpu(r_A);

A

B

C

Asynchronously mapping in the background.

useful work: e.g. map other regions

15

Region API 5: use region collection in GPU kernel

rgn_coll_meta meta_B = rgn_coll_get_meta_gpu (rc_B);

float *pdB = rgn_map_gpu (meta_B->rgns[blockIdx.y], rgn_op_readonly, &complete, &req);

if (!complete) pdB = rgn_wait_map_gpu(meta_B->rgns[blockIdx.y], req);

rgn_unmap_gpu(meta_B->rgns[blockIdx.y]);

A

B

C

16

Region States in RSVM

• Relaxed consistency– Host and Device runtimes asynchronously drive

state change until rsvm_sync• Protocol: MSI adapted protocol

17

Region Table

id status version

loc_ptr far_ptr

0 mod 5 0xaaa0 0x8000

1 shared 2 0xaee0

2 shared 1 0xacd0

3 unused 0

4 unused 0

id status version

loc_ptr far_ptr

0 shared 4 0x8000 0xaaa0

1 sharing 2 0x80d0 0xaee0

2 invalid 1 0xacd0

3

4

• Table replicated on CPU and GPU– Relaxed consistency: merge at sync

• Challenge: local operation vs. avoid conflict• Table partitioned

– 4096 entries / segment, owned by one side– New region from unused entry in one’s own segment: local op.– Allocating a new segment: synchronous op.

Software TLB in the shared memory• Consistency

CPU – Owner GPU

18

GPU region fault: asynchronous map

• Rgn_map_GPU(rgn, op, *complete, *req)• Rgn_wait_map_GPU(rgn, req)

Device CodeCallback Server Callback RPC Region Manager

Map_GPU()Call_async(map)

Return (req) Return (complete, req)

Set callback flag on GPU

Wait_map_GPU(req)Call_wait(req)

PCIe data transferto GPU buffer

Call back:• Host-side polling [Stuart:Europarw10]• Avoid PCIe traffic jam• Novel collective callback

19

GPU Transparent Memory swap• Challenge: no specialized GPU thread• Solution: embedding swap in map/unmap ops

• Split operations, triggered by low memory– Operation 1: Swap

• GPU requests CPU to fetch dirty regions

– Operation 2: Reclaim• GPU frees clean buffers

• Not-Frequent-Used (NFU) counter of each region– Updated by GPU in every map op.– Sorted by CPU during swap

• Swap made re-entrant: concurrent swap requester will– Back off seeing ongoing swap– Prepare candidates list from previous completed swap

Tswap

Trec

Tendrec

20

Evaluation

• Test bed– Intel x86 Xeon E5507, 6 GB main mem– Nvidia GTX480 (15 SM, 1.5 GB dev mem), PCIe 2.0– Ubuntu 10.04 LTS, linux 2.6.32, CUDA 5.0rc

• Benchmark workload– Benchmark from CUDA SDK, Rodinia [Uva:rodinia]– Case study: MatrixMul , BFS [ORNL:SHOC]

21

Benchmarks fit in GPU

• MatrixMul– Computation-intensive, scale well with GPU cores– Overhead: device library code compiled into GPU kernel– Register file pressure:

• (# of reg / thread ): 25 -> 60• Occupancy (active threads / SM ): 1024 -> 512

22

Discussion: GPU register file for RSVM device library code

• GPU register assignment to threads– Static, equally to each thread

• Compiler reports max register count requirement for each thread• Runtime calculates occupancy, kernel launch success/fail

• GPU register file not enough for RSVM• Not all threads run into RSVM library code path

concurrently• Possible way of over-subscribing threads for register

file usage?– Dynamically managing registers among threads?

23

Case study: Graph Breadth-first Search

• Iteration (kernel) by BFS distance• Metric: traversed edges/sec (TEPS)• Dynamic memory access patter – input

dependent– DIMACS challenge [DIMACS]– GTgraph [Gtgraph]

24

BFS Input

• m/n – edge factor, number of edge/vector

(N and M in 10^6.)

25

BFS parallelism

• Graph: nodes + adjacent list (edges)– Warp -> each node to visit in current BFS iteration– Thread -> each neighbor of this node

• RSVM’s overhead– setup in each kernel (BFS iteration)– map nodes’ region, and then – map adjacent list’s region

• Overhead decreases with increased edge factor

26

Large Graphs

• Manual: – Partition graphs– Manual swapping between

GPU buffers and host buffers in each BFS iteration

– Local data access– Depend on used data in each

data partition

• CUDA Unified Virtual Address (UVA): – Use host-side 0-copy buffers– Access only needed data– PCIe bottleneck in traffic jam

RSVM Improvement due to• Caching in GPU memory• Batched PCIe data transferAdditional advantage• Single code base

UVA performs

better than Manual

Manual performs

better than UVA

27

Conclusion

• Virtual memory for CPU-GPU heterogeneous system involving GPU-side runtime is possible– GPU as computation engine, rather than co-

processor– Novel designs: region table, asynchronous region

API, CPU assisted GPU swap, software TLB in GPU shared memory

– Insight: register file pressure– Benefit dynamic memory accesses (e.g. Graph)

28

THANK YOU!

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Backup slides

• Start here….

33

Related Work

• Memory hierarchy of accelerator– Specialized programming model• StarPU [Augonnet:ICPADS10], Harmony

[Diamos:HPDC08], Sequoia [Fatahalian:SC06], Merge [Linderman:ASPLOS08], Qilin [Luk:MICRO09]

– Transparent Software Caching• CellBE: [Eichenberger:PACT05]• Larrabee: [Saha:PLDI09, Yan:OSR11]

34

Related Work (cont’d)

• Compiler assisted CPU-GPU communication– ADSM [Gelado: ASPLOS10]– CGCM [Jablin:PLDI11], DyManD [Jablin: CGO12]– AMM for X10 [Pai:PACT12]

• OS support for GPGPU– Gdev [Kato:USENIX12]– Ptask [Rossbach:SOSP11]– GPUfs [Silberstein:ASPLOS13]

35

Related Work (cont’d)

• Distributed shared memory– ADSM [Gelado:ASPLOS10]– CRL [Johnson:SOSP95]

• GPU virtual memory architecture– HSA hUMA [HSA]– GPU Exception [Menon:ISCA12]

36

Transparent or Manual?

• Ideal: transparent & good performance• In practice: making compromise

Transparent Manual

Program

Performance

easy hard

hard to reason easy to control

37

Region’s State Protocol

38

Region’s State Protocol

39

Region’s State Protocol

40

Region’s State Protocol

41

Software TLB for Region Table on GPU

TLB state

Ref. count

Rgn_id status

used 2 4138 sharing

unused 0

• Shared memory (TLB) consistency with device memory (Region table)– Write through

• Shared memory (TLB) of two SMs– A safe cache line: cache hit

• Define: sharing/modifying• Some other warp has cached it• Can safely use it

– Otherwise: cache miss• Prepare TLB• AtomInc/Dec ref. count

– Fully-associative• warp parallelism

– Cache line reuse• Shared/modified:Refcnt 0• Number configurable

id status Ref. count

…

4138

4138 sharing 2

4149 shared 0

TLB in shared memory

Region Table in dev memory

42

GPU callback

• Host-side callback server thread polling a flag [Stuart:Europarw10] – GPU code remotely sets flag (in host-side 0-copy memory)

• Challenge: GPU parallelism• Avoid PCIe traffic jam– Novel collective callback: non-parameterized requests

• GPU code detects and sends one signal for all calling threads

– Host-side callback server batches PCIe data transfers for multiple concurrent callback requests• Both incoming parameters and returning values

43

GPU callbacks in RSVM

• Handling region fault– non-collective, asynchronous, and parameterized

callback• Getting new region segment– collective, synchronous, and non-parameterized

callback• Starting swap– collective, asynchronous, re-entrant, and non-

parameterized callback

Callback Collective Synchronous Parameterized Re-entrant

Handling region fault No No Yes No

Getting new region segment

Yes Yes No No

Starting swap Yes No No Yes

44

Case 1: Matrix Multiplication

• Matrix A: single region

• Matrix B: 2-d regions

• 1280 MB GPU dev mem managed by RSVM

• RSVM: ~70% efficiency

• Swap: <10% overhead

45

Small Graph BFS• TEPS

– Traversed edges/ sec• Iteration (kernel) by BFS

distance• Parallelism

– Warp -> each visiting node– Thread -> each neighbor of

the visiting node• Overhead

– RSVM mapping regions of each visit node’s adjacent list

– RSVM setup each kernel

46

Future Work

• RSVM improvement– Region table merging optimization– CPU callback server optimization– Multiple GPU support– Multiple process support

• Compiler assisted region identification– Remove manual region creation/deletion

• Leverage vendor support for GPU faulting– Remove manual map/unmap

Johnson:SOS95

47

GPU Transparent Memory swap

Callback Server Callback RPC Region Manager

Call_async_reentrant(swap)

Set callback flag on GPU

PCIe data transferfrom GPU buffer tohost mem

Call_async_reentrant(swap)

Available dev mem resource low

Call_async_reentrant(swap)

Return (swappedregions)

Rgn states to shared,Form a candidate list

Available dev memresource keep decreasing.Reclaim candidate rgn’sbuffers.