Richard Mellitz 1

Signal Integrity IntroductionClass 1

Reduction To Practice for High Speed Digital DesignReading assignment: CH8 to 9.3

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What is Signal Integrity (SI)?

An Engineering PracticeThat ensures all signals transmitted are received correctlyThat ensures signals don’t interfere with one another in a way to degrade reception. That ensures signal don’t damage any deviceThat ensures signal don’t pollute the electromagnetic spectrum

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What’s this all about?

$

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The BusinessDetermine design parameters for successful signaling

Design parameters are ranges for design variables within which a product can be reliably built

“One in row” is not good enoughNew Terms

General SolutionPoint SolutionSpecific Solution

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Levels of SI Spheres of Influence

Silicon ProvidersSilicon ProvidersSilicon ProvidersSilicon Providers

Boxed ProductBoxed ProductProvidersProviders

Boxed ProductBoxed ProductProvidersProviders

One Box – One Box – End UserEnd User

One Box – One Box – End UserEnd User

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SI Paradigms Specific Solution

Applies to a given instance of a product or specimen

Point SolutionApplies to any single given productEncompasses a locus of specific solutions.Example: Any board that comes off a production line

General SolutionApplies to many products of a given typeEncompasses a locus of point solutionsThe locus of all solutions for a specific standard (like SCSI) is an example.

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Effective SI is Pre-Product Release.

It costs less here.

Why?Time = $

0

10

20

30

40

50

Cost of

failure

(M$)

Pre-

prototype

Validation Post Release

Introduction – Richard Mellitz

8Signal Integrity Paced by Silicon Advances

“Moore’s Law”Still trueSilicon densitydoubles every18 months

“Core” frequency increase roughly follows density

Data transfer rate of connected I/O Used to lag by about generation

1

6

11

16

21

26

31

Apr-01 Sep-02 Jan-04 May-05 Oct-06 Feb-08 Jul-09

De

ns

ity

Mu

ltip

lier

Introduction – Richard Mellitz

9What About Design Functionality?

Normally not the domain of SI Often qualifies legal operation For most computers I/O signals are v(t)

Core: IC logic

Transmitter Interconnect

Receiver

Introduction – Richard Mellitz

10Components of High Speed Design

Competitive performance goals challenge each generation of technology (higher frequencies)

SI encompasses a conglomerate of electrical engineering disciplines

Transmitter Interconnect

Receiver

•Circuit elements•Transmission lines•S – parameter blocks (advanced topic)

•Transistors

•Sources•Algorithms

•Passives•Memory

•Transistors

•Passives•Algorithms

•Memory

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SI WorkModelingSimulationMeasurementValidationWhat is good enough?

Sufficient to operate at desired frequency with required fidelity

Risk Assessment

Introduction – Richard Mellitz

12SI in Computers – The 60’s and 70’s

7400 Class TTLSeveral MHz operation and 5ns edgesTransistor -Transistor Logic Logic design with “jelly bean” ICsUsing loading rules from spec booksLots of combinational and asynchronous one-shot designs.Bipolar and CMOS

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The 60’s and 70’s - Continued

ECL Emitter Coupled LogicTens of MHz and 2-3ns edge ratesMECL hand book – One of the first books on SI

Introduced concept of termination and transmission lines

Still used spec books for rulesA few engineers evaluated termination schemes but no SI engineering per se

Common SI problems were deglitching switches and specifying clamping diodes on relay drivers.

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The 80’sHi Speed CMOS and open drain buses

100+ MHz operation and 1ns edges

Clocking issues start to creep in here

Ringing becomes a problemTiming simulators emerge for SI

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The 90’s Early in the decade extracted board simulators are

popular.Chip I/V and edge V(t) info simulated with transmission lines whose characteristics are extracted directly from PWB layout informationIBIS becomes popularEdge rates move toward 300ps at launch.

Memory and I/O buses require early SI analysis SSTL – series stub terminated AGTL – Advanced Gunning Transistor Logic Open collector busing Differential signaling emerges Late in the decade we start to hear terms like return

path, I/O power delivery, ISI, and source-synch Extracted board simulators don’t account for these

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The 00’sGHz operation and 50ps launch edgesSI Engineers using spice and modeling

with Maxwell 2½D/3-D field solvers.Emerging technologies

High Speed Serial DifferentialDe/Pre emphasisEmbedded clockingData encodingPulse Amplitude Modulation (PAM)Simultaneous Bi-Directional (SBD)

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Assignment Assignment: How much electrical transmission

length does a 5ns, 2.5ns, 1ns, 300ps, 50ps edge occupy? Assume propagation velocity is half that free of space.

Determine a rationale for specifying physical wiring length in computer printed wiring boards. This is an exercise in engineering judgment.

Plot the ratio of electrical edge length to board trace length (by decade) in previous slide. Use range plots.

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SI Directions Today

SI is starting to borrow from the communications industry

We are starting to hear terms likeVector Network Analyzer (VNA)S-parametersReturn and insertion lossEye diagram

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SI Roles Convert product parts and design features

into models and parameters Use models to simulate performance Perform measurements to validate

product Determine how parameters limit

performance Use cost and simulated or measured

performance to determine rules for design Use margin budgets to manage designs

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SI Deliverables

SI CustomerProduct Architect

Product Designer

Product Manager

Deliverables

"What if ? " Rules

Use measurement

to ensure

confi dence in

simulations

decisions

FeasibilityCost/ Perf ormance

TradeoffNo Field Failures

Assignment: Fill in the above 6 boxes with hypothetical examples based on your present knowledge of the computer engineering field.

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Future of SI Rules of thumb get “old” quick Old assumptions not good enough –

fascinating topicsCan we still use transmission line models?What is the role of ground?

Higher and higher frequency Underscores the need to understand 2nd and 3rd order effects.List examplesMany EE disciplines play togetherPlethora of new signal analysis and measurement methodsNeed to simplify designs to efficiently turn a profit.