RFID Based prepaid card for Toll Bridge Gate · Web viewThe Mechanical Model is constructed using a...

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For more topics visit www.presentationtopics.in Electronics Projects Electronics Mini Projects – Simple Electronics Projects - Engineering Mini Projects - Presentations for Download - Latest Seminar Topics for presentation - Electronic seminar projects --------------------------------------------------------------------------------- RF ID Based Automatic Tollgate Opening and Closing With vehicle details Logging INTRODUCTION A toll road (or tollway, turnpike, pike, toll highway or an express toll route) is a privately or publicly built road for which a driver pays a toll (a fee) for use. Structures for which tolls are charged include toll bridges and toll tunnels In an all-electronic system, no cash toll collection takes place, tolls are usually collected with the use of a transponder mounted on the windshield of each vehicle, which

Transcript of RFID Based prepaid card for Toll Bridge Gate · Web viewThe Mechanical Model is constructed using a...

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RF ID Based Automatic Tollgate Opening and Closing With vehicle details Logging

INTRODUCTION

A toll road (or tollway, turnpike, pike, toll highway or an express toll route) is a

privately or publicly built road for which a driver pays a toll (a fee) for use.

Structures for which tolls are charged include toll bridges and toll tunnelsIn an all-electronic system, no cash toll collection takes place, tolls are usually

collected with the use of a transponder mounted on the windshield of each

vehicle, which is linked to a customer account which is debited for each use of

the toll road.

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ObjectiveWe can automate the toll bridge gate using the Radio Frequency

Identification tag. An RFID tag is fixed with a vehicle. When a card comes in to

the vicinity of the reader a charge of some amount will be detected from the

particular person’s database and the toll bridge gate is automatically opened for

the user to move. The Mechanical Model is constructed using a stepper motor.

The movement of the stepper motor is responsible for opening and closing

action.

The Vehicle Details is stored into the computer memory with date and time

for future reference.

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Hardware Requirements:

1. PIC Embedded Microcontroller

2. RFID Card with RFID tag

3. Mechanical Model depicting Toll gate

4. Stepper Motor for Opening and Closing Action

5. LCD Display

6. Rs232 Interface

Software Requirements:

1. Hitech C

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Block Diagram

PIC Microcontroller

RFIDCard

Reader

LCD Display

RFID unit in the Vehicle

Power Supply

Alarm Driver

Rs232

Vehicle Log

CPU

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Pic Microcontroller:

PIC 16F877 microcontroller is used as a Processing unit.

RFID Card Reader:

RFID Card Reader used to read the card number from the vehicle.

Power Supply:

Mechanical Model

Pre Driver

Opto Coupler

Power Driver

Stepper Motor

Pre Driver

Opto Coupler

Power Driver

Pre Driver

Opto Coupler

Power Driver

Pre Driver

Opto Coupler

Power Driver

Alarm

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Generates +12V and +5vDC Power supply from 230VAC.

Mechanical Model:

A mechanical model is constructed using a stepper motor for gate

opening and closing action

Stepper motor Driver:

Used to drive the motor in forward and reverse direction as per the

command given by the controller.

LCD Display:

Used to display the actions in the screen. (Gate opened, Closed etc.)

Alarm and Alarm Driver:

The voltage from the controller is not enough to drive the alarm. So an

external transistor driver is necessary to drive the 12v alarm.

RS232 interface:

This interface is used to communicate to the computer. The vehicle details

and the time is logged into the computer using this interface.

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Circuit Diagram

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Hardware Details:

PIC MICRO CONTROLLER

Other than the normal Microcontrollers PIC Family supports more features, so we have chosen PIC 16F877 as the main controller. The Main features and Peripherals features are discussed below.

3.1 Core Features:

• High performance RISC CPU

• Only 35 single word instructions to learn

• All single cycle instructions except for program Branches which are two cycle

• Operating speed: DC - 20 MHz clock input

DC - 200 ns instruction cycle

• Up to 8K x 14 words of FLASH Program Memory,

Up to 368 x 8 bytes of Data Memory (RAM)

• Interrupt capability (up to 14 sources)

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• Direct, indirect and relative addressing modes

• Power-on Reset (POR)

• Power-up Timer (PWRT) and

Oscillator Start-up Timer (OST)

• Processor read/write access to program memory

• Wide operating voltage range: 2.0V to 5.5V

• Low-power consumption:

- < 0.6 mA typical @ 3V, 4 MHz

- < 1 µA typical standby current

3.2 Peripheral Features:

• Timer0: 8-bit timer/counter with 8-bit prescaler

• Timer1: 16-bit timer/counter with prescaler, can be incremented during SLEEP

• Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler

• 10-bit multi-channel Analog-to-Digital converter

• Synchronous Serial Port (SSP) with SPI (Master mode) and

12C(Master/Slave)

• Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI) with

9-bit address detection

• Parallel Slave Port (PSP) 8-bits wide, with external RD, WR and CS controls

(40/44-pin only)

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Figure 8- Block Diagram of PIC Micro Controller

Figure 9- Circuit Diagram of PIC16F877

3.3 Registers:

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3.3.1 Special Function Registers:

The Special Function Registers are registers used by the CPU and

peripheral modules for controlling the desired operation of the device. These

registers are implemented as static RAM. The Special Function Registers can be

classified into two sets: core (CPU) and peripheral. Those registers associated

with the core functions are described in detail in this section. Those related to the

operation of the peripheral features are described in detail in the peripheral

features section.

3.3.2 STATUS Register:

The STATUS register contains the arithmetic status of the ALU,

the RESET status and the bank select bits for data memory.The STATUS

register can be the destination for any instruction, as with any other register. If

the STATUS register is the destination for an instruction that affects the Z, DC or

C bits, then the write to these three bits is disabled. These bits are set or cleared

according to the device logic. Further more, the TO and PD bits are not writable,

therefore, the result of an instruction with the STATUS register as destination

may be different than intended.For example, CLRF STATUS will clear the upper

threebits and set the Z bit. This leaves the STATUS register as 000u u1uu

(where u = unchanged).It is recommended, therefore, that only BCF,

BSF,SWAPF and MOVWF instructions are used to alter the STATUS register,

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because these instructions do not affect the Z, C or DC bits from the STATUS

register.

3.4 ADDRESSABLE UNIVERSAL SYNCHRONOUS ASYNCHRONOUS RECEIVER TRANSMITTER (USART):

The Universal Synchronous Asynchronous Receiver

Transmitter (USART) module is one of the two serial I/O modules. (USART is

also known as a Serial Communications Interface or SCI.) The USART can be

configured as a full duplex asynchronous system that can communicate with

peripheral devices such as CRT terminals and personal computers, or it can be

configured as a half duplex synchronous system that can communicate with

peripheral devices such as A/D or D/A integrated circuits, serial EEPROMs etc.

The USART can be configured in the following modes:

• Asynchronous (full duplex)

• Synchronous - Master (half duplex)

• Synchronous - Slave (half duplex)

Bit SPEN (RCSTA<7>) and bits TRISC<7:6> have to be set in

order to configure pins RC6/TX/CK and RC7/RX/DT as the Universal

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Synchronous Asynchronous Receiver Transmitter. The USART module also has

a multi-processor communication capability using 9-bit address detection.

Figure 10- Transmit status and Control register (address 98h)

bit 7 CSRC: Clock Source Select bit

Asynchronous mode: Don’t care

Synchronous mode:

1 = Master mode (clock generated internally from BRG)

0 = Slave mode (clock from external source)

bit 6 TX9: 9-bit Transmit Enable bit

1 = Selects 9-bit transmission

0 = Selects 8-bit transmission

bit 5 TXEN: Transmit Enable bit

1 = Transmit enabled

0 = Transmit disabled

bit 4 SYNC: USART Mode Select bit

1 = Synchronous mode

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0 = Asynchronous mode

bit 2 BRGH: High Baud Rate Select bit

Asynchronous mode:

1 = High speed

0 = Low speed

Synchronous mode: Unused in this mode

bit 1 TRMT: Transmit Shift Register Status bit

1 = TSR empty

0 = TSR full

bit 0 TX9D: 9th bit of Transmit Data, can be parity bit

3.4.1 USART Asynchronous Mode:

In this mode, the USART uses standard non-return-to zero (NRZ)

format (one START bit, eight or nine data bits, and one STOP bit). The most

common data format is 8-bits. An on-chip, dedicated, 8-bit baud rate generator

can be used to derive standard baud rate frequencies from the oscillator. The

USART transmits and receives the LSb first. The transmitter and receiver are

functionally independent, but use the same data format and baud rate. The baud

rate generator produces a clock, either x16 or x64 of the bit shift rate, depending

on bit BRGH (TXSTA<2>). Parity is not supported by the hardware, but can be

implemented in software (and stored as the ninth data bit).

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Asynchronous mode is stopped during SLEEP. Asynchronous mode

is selected by clearing bit SYNC (TXSTA<4>). The USART Asynchronous

module consists of the following important elements:

• Baud Rate Generator

• Sampling Circuit

• Asynchronous Transmitter

• Asynchronous Receiver

3.4.2 USART ASYNCHRONOUS TRANSMITTER:

The heart of the transmitter is the transmit (serial) shift

register (TSR). The shift register obtains its data from the read/write transmit

buffer, TXREG. The TXREG register is loaded with data in software. The TSR

register is not loaded until the STOP bit has been transmitted from the previous

load. As soon as the STOP bit is transmitted, the TSR is loaded with new data

from the TXREG register (if available). Once the TXREG register transfers the

data to the TSR register (occurs in one TCY), the TXREG register is empty and

flag bit TXIF (PIR1<4>) is set. This interrupt can be enabled/disabled by

setting/clearing enable bit TXIE (PIE1<4>). Flag bit TXIF will be set, regardless of

the state of enable bit TXIE and cannot be cleared in software. It will reset only

when new data is loaded into the TXREG register. While flag bit TXIF indicates

the status of the TXREG register, another bit TRMT (TXSTA<1>) shows the

status of the TSR register.

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Status bit TRMT is a read only bit, which is set when the TSR

register is empty. No interrupt logic is tied to this bit, so the user has to poll this

bit in order to determine if the TSR register is empty. Transmission is enabled by

setting enable bit TXEN (TXSTA<5>). The actual transmission will not occur until

the TXREG register has been loaded with data and the baud rate generator

(BRG) has produced a shift clock. The transmission can also be started by first

loading the TXREG register and then setting enable bit TXEN. Normally, when

transmission is first started, the TSR register is empty. At that point, transfer to

the TXREG register will result in an immediate transfer to TSR, resulting in an

empty TXREG. A back-to-back transfer is thus possible Clearing enable bit

TXEN during a transmission will cause the transmission to be aborted and will

reset the transmitter.

As a result, the RC6/TX/CK pin will revert to hi-impedance.In order to

select 9-bit transmission, transmit bit TX9 (TXSTA<6>) should be set and the

ninth bit should be written to TX9D (TXSTA<0>). The ninth bit must be written

before writing the 8-bit data to the TXREG register. This is because a data write

to the TXREG register can result in an immediate transfer of the data to the TSR

register (if the TSR is empty). In such a case, an incorrect ninth data bit may be

loaded in the TSR register.

When setting up an Asynchronous Transmission, follow these steps:

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1. Initialize the SPBRG register for the appropriate baud rate. If a high

speed

baud rate is desired, set bit BRGH.

2. Enable the asynchronous serial port by clearing bit SYNC and setting bit

SPEN.

3. If interrupts are desired, then set enable bit TXIE.

4. If 9-bit transmission is desired, then set transmit bit TX9.

5. Enable the transmission by setting bit TXEN, which will also set bit TXIF.

6. If 9-bit transmission is selected, the ninth bit should be loaded in bit

TX9D.

7. Load data to the TXREG register (starts transmission).

8. If using interrupts, ensure that GIE and PEIE (bits 7 and 6) of the

INTCON

register are set.

3.4.3 USART ASYNCHRONOUS RECEIVER:

The data is received on the RC7/RX/DT pin and drives the data

recovery block. The data recovery block is actually a high speed shifter,

operating at x16 times the baud rate; whereas, the main receive serial shifter

operates at the bit rate or at FOSC. Once Asynchronous mode is selected,

reception is enabled by setting bit CREN (RCSTA<4>). The heart of the receiver

is the receive (serial) shift register (RSR). After sampling the STOP bit, the

received data in the RSR is transferred to the RCREG register (if it is empty). If

the transfer is complete, flag bit RCIF (PIR1<5>) is set. The actual interrupt can

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be enabled/disabled by setting/clearing enable bit RCIE (PIE1<5>). Flag bit RCIF

is a read only bit, which is cleared by the hardware. It is cleared when the

RCREG register has been read and is empty.

If the RCREG register is still full, the overrun error bit OERR

(RCSTA<1>) will be set. The word in the RSR will be lost. The RCREG register

can be read twice to retrieve the two bytes in the FIFO. Overrun bit OERR has to

be cleared in software. This is done by resetting the receiver logic (CREN is

cleared and then set). If bit OERR is set, transfers from the RSR register to the

RCREG register are inhibited, and no further data will be received. It is therefore,

essential to clear error bit OERR if it is set. Framing error bit FERR (RCSTA<2>)

is set if a STOP bit is detected as clear. Bit FERR and the 9th receive bit are

buffered the same way as the receive data. Reading the RCREG will load bits

RX9D and FERR with new values, therefore, it is essential for the user to read

the RCSTA register before reading the RCREG register in order not to lose the

old FERR and RX9D information.

3.5 ANALOG-TO-DIGITAL CONVERTER (A/D) MODULE:

The Analog-to-Digital (A/D) Converter module has five inputs

for the 28-pin devices and eight for the other devices. The A/D conversion of the

analog input signal results in a corresponding 10-bit digital number. The A/D

converter has a unique feature of being able to operate while the device is in

SLEEP mode. To operate in SLEEP, the A/D clock must be derived from the

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A/D’s internal RC oscillator. The A/D module has four registers. These registers

are:

• A/D Result High Register (ADRESH)

• A/D Result Low Register (ADRESL)

• A/D Control Register0 (ADCON0)

• A/D Control Register1 (ADCON1)

The ADCON0 register, shown in Figure 11, controls the operation of

the A/D module. The ADCON1 register, shown in Figure 12, configures the

functions of the port pins. The port pins can be configured as analog inputs (RA3

can also be the voltage reference), or as digital I/O. Additional information on

using the A/D module can be found in the PIC micro™ Mid-Range MCU Family

Reference Manual (DS33023).

Figure 11- ADCON0 Register (address: 1fh)

bit 7-6 ADCS1:ADCS0: A/D Conversion Clock Select bits

00 = FOSC/2

01 = FOSC/8

10 = FOSC/32

11 = FRC (clock derived from the internal A/D module RC oscillator)

bit 5-3 CHS2:CHS0: Analog Channel Select bits

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000 = channel 0, (RA0/AN0)

001 = channel 1, (RA1/AN1)

010 = channel 2, (RA2/AN2)

011 = channel 3, (RA3/AN3)

100 = channel 4, (RA5/AN4)

101 = channel 5, (RE0/AN5)(1)110 = channel 6, (RE1/AN6)(1)111 = channel 7, (RE2/AN7)(1)bit 2 GO/DONE: A/D Conversion Status bit

If ADON = 1:

1 = A/D conversion in progress (setting this bit starts the A/D conversion)

0 = A/D conversion not in progress (this bit is automatically cleared by hardware

when the A/D conversion is complete)

bit 1 Unimplemented: Read as '0'

bit 0 ADON: A/D On bit

1 = A/D converter module is operating

0 = A/D converter module is shut-off and consumes no operating current

Figure 12- ADCON1 Register (address 9fh)

bit 7 ADFM: A/D Result Format Select bit

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1 = Right justified. 6 Most Significant bits of ADRESH are read as ‘0’.

0 = Left justified. 6 Least Significant bits of ADRESL are read as ‘0’.

bit 6-4 Unimplemented: Read as '0'

bit 3-0 PCFG3:PCFG0: A/D Port Configuration Control bits:

These steps should be followed for doing an A/D Conversion:

1. Configure the A/D module:

• Configure analog pins/voltage reference and digital I/O (ADCON1)

• Select A/D input channel (ADCON0)

• Select A/D conversion clock (ADCON0)

• Turn on A/D module (ADCON0)

2. Configure A/D interrupt (if desired):

• Clear ADIF bit

• Set ADIE bit

• Set PEIE bit

• Set GIE bit

3. Wait the required acquisition time.

4. Start conversion:

• Set GO/DONE bit (ADCON0)

5. Wait for A/D conversion to complete, by either:

• Polling for the GO/DONE bit to be cleared (with interrupts enabled); OR

• Waiting for the A/D interrupt

6. Read A/D result register pair (ADRESH:ADRESL), clear bit ADIF if required.

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7. For the next conversion, go to step 1 or step 2, as required. The A/D

conversion time per bit is defined as TAD. A minimum wait of 2TAD is required

before the next acquisition starts.

3.6 INTERRUPTS:

The PIC16F87X family has up to 14 sources of interrupt. The

interrupt control register (INTCON) records individual interrupt requests in flag

bits. It also has individual and global interrupt enable bits. A global interrupt

enable bit, GIE (INTCON<7>) enables (if set) all unmasked interrupts, or disables

(if cleared) all interrupts. When bit GIE is enabled, and an interrupt’s flag bit and

mask bit are set, the interrupt will vector immediately. Individual interrupts can be

disabled through their corresponding enable bits in various registers. Individual

interrupt bits are set, regardless of the status of the GIE bit.

The GIE bit is cleared on RESET. The “return from interrupt”

instruction, RETFIE, exits the interrupt routine, as well as sets the GIE bit, which

re-enables interrupts. The RB0/INT pin interrupt, the RB port change interrupt,

and the TMR0 overflow interrupt flags are contained in the INTCON register. The

peripheral interrupt flags are contained in the special function registers, PIR1 and

PIR2. The corresponding interrupt enable bits are contained in special function

registers, PIE1 and PIE2, and the peripheral interrupt enable bit is contained in

special function register INTCON.

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When an interrupt is responded to, the GIE bit is cleared to

disable any further interrupt, the return address is pushed onto the stack and the

PC is loaded with 0004h.

Once in the Interrupt Service Routine, the source(s) of the

interrupt can be determined by polling the interrupt flag bits. The interrupt flag

bit(s) must be cleared in software before re-enabling interrupts to avoid recursive

interrupts. For external interrupt events, such as the INT pin or PORTB change

interrupt, the interrupt latency will be three or four instruction cycles. The exact

latency depends when the interrupt event occurs. The latency is the same for

one or two-cycle instructions. Individual interrupt flag bits are set, regardless of

the status of their corresponding mask bit, PEIE bit, or GIE bit.

Note: Individual interrupt flag bits are set, regardless of the status of their

corresponding mask bit, or the GIE bit.

3.7 INSTRUCTION SET SUMMARY:

Each PIC16F87X instruction is a 14-bit word, divided into an

OPCODE which specifies the instruction type and one or more operands which

further specify the operation of the instruction. The PIC16F87X instruction set

summary in byte-oriented, bit-oriented, and literal and control operations.

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For byte-oriented instructions, ’f’ represents a file register

designator and‘d’ represents a destination designator. The file register designator

specifies which file register is to be used by the instruction. The destination

designator specifies where the result of the operation is to be placed. If ‘d’ is

zero, the result is placed in the W register. If‘d’ is one, the result is placed in the

file register specified in the instruction.

For bit-oriented instructions, ’b’ represents a bit field

designator which selects the number of the bit affected by the operation, while ’f’

represents the address of the file in which the bit is located.

For literal and control operations, ’k’ represents an eight or

eleven bit constant or literal value. All instructions are executed within one single

instruction cycle, unless a conditional test is true or the program counter is

changed as a result of an instruction. In this case, the execution takes two

instruction cycles with the second cycle executed as a NOP. One instruction

cycle consists of four oscillator periods. Thus, for an oscillator frequency of 4

MHz, the normal instruction execution time is 1 µs. If a conditional test is true, or

the program counter is changed as a result of an instruction, the instruction

execution time is 2µs.

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3.8 Interface with PC:

Even if all the parameters are processed through a PIC Microcontroller the display unit used will be a Seven segment Display or an LCD Display. Using this device we cannot make Parameter more effective. In order to make the Parameter more effectively illustrated on Screen we can go for PC instead of LCD Displays. So to Interface a PC with our Microcontroller unit we need a RS232 interface. Here we have used MAX232 as a serial interface chip.

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Figure 13- Pin Diagram of MAX232

RFID CARD AND READER

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RF technology is used in many different applications, such as television,

radio, cellular phones, radar, and automatic identification systems. The term

RFID (radio frequency identification) describes the use of radio frequency signals

to provide automatic identification of items.

Radio frequency (RF) refers to electromagnetic waves that have a

wavelength suited for use in radio communication. Radio waves are classified by

their frequencies, which are expressed in kilohertz, megahertz, or gigahertz.

Radio frequencies range from very low frequency (VLF), which has a range of 10

to 30 kHz, to extremely high frequency (EHF), which has a range of 30 to 300

GHz.

RFID is a flexible technology that is convenient, easy to use, and well

suited for automatic operation. It combines advantages not available with other

identification technologies. RFID can be supplied as read-only or read / write,

does not require contact or line-of-sight to operate, can function under a variety

of environmental conditions, and provides a high level of data integrity. In

addition, because the technology is difficult to counterfeit, RFID provides a high

level of security.

RFID is similar in concept to bar coding. Bar code systems use a reader

and coded labels that are attached to an item, whereas RFID uses a reader and

special RFID devices that are attached to an item. Bar code uses optical signals

to transfer information from the label to the reader; RFID uses RF signals to

transfer information from the RFID device to the reader.

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Radio waves transfer data between an item to which an RFID device is

attached and an RFID reader. The device can contain data about the item, such

as what the item is, what time the device traveled through a certain zone,

perhaps even a parameter such as temperature. RFID devices, such as a tag or

label, can be attached to virtually anything – from a vehicle to a pallet of

merchandise.

RFID technology uses frequencies within the range of 50 kHz to 2.5 GHz.

An RFID system typically includes the following components:

• An RFID device (transponder or tag) that contains data about an item

• An antenna used to transmit the RF signals between the reader and the RFID

device

• An RF transceiver that generates the RF signals

• A reader that receives RF transmissions from an RFID device and passes the

data to a host system for processing

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In addition to this basic RFID equipment, an RFID system includes

application-specific software.

WORKING OF THE RFID TAGS

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WORKING OF THE RFID TAGS

The RFID tags based on the mode of operation are classified as Active and Passive tags. The classification is done on basis of the tags ability to

transmit the code embedded in it. Hence an active tag is capable of transmitting

to a reader independently, whereas the passive tag needs an external excitation

for to transmit the code. The reader usually provides the excitation. Further each

of the tags either active or passive has their own frequency of operation. We

have used the passive type of tag operating at 125 kHz in our project.

PACKAGING

Tags are manufactured in a wide variety of packaging formats designed

for different applications and environments. The basic assembly process consists

of first a substrate material (Paper, PVC, PET...); upon which an antenna made

from one of many different Conductive materials including Silver ink, Aluminum

and copper is deposited. Next the Tag chip itself is connected to the antenna;

using techniques such as wire bonding or flip chip. Finally a protective overlay

made from materials such as PVC lamination, Epoxy Resin or Adhesive Paper, is

optionally added to allow the tag to support some of the physical conditions found

in many applications like abrasion, impact and corrosion.

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BASIC TAG ASSEMBLY

TAG IC’S

BASIC TAG IC ARCHITECTURE

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RFID tag IC’s are designed and manufactured using some of the most

advanced and smallest geometry silicon processes available. The result is

impressive, when you consider that the size of a UHF tag chip is around 0.3 mm2

In terms of computational power, RFID tags are quite dumb, containing

only basic logic and state machines capable of decoding simple instructions. This

does not mean that they are simple to design! In fact very real challenges exist

such as, achieving very low power consumption, managing noisy RF signals and

keeping within strict emission regulations. Other important circuits allow the chip

to transfer power from the reader signal field, and convert it via a rectifier into a

supply voltage. The chip clock is also normally extracted from the reader signal.

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Most RFID tags contain a certain amount of NVM (Non volatile Memory) like

EEPROM in order to store data.

The amount of data stored depends on the chip specification, and can

range from just simple Identifier numbers of around 96 bits to more information

about the product with up to 32 Kbits. However, greater data capacity and

storage (memory size) leads to larger chip sizes, and hence more expensive

tags. In 1999 The AUTO-ID center (now EPC Global) based at the MIT

(Massachusetts Institute of Technology) in the US, together with a number of

leading companies, developed the idea of an unique electronic identifier code

called the EPC (Electronic Product Code). The EPC is similar in concept to the

UPC (Universal Product

Code) used in barcodes today. Having just a simple code of up to 256 bits would

lead to smaller chip size, and hence lower tag costs, which is recognized as the

key factor for wide spread adoption of RFID in the supply chain.

TAG CLASSESOne of the main ways of categorizing RFID tags is by their capability to

read and write data.

This leads to the following 4 classes. EPC global has also defined five classes

CLASS 0 – READ ONLY. – Factory programmed

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These are the simplest type of tags, where the data, which is usually a simple ID

number, (EPC) is written only once into the tag during manufacture. The memory

is then disabled from any further updates. Class 0 is also used to define a

category of tags called EAS (electronic article surveillance) or anti-theft devices,

which have no ID, and only announce their presence when passing through an

antenna field.

CLASS 1 – WRITE ONCE READ ONLY (WORM) – Factory or User programmed

In this case the tag is manufactured with no data written into the memory.

Data can then either be written by the tag manufacturer or by the user – one

time. Following this no further writes are allowed and the tag can only be read.

Tags of this type usually act as simple Identifiers

CLASS 2 – READ WRITEThis is the most flexible type of tag, where users have access to read and

write data into the tags memory. They are typically used as data loggers, and

therefore contain more memory space than what is needed for just a simple ID

number.

CLASS 3 – READ WRITE – with on board sensorsThese tags contain on-board sensors for recording parameters like temperature,

pressure, and motion, which can be recorded by writing into the tags memory. As

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sensor readings must be taken in the absence of a reader, the tags are either

semi-passive or active.

CLASS 4 – READ WRITE – with integrated transmitters.

These are like miniature radio devices that can communicate with other tags and

devices without the presence of a reader. This means that they are completely

active with their own battery power source.

ACTIVE AND PASSIVE TAGS

Passive tags use the reader field as a source of energy for the chip and

for Communication from and to the reader. The available power from the reader

field, not only reduces very rapidly with distance, but is also controlled by strict

regulations, resulting in a limited communication distance of 4 - 5m when using

the UHF frequency Band (860 MHz – 930 MHz).

Semi-Passive (battery assisted backscatter) tags have built in batteries

and therefore do not require energy from the reader field to power the chip. This

allows them to function with much lower signal power levels, resulting in greater

distances of up to 100 meters. Distance is limited mainly due to the fact that tag

does not have an integrated transmitter, and is still obliged to use the reader field

to communicate back to the reader.

Active tags are battery-powered devices that have an active transmitter

onboard. Unlike passive tags, active tags generate RF energy and apply it to the

antenna. This autonomy from the reader means that they can communicate at

distances of over several kilometers.

HOW TAGS COMMUNICATE

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Near and Far fieldsIn order to receive energy and communicate with a reader, passive tags

use one of the two following methods. These are near field, which employs

inductive coupling of the tag to the magnetic field circulating around the reader

antenna (like a transformer), and far field, which use similar techniques to radar

(backscatter reflection) by coupling with the electric field. The near field is

generally used by RFID systems operating in the LF and HF frequency bands,

and the far fields for longer read range UHF and microwave RFID systems. The

theoretical boundary between the two fields depends on the frequency used, and

is in fact directly proportional to l/2p where l = wavelength. This gives for example

around 3.5 meters for an HF system and 5 cm for UHF, both of which are further

reduced when other factors are taken into account.

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LF, HF Tags

Tags at these frequencies use inductive coupling between two coils

(reader antenna and tag antenna) in order to supply energy to the tag and send

information. The coils themselves are actually tuned LC circuits, which when set

to the right frequency (ex; 13.56 MHz), will maximize the energy transfer from

reader to tag. The higher the frequency the less turns required (13.56 MHz

typically uses 3 to 5 turns). Communication from reader to tag occurs by the

reader modulating (changing) its field amplitude in accordance with the digital

information to be transmitted (base band signal). The result is the well-known

technique called Amplitude modulation (AM). The tags receiver circuit is able to

detect the modulated field, and decode the original information from it. However,

whilst the reader has the power to transmit and modulate its field, a passive tag

does not. How communication is therefore achieved back from tag to reader?

The answer lies in the inductive coupling. Just as in a transformer when

the secondary coil (tag antenna) changes the load and the result is seen in the

Primary (reader antenna). The tag chip accomplishes this same effect by

changing its antenna impedance via an internal circuit, which is modulated at the

same frequency as the reader signal. In fact it’s a little more complicated than

this because, if the information is contained in the same frequency as the reader,

then it will be swamped by it, and not easily detected due to the weak coupling

between the reader and tag. To solve this problem, the real information is often

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instead modulated in the side bands of a higher sub- carrier frequency, which is

more easily detected by the reader

Creation of two higher frequency side-bands

Anti-collision

If many tags are present then they will all reply at the same time, which at

the reader end is seen as a signal collision and an indication of multiple tags. The

reader manages this problem by using an anti-collision algorithm designed to

allow tags to be sorted and individually selected. There are many different types

of algorithms (Binary Tree, Aloha....), which are defined as part of the protocol

standards. The number of tags that can be identified depends on the frequency

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and protocol used, and can typically range from 50 tags/s for HF and up to 200

tags/s for UHF.

Once a tag is selected, the reader is able to perform a number of

operations such as read the tags identifier number, or in the case of a read/write

tag write information to it. After finishing dialoging with the tag, the reader can

then either remove it from the list, or put it on standby until a later time. This

process continues under control of the anti collision algorithm until all tags have

been selected.

EXAMPLES OF DIFFERENT FORMAT OF TAGS

Credit card size flexible labels with adhesive backs

Tokens and coins

Embedded tags – injection molded into plastic products such as cases

Wrist band tags

Hard tags with epoxy case

Key fobs

Tags designed specially for Palettes and cases

Paper tags

VIEW OF THE 125 kHz CARD EMPLOYED IN OUR PROJECT

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ELECTRONIC PRODUCT CODE

EPC layout

The code is similar to the UPC (Universal Product Code) used in bar

codes, and ranges from 64 bits to 256 bits with 4 distinct fields described below

in fig 10. . What sets the EPC apart from bar codes is its serial number, which

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allows distinguishing the uniqueness of an item, and tracking it through the

supply chain.

Layout of an EPC that is 96 bits in length

Header (0- 7) bitsThe Header is 8 bits, and defines the length of the code in this case O1 indicates

an EPC type 1 number, which is 96 bits in length. The EPC length ranges from

64 to 256 bits.

EPC manager (8- 35) bitsWill typically contain the manufacturer of the Product the EPC tag is attached to

Object Class (36-59) bitsRefers to the exact type of product in the same way a an SKU (Stock Keeping

Unit)

Serial Number (60 – 96) bitsProvides a unique identifier for up to 296 products

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THE 125 KHZ RFID CARDThe card used in our project is a passive Radio Frequency Identification

(RFID) device for low-frequency applications (100 kHz-400 kHz). The device is

powered by rectifying an incoming RF signal from the reader. The device

requires an external LC resonant circuit to receive the incoming RF signal and to

send data. The device develops a sufficient DC voltage for operation when its

external coil voltage reaches approximately 10 Vpp.

This device has a total of 128 bits of user programmable memory and an

additional 12 bits in its configuration register. The user can manually program the

128 bits of user memory by using a contact less programmer. The device is a

One-Time Programmable (OTP) integrated circuit and operates as a read-only

device after programming.

TYPICAL PIN DETAILS OF THE CHIP INSIDE THE RFID CARD

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FEATURES• Factory programming and memory serialization.

• One-time contactless programmable (developer kit only)

• Read-only data transmission after programming

• 96 or 128 bits of One-Time Programmable (OTP) user memory (also supports

48 and 64-bit protocols)

• Typical operation frequency: 100 kHz-400 kHz

• Ultra low-power operation (5 µA @ VCC = 2V)

• Modulation options:

- ASK, FSK, PSK

• Data encoding options:

- NRZ Direct, Differential Biphase, Manchester Biphase

BLOCK DIAGRAM OF THE CHIP

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The configuration register includes options for communication protocol

(ASK, FSK, PSK), data encoding method, data rate, and data length. These

options are specified by customer and factory programmed during assembly.

Because of its many choices of configuration options, the device can be easily

used as an alternative or second source for most of the existing low frequency

passive RFID devices available today.

The device has a modulation transistor between the two antenna

connections (VA and VB). The modulation transistor damps or undamps the coil

voltage when it sends data. The variation of coil voltage controlled by the

modulation transistor results in a perturbation of voltage in reader antenna coil.

By monitoring the changes in reader coil voltage, the data transmitted from the

device can be reconstructed.

MODULATION SIGNAL & MODULATED SIGNAL OF THE CARD

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WORKING OF THE RFID READER

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WORKING OF THE RFID READERThe reader is the one of the key element in the system it is responsible for

initiating the operation of the system.

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The reader is a complete transponder, which implements all the important

functions for the system. It consists of a plastic tube that accommodates the read

only integral circuit (IC) and the antenna realized by the LC circuit.

The identifying data are stored in the 128-bit PROM realized as an array

of laser programmable fuses. The data are sent bit serially as a code.

BLOCK DIAGRAM OF THE 125 KHZ RIFD READER

OUTPUT SIGNAL FROM READER

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FEATURES

TYPICAL APPLICATION CIRCUIT

The block diagram shown below describes a typical application circuit.

The circuit is similar to circuits employed it RFID systems, the card and the

reader interaction shown. The frequency of operation is selected by tuning the

reader by means of the LC circuit.

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Stepper Motor Driver Board Interface

6.1 Stepper Motors

6.1.1 Basic OperationA stepper motor is an electric machine that rotates in discrete angular increments

or steps. It is operated by applying pulses of a specific frequency to the input of

the motor. Each pulse applied to the motor causes its shaft to move a certain

angle of rotation, called a stepping angle. Figure 6.1 shows a simplified

construction of bifilar permanent magnet stepper motor. The rotor of the motor is

made of a permanent magnet material and has six teeth equally spaced around

the circumference of the rotor with alternating north (N) and south(S) magnet

polarities. The stator has four poles, each of which has a center-tapped winding.

The windings on opposing poles are connected together so that only five wires -

A, B, C, D, and V+ - leave the motor. A winding is excited by sending a current

into the V+ wire and out one of the other wires. The windings are wound in the

stator teeth in such way so that the following results are obtained.

If winding B is excited, pole 1 is energized as North and pole 2 as South; if

winding

A is excited, pole 1 becomes South and pole 2 becomes North instead.

If winding C is excited, pole 3 is energized as North and pole 4 as South; if

winding

D is excited, pole 3 becomes South and pole 4 becomes North instead.

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The operation of the stepper motor relies on the simple principle that, opposite

magnetic poles attract while like poles repel. If the windings are excited in a

correct

sequence, the rotor will rotate to a certain direction Figure 6.2 illustrates how the

rotor

rotates when the windings are excited with the sequence given in Table 1

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Winding A Winding B Winding C Winding DPosition 1 Off On Off Off

Position 2 Off Off On Off

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Position 3 On Off Off Off

Position 4 Off Off Off On

As can be seen in Figure 6.2, the excitation sequence given in Table 1 causes

the rotor to rotate in clockwise direction. If the excitation sequence is reversed,

the direction of motion will also be reversed. If the excitation is removed, there is

still some attraction between the poles and the teeth due to the permanent

magnet in the rotor. As a result there is a residual holding torque even when

there is no power applied to the motor.

From Figure 6.2 it can be seen, that the motor has a 30 degrees stepping angle,

and it requires 12 steps to complete one revolution. The number of steps per

revolution in a stepper motor can be increased by adding more teeth on the rotor

and by having

additional teeth machined into the stator poles The stepping angle of a stepper

motor can be made to be as small as 1.8 degree so that 200 steps are required

per revolution.

The excitation scheme in Figure 6.2 is referred to as single phase excitation

since only one of the four windings is excited at a time. At each step the rotor

teeth is aligned exactly with the active stator teeth. It is, however, possible to

operate the motor with two

windings carrying current at the same time (two-phase excitation). In that case

the rotor teeth align themselves between the two active stator teeth. Table 2

shows the actuation sequences and the rotor positions for single-phase and two

phase excitation. Note that the

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stepping angles for the two kinds of excitation are the same but that the rotor

positions are offset by half the stepping angle. These two actuation scheme are

sometimes called full-stepping actuation modes

Single Phase Excitation

Rotor PositionWinding A Winding B Winding C Winding D0 Off On Off Off

θ Off Off On Off

2 θ On Off Off Off

3θ Off Off Off On

Two-Phase ExcitationRotor positionWinding A Winding B Winding C Winding Dθ 2 Off On On Off

3θ 2 On Off On Off

5θ 2 On Off Off On

7θ 2 Off On Off On

Table 2. Full step actuation mode: single-phase and two-phase excitation

If the single-excitation and the two-phase actuation sequence are combined, a

half-step mode results. In this mode the number of steps per revolution is

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doubled, so that a motor requiring 200 steps per revolution with the full-step

mode will require 400 steps

per revolution when operated in the half step mode. Table 3 shows the

actuationsequence for the half step mode.

Half-step modeRotorpositionWinding A Winding B Winding C Winding D0 Off On Off Off

θ 2 Off On On Off

θ Off Off On Off

3θ 2 On Off On Off

2 θ On Off Off Off

5θ 2 On Off Off On

3θ Off Off Off On

7θ 2 Off On Off On

Table 3. Half-step actuation mode

The stepper motor described above uses two windings with opposing

magnetizing effect in each pole. This is the reason why it is called ‘bifilar’ stepper

motor. Some stepper motors use only one winding per pole, and are referred to

as ‘unifilar’ type. Unlike the bifilar type, the unifilar stepper motor requires a

negative voltage to reverse

the magnetic polarity of the pole. Besides unifilar and bifilar, stepper motors are

also classified from the material used to build the rotor. There are some stepper

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motors that use a simple iron rotor with no permanent magnet. This type of

stepper motor is called

variable reluctance stepper motor. In this type of stepper motor, the rotor is still

moved by the attraction of the rotor to the energized poles of the stator. However,

a variable reluctance stepper motor has no residual holding torque when the

winding is not energized.

STEPPER DRIVER LOGIC

SUMMARY OF OPERATION

The stepper driver logic consists of buffer, opto-coupler, pre-driver and driver.

Buffer

Buffer interfaces 8255 with high-level circuits (such as MOS.) for driving

high current loads.

Opto-coupler:

It consists of opto-emitter and phototransistor in opto-emitter exists infra

red radiation which in turn drives the phototransistor.

Pre-driver: We cannot directly couple the TIP122 (NPN) to the opto-coupler since it

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requires large current for driving. We use the driver SL100 to boost the current

level.

Driver:

The main principle of the driver is to amplify the current. It amplifies the

50mA current to2A, which is needed to drive the motor.

Control logic:

It consists of an SL100 and relays. Whenever we need to rotate the

stepper motor we input high level through PA7 of PPI to SL100 70msec before.

So SL100 produce logic low. Now the coil is energized and the 24v is connected

to the coil of the driver by the relay.

Buffer:

It is the first stage of stepper driver logic unit. Its input is obtained from

the output of PPI Since the output current of PPI is very low we are using the

buffer LS7406 (Hex inverter buffer) as a buffer .It is a driver with open collector

high voltage output . So it is used for interfacing with high level circuits (such as

MOS.), or for driving high current loads(such as lamps or relays), and are also

characterized for use as inverter buffers for driving TTL inputs. LS7406 have

minimum breakdown voltages of 30v, and maximum sink current of 40mA.

The main advantages of this IC are

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1.Converts TTL voltage level to MOS. level,

2. High sink current capability,

3. Input clamping diodes simplify system design,

4. Open collector driver for indicator lamps and relays,

5. Inputs fully compatible with most TTL circuits.

The sink current required for our driver unit is

I sink = V/R = 5000mV/180ohms = 27mA.

Since our IC has maximum sink current of40mA it is very much suitable for this

driver unit.

Opto coupler:-

It consists of Opto-emitter &Phototransistor. An opto coupler is essential

to prevent the computer from hazardous conditions like voltage transients, back

emf, and high voltage spikes.

We use dc Stepper motors for our robotic applications. Normally when we

pass dc current to a coil it will get Electro magnetized, when we with draw the dc

source & also it wont get demagnetized. If it is not demagnetized, back EMF is

produced which can create kick back current to the subsequent devices or

associated circuitaries.

- To avoid the above problems we require a device, which can isolate

electrically & couples by other means.

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Opto-emitters anode is connected to 5v supply (Logic1). It cathode is

connected to the buffers output. When logic 1 is given to the input of LS7406 we

get logic 0 as the output. Sink current of opto-emitter is lower than that of

LS7406. Now this opto-emitter emits IR rays. This drives the phototransistor

whose collector is forced to 24v. When IR rays are emitted from the opto-emitter

the phototransistor conducts. The collector to emitter resistance becomes low.

So the 24v will appear at emitter. It is given as input for the pre driver (CL100).

We have used CNY 17-2 opto-coupler. It consists of Gallium Arsenide IR

emitting diode optically coupled to a monolithic silicon photo transistor detector.

Advantages are

1) Closely matched current transfer ratio (CTR) that is less

conversion losses.

2) Guaranteed 70 volts V (Br.) CEO minimum.

Application:

Feed back control circuits.

General purpose switching circuits.

Interfacing and coupling systems of different potentials and

references.

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PULL DOWN RESISTOR:

10kohms resistor is used. It is used to verify the input of pre driver

stage is low. When the IR detector is not conducting the collector to emitter is

high. Now the input at pre driver (SL 100) may be high or low. But it should

be low. To make it sure we are using pull down resistor.

PRE DRIVER:

CL 100 power transistor is used here. It is used to boost the

current. It is an NPN transistor when 24V is given from the opto coupler as an

input to the base. Its start conducting and the O/P is low 24V is grounded.

DRIVER

TIP 122 power transistor is used here. 24V supply is given to it

through 470ohms resistor to its base. The logic 0 output from CL 100 is given to

the base of TIP122. It is a NPN transistor so output is low.

Package TOP66

Lead information L32

Vcb max. 100V.

Vce max. 100V.

Veb max. 5V

Ic max. 5A

Hfe 1KMN

Hfe Bias 3 amps

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When the TIP 122 transistor have high input signal its base,

collector to emitter resistance is relatively low. So it produces a low output signal.

When the output signal is low the coil is energized. Now the motor can move

forward or reverse as per the pattern given in the software routine.

An reverse biased diode is connected in parallel with the coil. When

the coil is demagnetizing it produces high back EMF which can destroy TIP122

which is in the cut off state. This can be avoided by this diode.

OPTO COUPLERS:Fig a shows an LED driving a photo transistor. This is a much more sensitive opto-coupler than the LED photo diode. The idea is that any change in Vs produces changes in LED current, which changes the current through the transistor. In turn, this produces a changing voltage across the collector-emitter terminals. Therefore a signal voltage is coupled from the input circuit to the output circuit. The big advantage of an opto-coupler is the electrical isolation between the input and output circuits. Stated another way the common for the input circuit is different from the common for the output circuit. Because of this, no conductive path exist between the two circuits. This means that you can ground one of the circuits and float the other. For instance the input circuit can be grounded to the chassis of the equipment while the common of the output side is ungrounded. It consist of opto-emitter and photo transistor. An opto-coupler is essential to prevent the computer from hazardous conditions like voltage transients, back EMF and high voltage spikes.

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We use DC stepper motors for our robotic applications. Normally when we pass Dc current to a coil it will get electromagnetized . When we withdraw the DC source it wont get demagnetized. If it is not demagnetized back emf is produced which can create kick back current to the subsequent devices or associated circuitries. To avoid the above problems we require a device that can isolate electrically and couples by other means. Opto-emitters anode is connected to 5 V supply ( logic 1). It’s cathode is connected to the buffer output. When logic 1 is given to the input of LS7406 we get logic 0 as the output. Sinc current of the opto-emitter is lower than that of LS7406. Now this opto-emitter emits IR rays. This drives the phototransistor whose collector is forced to 24 V. When IR rays are emitted from the opto-emitter the phototransistor conducts. The collector to emitter resistance becomes low. So the 24 V will appear at the emitter. It is given as input for the pre-driver (CL 100). We have used CNY 17-2 opto-coupler. It consist of GaAs IR emitting diode optically coupled to a monolithic silicon phototransistor detector. Advantages are Closely maintained current transfer ratio (CTR) that is the less conversion losses. Guarantied 70 V (BR.) CEO min.

LCD ►Introduction

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The most commonly used Character based LCDs are based on Hitachi's

HD44780 controller or other which are compatible with HD44580. In this tutorial,

we will discuss about character based LCDs, their interfacing with various

microcontrollers, various interfaces (8-bit/4-bit), programming, special stuff and

tricks you can do with these simple looking LCDs which can give a new look to

your application.

For Specs and technical information HD44780 controller Click Here

►Pin Description

The most commonly used LCDs found in the market today are 1 Line, 2 Line or 4

Line LCDs which have only 1 controller and support at most of 80 charachers,

whereas LCDs supporting more than 80 characters make use of 2 HD44780

controllers.

Most LCDs with 1 controller has 14 Pins and LCDs with 2 controller has 16 Pins

(two pins are extra in both for back-light LED connections). Pin description is

shown in the table below.

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Figure 1: Character LCD type HD44780 Pin diagram

Pin No. Name Description

Pin no. 1 VSS Power supply (GND)

Pin no. 2 VCC Power supply (+5V)

Pin no. 3 VEE Contrast adjust

Pin no. 4 RS0 = Instruction input

1 = Data input

Pin no. 5 R/W0 = Write to LCD module

1 = Read from LCD

module

Pin no. 6 EN Enable signal

Pin no. 7 D0 Data bus line 0 (LSB)

Pin no. 8 D1 Data bus line 1

Pin no. 9 D2 Data bus line 2

Pin no. 10 D3 Data bus line 3

Pin no. 11 D4 Data bus line 4

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Pin no. 12 D5 Data bus line 5

Pin no. 13 D6 Data bus line 6

Pin no. 14 D7 Data bus line 7 (MSB)

Table 1: Character LCD pins with 1 Controller

Pin No. Name Description

Pin no. 1 D7 Data bus line 7 (MSB)

Pin no. 2 D6 Data bus line 6

Pin no. 3 D5 Data bus line 5

Pin no. 4 D4 Data bus line 4

Pin no. 5 D3 Data bus line 3

Pin no. 6 D2 Data bus line 2

Pin no. 7 D1 Data bus line 1

Pin no. 8 D0 Data bus line 0 (LSB)

Pin no. 9 EN1 Enable signal for row 0 and 1 (1stcontroller)

Pin no. 10 R/W0 = Write to LCD module

1 = Read from LCD module

Pin no. 11 RS0 = Instruction input

1 = Data input

Pin no. 12 VEE Contrast adjust

Pin no. 13 VSS Power supply (GND)

Pin no. 14 VCC Power supply (+5V)

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Pin no. 15 EN2 Enable signal for row 2 and 3 (2ndcontroller)

Pin no. 16 NC Not Connected

Table 2: Character LCD pins with 2 Controller

Usually these days you will find single controller LCD modules are used more in

the market. So in the tutorial we will discuss more about the single controller

LCD, the operation and everything else is same for the double controller too. Lets

take a look at the basic information which is there in every LCD.

No. Instruction Hex Decimal

1 Function Set: 8-bit, 1 Line, 5x7 Dots 0x30 48

2 Function Set: 8-bit, 2 Line, 5x7 Dots 0x38 56

3 Function Set: 4-bit, 1 Line, 5x7 Dots 0x20 32

4 Function Set: 4-bit, 2 Line, 5x7 Dots 0x28 40

5 Entry Mode 0x06 6

6

Display off Cursor off

(clearing display without clearing

DDRAM content)

0x08 8

7 Display on Cursor on 0x0E 14

8 Display on Cursor off 0x0C 12

9 Display on Cursor blinking 0x0F 15

10 Shift entire display left 0x18 24

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12 Shift entire display right 0x1C 30

13 Move cursor left by one character 0x10 16

14 Move cursor right by one character 0x14 20

15Clear Display (also clear DDRAM

content)0x01 1

16Set DDRAM address or coursor position

on display0x80+add* 128+add*

17Set CGRAM address or set pointer to

CGRAM location0x40+add** 64+add**

Table 4: Frequently used commands and instructions for LCD

* DDRAM address given in LCD basics section see Figure 2,3,4

** CGRAM address from 0x00 to 0x3F, 0x00 to 0x07 for char1 and so on..

►LCD Initialization

Before using the LCD for display purpose, LCD has to be initialized either by the

internal reset circuit or sending set of commands to initialize the LCD. It is the

user who has to decide whether an LCD has to be initialized by instructions or by

internal reset circuit. we will dicuss both ways of initialization one by one.

Initialization by internal Reset Circuit

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An internal reset circuit automatically initializes the HD44780U when the power is

turned on. The following instructions are executed during the initialization. The

busy flag (BF) is kept in the busy state until the initialization ends (BF = 1). The

busy state lasts for 10 ms after VCC rises to 4.5 V.

Display clear

Function set:

DL = 1; 8-bit interface data

N = 0; 1-line display

F = 0; 5 x 8 dot character font

Display on/off control:

D = 0; Display off

C = 0; Cursor off

B = 0; Blinking off

Entry mode set:

I/D = 1; Increment by 1

S = 0; No shift

Note: If the electrical characteristics conditions listed under the table Power

Supply Conditions Using Internal Reset Circuit are not met, the internal reset

circuit will not operate normally and will fail to initialize the HD44780U. For such a

case, initial-ization must be performed by the MCU as explained in the section,

Initializing by Instruction.

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Software

// With LCD Display

#include <pic.h>

#include <math.h>

#include <string.h>

#include <stdio.h>

#include <stdlib.h>

#include <delay4.c>

#include <lcdportd.h>

void interrupt Int();

int Pulse[4] ={ 0x1a, 0x16, 0x15, 0x19 };

int Count;

bank1 short int Key,j,k,Ptr,Rrdy_Flag=0,Sync_Flag=0;

short int i = 0,m;

unsigned char Cnt1,Cnt2,Run=0;

char Ch,Cno[5];

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unsigned int Code1;

unsigned char Rbuf[28];

unsigned char Data[5];

void ArrangeData0(short int Cnt);

void ArrangeData1(short int Cnt);

void SendChar(unsigned char C);

void ChkRec();

int Pcount1;

int SetDel,DelMs;

void main()

{

DelayMs(100);

TRISA = 0xff;

TRISB = 0x02;

TRISD = 0x00;

TRISC = 0xe0;

TRISE = 0x00;

PORTC= 0x80;

PORTB = 0x00;

PORTD = 0x00;

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ADCON0 = 0x81;

ADCON1 = 0x86;

PEIE = 1;

GIE = 1;

SPBRG = 25;

TXEN = 1; // Enable transmit

BRGH = 1; // ; Select high baud rate

SYNC = 0;

SPEN = 1; // Enable Serial Port

CREN = 1; // Enable continuous reception

RCIF = 0; // Clear RCIF Interrupt Flag

RCIE = 1; // Set RCIE Interrupt Enable

PEIE = 1; // Enable peripheral interrupts

GIE = 1; // ; Enable global interrupts

LCD_init();

DelayMs(100);

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i = 0;

do

{

ClearLine(0x80);

ClearLine(0xc0);

LCD_SendCmd(0x80);

LCD_puts(" RFID Based ");

LCD_SendCmd(0xc0);

LCD_puts(" TOLL GATE ");

Count = 0;

Code1 = 0;

while(Count <= 25)

{

if(!RA0)

{

while(!RA0) continue;

Count++;

ArrangeData0(Count);

}

if(!RA1)

{

while(!RA1) continue;

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Count++;

ArrangeData1(Count);

}

ChkRec();

}

if (Count == 26)

{

sprintf(Cno,"%5u",Code1);

if(Cno[0] == ' ') Cno[0] = '0';

if(Cno[1] == ' ') Cno[1] = '0';

if(Cno[2] == ' ') Cno[2] = '0';

if(Cno[3] == ' ') Cno[3] = '0';

if(Cno[4] == ' ') Cno[4] = '0';

SendChar('{');

SendChar('1');

SendChar(Cno[0]);

SendChar(Cno[1]);

SendChar(Cno[2]);

SendChar(Cno[3]);

SendChar(Cno[4]);

SendChar('}');

j = 1;

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while(j)

{

ChkRec();

} // while j

} //count = 26

}while(1);

}

void ChkRec()

{

if(Rrdy_Flag == 1)

{

Rrdy_Flag = 0;

if(Rbuf[0] == '1')

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{ ClearLine(0x80);

ClearLine(0xc0);

LCD_SendCmd(0x84);

for(m = 0; m < 8; m++)

{

LCD_SendData(Rbuf[m+1]);

}

DelayMs(200);

DelayMs(200);

DelayMs(200);

DelayMs(200);

ClearLine(0x80);

ClearLine(0xc0);

LCD_SendCmd(0x80);

LCD_puts(" Door open ");

LCD_SendCmd(0xc0);

LCD_puts("Curr Bal: ");

LCD_SendCmd(0xca);

for(m = 0; m < 3; m++)

{

LCD_SendData(Rbuf[m+9]);

}

DelayMs(200);

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DelayMs(200);

DelayMs(200);

DelayMs(200);

DelayMs(200);

j=0;

Count =0;

for(i=0;i <=75; i++)

{

PORTC = Pulse[Pcount1];

Pcount1++;

if(Pcount1 > 3) Pcount1 = 0;

DelayMs(3);

}

PORTC = 0x00;

while(!RB1) continue;

for(i=0;i <=75; i++)

{

PORTC = Pulse[Pcount1];

Pcount1--;

if(Pcount1 < 0) Pcount1 = 3;

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DelayMs(3);

}

PORTC = 0x00;

}

else if(Rbuf[0] == '2')

{

if(Rbuf[1]=='0')

{

ClearLine(0x80);

ClearLine(0xc0);

LCD_SendCmd(0x80);

LCD_puts(" Invalid Card");

RB0=1;

DelayMs(200);

DelayMs(200);

DelayMs(200);

RB0=0;

j=0;

Count=0;

}

else if(Rbuf[1]=='1')

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{

ClearLine(0x80);

ClearLine(0xc0);

LCD_SendCmd(0x80);

LCD_puts(" Insufficient");

LCD_SendCmd(0xC0);

LCD_puts(" Balance ");

RB0=1;

DelayMs(200);

DelayMs(200);

DelayMs(200);

RB0=0;

j=0;

Count = 0;

}

}

}// rrdy flag

}

void ArrangeData0(short int Cnt)

{

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switch(Cnt)

{

case 25:

Code1 = Code1 & (~1);

return;

case 24:

Code1 = Code1 & (~2);

return;

case 23:

Code1 = Code1 & (~4);

return;

case 22:

Code1 = Code1 & (~8);

return;

case 21:

Code1 = Code1 & (~16);

return;

case 20:

Code1 = Code1 & (~32);

return;

case 19:

Code1 = Code1 & (~64);

return;

case 18:

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Code1 = Code1 & (~128);

return;

case 17:

Code1 = Code1 & (~256);

return;

case 16:

Code1 = Code1 & (~512);

return;

case 15:

Code1 = Code1 & (~1024);

return;

case 14:

Code1 = Code1 & (~2048);

return;

case 13:

Code1 = Code1 & (~4096);

return;

case 12:

Code1 = Code1 & (~8192);

return;

case 11:

Code1 = Code1 & (~16384);

return;

case 10:

Code1 = Code1 & (~32768);

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return;

}

}

void ArrangeData1(short int Cnt)

{

switch(Cnt)

{

case 25:

Code1 = Code1 | 1;

return;

case 24:

Code1 = Code1 | 2;

return;

case 23:

Code1 = Code1 | 4;

return;

case 22:

Code1 = Code1 | 8;

return;

case 21:

Code1 = Code1 | 16;

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return;

case 20:

Code1 = Code1 | 32;

return;

case 19:

Code1 = Code1 | 64;

return;

case 18:

Code1 = Code1 | 128;

return;

case 17:

Code1 = Code1 | 256;

return;

case 16:

Code1 = Code1 | 512;

return;

case 15:

Code1 = Code1 | 1024;

return;

case 14:

Code1 = Code1 | 2048;

return;

case 13:

Code1 = Code1 | 4096;

return;

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case 12:

Code1 = Code1 | 8192;

return;

case 11:

Code1 = Code1 | 16384;

return;

case 10:

Code1 = Code1 | 32768;

return;

}

}

void SendChar(unsigned char C)

{

while(!TXIF) continue;

TXREG = C;

DelayUs(20);

}

void interrupt Int()

{

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if(RCIF)

{

RCIF = 0;

if(Sync_Flag != 0)

{

if(RCREG == ']')

{

Rrdy_Flag = 1;

Sync_Flag = 0;

}

else

{ if((RCREG >= 0x30 && RCREG <= 0x39) ||

(RCREG >= 'A' && RCREG <= 'Z') || (RCREG >= 'a' && RCREG <= 'z') ||

RCREG == '.' || RCREG == ' ' || RCREG == '/' || RCREG == ':')

Rbuf[Ptr++] = RCREG;

}

}

else

{

if(RCREG == '[')

{

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Sync_Flag = 1;

Ptr = 0;

}

}

}

}

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Applications of RFID Automotive - Auto-makers have added security and convenience into an

automobile by using RFID technology for anti-theft immobilizers and passive-

entry systems.

Animal Tracking - Ranchers and livestock producers use RFID technology to

meet export regulations and optimize livestock value. Wild animals are tracked in

ecological studies, and many pets who are tagged are returned to their owners.

Asset Tracking - Hospitals and pharmacies meet tough product accountability

legislation with RFID; libraries limit theft and keep books in circulation more

efficiently; and sports and entertainment entrepreneurs find that "smart tickets"

are their ticket to a better bottom line and happier customers.

Contactless Payments - Blue-chip companies such as American Express,

ExxonMobil, and MasterCard use innovative form factors enabled by TI RFID

technology to strengthen brand loyalty and boost revenue per customer.

Supply Chain - WalMart, Target, BestBuy, and other retailers have discovered

that RFID technology can keep inventories at the optimal level, reduce out-of-

stock losses, limit shoplifting, and speed customers through check-out lines.

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Conclusion

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RFID payments are a growing industry in many ways reforming the way we make

transactions. Radio communication provides efficiency, unmet by any legacy

payment system, such as cash and credit cards. This scheme enables a fast and

convenient way of collecting car toll requiring no interaction between the toll and

the car owner, speed of the traffic also increases. Meanwhile, an anonymous

payment solution is provided Implementation of this system can reduce the crime

to a large extent as the toll station will have the exact record as to which vehicle

has crossed the toll station and also can avoid the fraudulent use of the card

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Bibliography

1) Basic Electronics

Albert Paul Malvino

2) Working With PIC Microcontrollers

John Peat Man

3)www.microchip.com

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4)http://en.wikipedia.org/wiki/Electronic_toll_collection

5) RFID Essentials

Himanshu Bhatt