RF Power Amplifiers - MIT OpenCourseWare · PDF file1 RF Power Amplifiers for Wireless...
Transcript of RF Power Amplifiers - MIT OpenCourseWare · PDF file1 RF Power Amplifiers for Wireless...
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RF IF
RF Power Amplifiers
May 7, 2003
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RF IF
Outline
PA IntroductionPower transfer characteristicsIntrinsic PA metricsLinear and Non-linear amplifiersPA Architectures
Single-Stage Linear PALoad-line theoryTransistors size Input and Output MatchingSo why is this so hard?
High-efficiency PAsClass A, AB, B and C amplifiers
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RF IF
Outline (cont.)
Real-World Design ExampleSelecting architecture, number of stagesDesigning stagesTuning: inter-stage match and output
System specificationsRuggedness: load mis-match and VSWRLinearity: spectral mask (ACPR), switching transientsNoise in receive band
Power Control
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PA Transfer characteristics
Defining linearity:
G
0
1
Pin (dBm)
P out
(dBm
)
Pout = Pin + G
linearnon-linear (actual)
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PA Transfer characteristics
Defining linearity:
Gai
n (d
B)
Pin (dBm)
P out
(dBm
)
G
-1
P1dB
PMAX
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RF IF
PA Introduction: Intrinsic PA Metrics
P1dB: Output power at which linear gain has compressed by 1dB (measure of linear power handling) PMAX: Maximum output power (saturated power)Gain: Generally taken to mean transducer gain
PAE: Power-added Efficiency
Power delivered to loadPower available from source
Power to load – Power from sourcePower from supply
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RF IF
Linear and Non-linear PAs
“Linear PA” generally refers to a PA which operates at constant gain, needs to preserve amplitude information
P OU
T(d
Bm)
PIN (dBm)
Designed to operate here
Not necessarily class A (will discuss later …) Peak efficiencies often only 40 to 45 %Useful for modulation schemes with amplitude modulation (QPSK, 8-PSK, QAM)
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RF IF
Linear and Non-linear PAs
“Non-linear PA” generally refers to a PA designed to operate with constant PIN, output power varies by changing gain
P OU
T(d
Bm)
PIN (dBm)
Designed to operate here:NOT fixed gain!
POUT adjusted throughbias control
Operation in saturated mode leads to high peak efficiencies > 50%; “backed-off” efficiencies drop quicklyUseful for constant-envelope modulation schemes (GMSK)
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RF IF
PA ArchitecturesTypical 2-stage (6.012) design
VB1
50 Ωinput
VPOS
50 Ω
Max power transfer?
IREF
VB2
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RF IF
PA ArchitecturesTypical 2-stage RF PA design
VB1VB2
50 ΩRF input
VPOS
matchingnetwork
matchingnetwork
inductive RF chokeallows output to riseabove VPOS, doesn’t
dissipate power
May require additionalRF choke here to isolate
input from bias circuit
L’s and C’s to transform load
impedance
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RF IF
PA ArchitecturesTypical 2-stage RF PA design
VB1VB2
50 ΩRF input
VPOS
matchingnetwork
matchingnetwork
Additional capsmay be required formatching network,
harmonic termination
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RF IF
PA ArchitecturesTypical 2-stage RF PA design
VB1VB2
50 ΩRF input
VPOS
matchingnetwork
matchingnetwork
bond wires (at least …)
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RF IF
PA ArchitecturesTypical 2-stage RF PA design
VB1VB2
50 ΩRF input
VPOS
matchingnetwork
matchingnetwork
Consider this …
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PA Architectures
“Gain stage” is one transistor with passive elements“Active” components often limited to 2 or 3 transistors (gain stages) in signal pathTransistor design very important!
Many parallel transistors – often look like mini-circuits themselves
Passive components just as important as transistors!Circuits must be tunable to account for uncertainties in determining values a priori (i.e. simulations stink – especially large-signal, RF simulations)Q and parasitic elements of passives important
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RF IF
Single-Stage Linear PA
Load-line theory: the maximum power that a given transistor can deliver is determined by the power supply voltage and the maximum current of the transistor
I Dor
I C (m
A/m
m)
VDS or VCE (V)2*VPOS
IMAX
RLOAD,opt. ≈2⋅VPOS / IMAX
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RF IF
Single-Stage Linear PA
Transistor size chosen to deliver required output power
POUT ≈ IMAX⋅VPOS / 4I D
or I C
(m
A/m
m)
VDS or VCE (V)2*VPOS
IMAX Quiescent point:Class A
IMAX/2, VPOS
RL,opt.
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Single-Stage, Linear PA
Design output match to transform 50Ω load to RL,opt at transistor output; then design input match for gain (complex conjugate)
VB1
50 ΩCJC
outputmatchinput
match
VPOS
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RF IF
Seems simple, so why is this so hard?
Determining IMAX is not so easy For BJTs, one reference suggested that “the best way of estimating its value is to build an optimized class A amplifier and observe the dc supply current.”1
Somewhat easier for depletion-mode GaAs FETs – IMAX often corresponds to VGS = 0VValues don’t scale linearly with transistor size
Optimal load resistance only a theoretical numberTransmission line effects, parasitic L’s and C’s significant at RFCommon practice is to vary the load of an actual transistor to determine the peak output power: the load-pull measurement(Noticing a distinct pattern of “empirical” design emerging?)
1 RF Power Amplifiers for Wireless Communications, Steve Cripps, Artech House, Boston, 1999.
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RF IF
Seems simple, so why is this so hard?
Now consider the problem for multiple stages … double the trouble
Typical single-stage gain only 10 – 15 dBInter-stage match now required to match input impedance of 2nd
stage to desired output impedance of 1st stage. Problems with matching circuits:
Large matching ratios → high Q circuits for simple L matchesMulti-segment matches use valuable real estate, add cost
Transistor itself maters – a lot!Many parallel transistorBallasting, balancing and layout extremely important
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RF IF
High-efficiency PAsInput signal swing turns on transistor – conduction for only part of sinusoidal period
I Dor
I C (m
A/m
m)
VDS or VCE (V)
IMAX
Quiescent point:Class AB to B
Class A
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RF IF
High-Efficiency PAs
ωtI D
or I CClass A:
π 2π 3πI D
or I CClass AB:
ωtπ 2π 3π
I Dor
I CClass B:ωtπ 2π 3π
Conduction Angle:
α = 2π
π< α < 2π
α = π
Class C: α < π
α
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RF IF
High-Efficiency PAs
Assume output match will filter out non-linearities caused by discontinuous conduction:
VB1
50 Ω
outputmatchinput
match
50Ω transformed to RL,opt:
All harmonics filtered out
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RF IF
High-Efficiency PAs
If all harmonics filtered out, then voltage output at load is a pure sinusoid, despite discontinuous conduction
ωtV OU
T
π 2π 3π
I C
ωtπ 2π 3π
IMAX
Energy stored in reactive elements delivers current to the load during transistor off-portion of cycle
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RF IF
High-Efficiency PAs
Now consider peak efficienciesCalculate fundamental component of current*
* There are many texts which cover reduced-conduction angle calculations. See for example PrinciplesOf Power Electronics, Kassakian, Schelcht and Verghese, Ch. 3.
I C
ωt2πα/2
Ipk = IMAX − IQIMAX
IQ
(1/2π)∫α/2
− α/2IQ + Ipk cos(ωt) dωtIdc =
(1/π) ∫α/2
− α/2Ipk cos(ωt) cos(nωt) dωtIn =
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RF IF
High-Efficiency PAs
From phasor plot: cos(α/2) = − IQ / Ipk = − IQ / (IMAX – IQ) Put it all together and do the math, you get:
Assume VOUT the same for all classes:
I1,0-p =α – sinα
1 – cos(α/2)
IMAX
2π
Idc =2sin(α/2) – αcos(α/2)
1 – cos(α/2)
IMAX
2π
V1,0-p = VPOS
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RF IF
High-Efficiency PAs
Summary of PA “ideal” peak efficiencies
Class A:(IMAX /2) /√2 ⋅ VPOS /√2
(IMAX /2) ⋅VPOS
P1
Pdc= = 50 %
Class B:(IMAX /2) /√2 ⋅ VPOS /√2
(IMAX /π) ⋅VPOS
P1
Pdc= = 78 %
Class C: Ideally can go to 100%, but P1 drops steadily beyond α=π, goes to 0 at 100%!
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RF IF
High-Efficiency PAs
What happened to our load line? For class B fundamental RL,opt = VPOS/(IMAX/2) – Didn’t change
I Dor
I C (m
A/m
m)
VDS or VCE (V)
IMAX
Class A
2VPOSVPOS
?
Class B is here!
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RF IF
High-Efficiency PAs
What happened to our load line? For class B fundamental RL,opt = VPOS/(IMAX/2) – Didn’t change
I Dor
I C (m
A/m
m)
VDS or VCE (V)
IMAX
Class A
2VPOSVPOS
Class B is here!
quasi-static In quasi-staticpicture, resistance presented to transistor output cut in half. But average resistance is the same for class A
IMAX /2
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RF IF
High-Efficiency PAs
Now consider “linearity”Clearly the current waveforms are far from linear
BUT …Overall POUT vs. PIN transfer function can still be quite linear, especially for true Class B where output current waveform is symmetrical with respect to input waveform
I Dor
I C
ωtπ 2π 3π
Because conduction angle is constant,POUT changes proportional to PIN
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RF IF
Real-World Design Example
IDEAL: Design each stage independentlyDetermine required gain – number of stagesDetermine POUT for each stageDetermine RL,opt for each stageDetermine input impedance for each stageDesign matching networks for inter-stage, load and input
REALITY:IMAX doesn’t scale nicely with transistor size. Without good IMAXnumbers, can’t determine RL,opt. Need to do load-pull.Even load pull measurements have limited accuracy for very large transistorsDesigns are very empirically driven!
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RF IF
Real-World Design Example
GSM 900 MHz, GaAs HBT PA DesignPOUT = 33 dBm (linear) = 2 W
VCC = 3.5VRLOAD = VCC
2 / 2*POUT = 3 ΩIMAX = 2*VCC /RLOAD = 2.33 A
(Note: expect saturated power to be ~ 35 dBm)Input power: constant-envelope +5 dBmGain = POUT – PIN = 27 dB. Expect roughly 10 dB per stage
3 STAGE DESIGN
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Real-World Design Example
Stage 1: Gain = 10 dB → POUT = 15 dBmRL1 = VCC
2 / 2*POUT = 194 ΩIMAX = 2*VCC /RLOAD = 36 mAChose class A: IDC = IMAX/2 = 18 mA(18 mA insignificant compared to 2.33 A)
Stage 2: Gain = 10 dB → POUT = 25 dBmRL2 = 19.4 ΩIMAX = 360 mAStill probably class A (maybe AB): IDC = IMAX/2 = 180 mA
Stage 3: Gain = 7 dB → POUT = 33 dBmRL2 = 3 Ω, IMAX = 2.33 AClass B: IDC = IMAX/π= 742 mA
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RF IF
Real-World Design Example
A note on “Gain” Taking a very simplistic view of common emitter stages:
gm1 = IC / VTh = 18 mA / 0.025 V = 0.696 Sgm1RL1 = 0.696 ⋅194 = 135 → NOT 10 dB!
BUT …re1 = 1/gm1 = 1.44 Ωre2 = 1/gm2 = 0.144 Ωre3 = 1/gm3 = 0.035 Ω
1. Remember it’s power gain, not voltage gain. Can lose voltage at input match.
2. It’s pretty tough not to get significant degeneration!
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RF IF
Real-World Design Example
Efficiency calculations:IDC1 = 18 mA, IDC2 = 180 mA, IDC3 = 742 mATotal DC Current: 940 mA
Realistically may get as high as 55%
(IMAX /2) /√2 ⋅ VPOS /√2
IDC⋅VPOS
P1
Pdc= = 62 %
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RF IF
Real-World Design Example: Load-Pull
After initial “guesses” at transistor sizes, load-pull to determine actual target load for matching circuits
VB
RF input
ZL
Load pull: Vary ZLPlot contours ofconstant power
PMAX
PMAX – 1dB
PMAX – 2dB
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RF IF
Real-World Design Example: Load-pull
Notes on load-pulling:Most accurate on probe station, but insertion loss of probes prevents it from being useful for large transistors(“Insertion loss” is RF code word for resistance)Bonded devices on evaluation board must be carefully de-embeddedEven using electronic tuners, accuracy is poor for very large transistor (i.e. for loads in the 2 – 5 Ω range)
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RF IF
Real-World Design Example: The Circuit
VB1
VB2
50 ΩRF input
VPOS
VB2
GaAs die
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RF IF
Real-World Design Example: The Circuit
VB1
VB2
50 ΩRF input
VPOS
VB2
Inter-stagematch
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RF IF
Real-World Design Example
VB1
VB2
50 ΩRF input
VPOS
VB2
LBOND+ TL
printedinductor
LBOND + LVIA
Lparasitic+ LVIA
LBOND+ TL LBOND
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RF IF
Real-World Design Example
VB1
VB2
50 ΩRF input
VPOS
VB2
may needto add feedback
for stability
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RF IF
Real-World Design Example: Tuning
Example of inter-stage match, 1st to 2nd stageRL1 = 194 Ω (?)
ZIN2 = 30 – j10 (?)
RL1ZIN2
Transmission line
Bond wire
Both are reallyjust guesses
* Go to Winsmith: test
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RF IF
Real-World Design Example: Tuning
Example of inter-stage match, 2nd to 3rd stageRL2 = 19.4 Ω ZIN3 = 2 – j2
RL2 ZIN3
Transmission line
Bond wire
* Go to Winsmith: test2Bond wires
Off-chip
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RF IF
System Specifications
Ruggedness50 Ω load is for antenna in free space. Place antenna on a metal plate and can easily get VSWR of 4:1Typical PA specs are: don’t oscillate at up to 4:1, survive up to 10:1 (!)
t = t2
V1−
V1
zt = t1
V1+
V1− = Γ⋅V1
+
t
V1
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RF IF
System Specifications
LinearityFor linear PAs, Adjacent Channel Power Ratio (ACPR) is very important
raised cosine filter
Pow
er S
pect
ral
Den
sity
(PSD
)(d
Bm
/Hz)
ch.A
ch.B
ch.C
fc fc+∆ffc−∆f
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45
RF IF
System Specifications
LinearityFor linear PAs, Adjacent Channel Power Ratio (ACPR) is very important
Pow
er S
pect
ral
Den
sity
(PSD
)(d
Bm
/Hz)
ch.A
ch.B
ch.C
fc fc+∆ffc−∆f
3rd order distortion
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46
RF IF
System Specifications
LinearityFor linear PAs, Adjacent Channel Power Ratio (ACPR) is very important
Pow
er S
pect
ral
Den
sity
(PSD
)(d
Bm
/Hz)
ch.A
ch.B
ch.C
fc fc+∆ffc−∆f
3rd order distortion
3rd order distortion
5th order distortion
5th order distortion
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47
RF IF
System Specifications
LinearityFor linear PAs, Adjacent Channel Power Ratio (ACPR) is very important
Pow
er S
pect
ral
Den
sity
(PSD
)(d
Bm
/Hz)
fc fc+∆ffc−∆f
30 kHz∆f
ACPR =Pwr. Ch. B
Pwr. Ch. A
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48
RF IF
System Specifications
LinearityFor non-linear PA in TDMA systems, harmonic spurs and switching transients are most common measure of linearity
time
P OU
T(d
Bm)
577µsGSM burst
Signal ramping profile must fall within time mask
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49
RF IF
System Specifications
Noise in receive band: Obvious spec. in systems where Tx and Rx are operating at the same time (FDD)
Pow
er S
pect
ral
Den
sity
(PSD
)(d
Bm
/Hz)
30 kHz30 kHz
45 MHz
RxTx
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50
RF IF
System Specifications
Noise in receive band: Obvious spec. in systems where Tx and Rx are operating at the same time (FDD)Not so obvious spec in TDD system. Problem primarily of mixing by the PA (2ω2 – ω1 or ω2 – ω1 )
Pow
er S
pect
ral
Den
sity
(PSD
)(d
Bm
/Hz)
45 MHz
RxTx
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51
RF IF
Power Control
For linear PA, expected to operate at constant gain. Power control is therefore a function of PIN. Role of bias circuitry is to maintain constant gain over PIN, temperature (PTAT?).
Power transistor
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RF IF
Power Control
For non-linear PA, expected to operate at constant PIN. Power control is achieved by varying gain.
VAPC
Power transistor
On-chipbias circuitry
Externalcontrol signal