Revision1.6.0as of 2019-11-11 Firmware2 (build 834 ... · Revision1.6.0as of 2019-11-11 Firmware2...

Revision 1.6.0 as of 2019-11-11Firmware 2 (build 834), Driver v1.4.1

cronologic GmbH & Co. KGJahnstraße 4960318 Frankfurt am MainGermany

cronologic

xTDC4User Guide

Contents

1 Introduction 11.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

2 Hardware 22.1 Installing the Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22.2 xTDC4-PCIe Inputs and Connectors . . . . . . . . . . . . . . . . . . . . . . . . . 2

2.2.1 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22.3 xTDC4-PCIe Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.3.1 Grouping and Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52.3.2 Auto Triggering Function Generator . . . . . . . . . . . . . . . . . . . . . 52.3.3 Timing Generator (TiGeR) . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.4 Performing a firmware update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72.5 Calibrating the Carry-Chain TDC . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3 Driver Programming API 93.1 Constants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93.2 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

3.2.1 Structure xtdc4 init parameters . . . . . . . . . . . . . . . . . . . . . . . . 93.3 Status Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.3.1 Functions for Information Retrieval . . . . . . . . . . . . . . . . . . . . . . 113.3.2 Structure xtdc4 static info . . . . . . . . . . . . . . . . . . . . . . . . . . . 113.3.3 Structure xtdc4 param info . . . . . . . . . . . . . . . . . . . . . . . . . . 123.3.4 Structure xtdc4 fast info . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.4 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133.4.1 Structure xtdc4 configuration . . . . . . . . . . . . . . . . . . . . . . . . . 143.4.2 Structure xtdc4 trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163.4.3 Structure xtdc4 tiger block . . . . . . . . . . . . . . . . . . . . . . . . . . 163.4.4 Structure xtdc4 channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.5 Run Time Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.6 Readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.6.1 Input Structure xtdc4 read in . . . . . . . . . . . . . . . . . . . . . . . . . 183.6.2 Input Structure xtdc4 read out . . . . . . . . . . . . . . . . . . . . . . . . 18

3.7 Packet Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.7.1 Output Structure crono packet . . . . . . . . . . . . . . . . . . . . . . . . 19

4 C Example 21

5 Technical Data 255.1 TDC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.2.1 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 255.2.2 Environmental Conditions for Operation . . . . . . . . . . . . . . . . . . . 255.2.3 Environmental Conditions for Storage . . . . . . . . . . . . . . . . . . . . 255.2.4 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

i

5.2.5 Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265.3 Information Required by DIN EN 61010-1 . . . . . . . . . . . . . . . . . . . . . . 26

5.3.1 Manufacturer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265.3.2 Intended Use and System Integration . . . . . . . . . . . . . . . . . . . . 275.3.3 Cooling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275.3.4 Environmental Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 275.3.5 Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285.3.6 Recycling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

6 Revision History 296.1 Firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296.2 Driver & Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296.3 User Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

ii

1 Introduction

The xTDC4-PCIe is a common-start time-to-digital converter. The timestamps of leading ortrailing edges of digital pulses are recorded. The xTDC4-PCIe produces a stream of outputpackets, each containing data from a single start event, i.e. the relative timestamps of all stoppulses that occur within the user defined range.

1.1 Features

4 channel common start TDC with 8 ps resolution

Standard Range: 218 µs (24 bit timestamp)

Extended Range: 13, 975 µs

Bin size: approx. 13 ps

Double pulse resolution: 5 ns

Dead time between groups: none

Maximum start rate: 4 MHz

L0 FIFO: 15 words/channel

L1 FIFO: 512 words/channel

L2 FIFO: 10000 words

PCIe 1.1 x1 with 200 MB/s throughput

1

2 Hardware

2.1 Installing the Board

The xTDC4-PCIe board can be installed in any x1 (or higher amount of lanes) PCIe slot. Makesure the PC is powered off and the main power connector is disconnected while installing theboard.

2.2 xTDC4-PCIe Inputs and Connectors

2.2.1 Connectors

The inputs of the xTDC4-PCIe are located on the PCIe bracket. Figure 2.3 on page 3 shows thelocation of the start input S and the four stop inputs A to D. Lemo-00 connectors are used for

Stop A-D Start

Figure 2.1: Input connectors of the xTDC4-PCIe located on the PCIe bracket.

Lemo 00 connector

dc-offset[i]

DA

C

+

-503.

3V

Figure 2.2: Input circuit for each of the five input channels.

input connection. The inputs are AC-coupled and have an impedance of 50Ω - a schematic ofthe input circuit is shown in Figure 2.2 on page 2. The digital trigger threshold can be adjusted

2

in order to comply with a manifold of single ended signal standards enabling the acquisition ofpositive or negative pulses.

The active termination can be used to generate DC-coupled pulses for automatic internaltriggering and control of external devices.

B

C2

C1S

S

C

D

A

C3

Figure 2.3: Schematic view of a xTDC4-PCIe board showing inter-board connectors C1 and C2.

Furthermore, three board interconnection connectors can be found at the top edge of thexTDC4-PCIe board, as displayed in Figure 2.3 on page 3. Connector C1 (labelled J25 on theboard) is reserved for future use. The pinout of connector C2 (labelled J12 on the board) isgiven in Table 2.1 and the pinout of connector C3 (labelled as J6 on the board) is depicted inTable 2.2.

cronologic GmbH & Co. KG 3 xTDC4-PCIe User Guide

Pin Name

1, 2 GND

3, 4 external CLK in N, external CLK in P

5, 6 GND

7, 8 reserved/NC

9, 10 GND

11, 12 reserved/NC

13, 14 GND

15, 16 reserved/NC

17, 18 GND

19, 20 reserved/NC

21, 22 GND

23, 24 reserved/NC

25, 26 GND

27, 28 reserved/NC

29, 30 GND

31, 32 reserved/NC

33, 34 GND

Table 2.1: Pinout of connector C2.

Pin Name

1 +3.3 V

2 - 9 reserved/NC

10 GND

Table 2.2: Pinout of connector C3.


2.3 xTDC4-PCIe Functionality

The xTDC4-PCIe is a “classic” common start time-to-digital converter. It records the timedifference between leading or trailing edges on the start input and the stop inputs. Each stopchannel A-D can be enabled individually. The accuracy of the acquired timestamps is approx.8 ps. The timestamps are recorded in integer multiples of a bin size of 13.02083 ps (76.8 GHz).The data acquisition can be limited to rising or falling signal transitions. Transitions of theinput signals are called hits. To reliably detect hits the signal has to be stable for at least500 ps before and after the edge. Between multiple hits on a stop channel a deadtime of approx.5 ns occurs. Within this deadtime further hits on the stop channel are reported with a coarsetimestamp only. The maximum trigger rate on the start channel is 4 MHz.

2.3.1 Grouping and Events

In typical applications a start hit is followed by a manifold of hits on e.g. a detector. Thehits recorded are managed in groups (which are called in some applications “events”). Figure2.4 shows a corresponding timing diagram. The user can define the range of a group, i.e. thetime window within which hits on the stop channels are recorded, in software. Hits occurringoutside of that time window are discarded. The maximum recording range for a group is 218 µs.Different ranges can be set for each of the 4 stop channels by setting corresponding channel.startand channel.stop values in the channel configuration. The values need to be set as multiples of13.02083 ps. A value of 768 corresponds, for example to a time of 10 ns.

Start

A

B

C

Dchannel[i].start

channel[i].stop

Figure 2.4: Acquired hits are merged to groups as explained in the text.

2.3.2 Auto Triggering Function Generator

Some applications require internal periodic or random triggering. The xTDC4-PCIe functiongenerator provides this functionality.

The delay between two trigger pulses of this trigger generator is the sum of two components:A fixed value M and a pseudo random value given by the exponent N.

The period is

T = 1 +M + [1...2N ] (2.1)


clock cycles with a duration of 6.6ns per cycle.

The trigger can be used as a source for the TiGeR unit (see Section 2.3.3).

2.3.3 Timing Generator (TiGeR)

Each LEMO-00 input can be used as a LVCMOS trigger output. The TiGeR function can beconfigured independently for each LEMO-00 connector. Each TiGeR block can use an arbitrarycombination of inputs to trigger its state machine including the AutoTrigger. See Section 3.4.3for a full description of the configuration options.

TiGer Example: Generate 200 kHz Start Pulse

The AutoTrigger is used to generate a 200 kHz period. The TiGeR generates a 200 kHz signalwith 13.2ns pulse width on LEMO-00 output Start.

1 // generate an i n t e r n a l 200 kHz t r i g g e r2 c o n f i g . a u t o t r i g g e r p e r i o d = 750 ;3 c o n f i g . a u t o t r i g g e r r a n d o m e x p o n e n t = 0 ;4

5 // setup TiGeR6 c o n f i g . t i g e r b l o c k [ 0 ] . e n a b l e = 1 ;7 c o n f i g . t i g e r b l o c k [ 0 ] . s t a r t = 0 ;8 c o n f i g . t i g e r b l o c k [ 0 ] . s t o p = c o n f i g . t i g e r b l o c k [ 0 ] . s t a r t + 1 ;9 c o n f i g . t i g e r b l o c k [ 0 ] . n e g a t e = 0 ;

10 c o n f i g . t i g e r b l o c k [ 0 ] . e n a b l e l e m o o u t p u t = 1 ;11 c o n f i g . t i g e r b l o c k [ 0 ] . s o u r c e s = XTDC4 TRIGGER SOURCE AUTO ;12

13 // i f TiGeR i s used f o r t r i g g e r i n g with p o s i t i v e p u l s e s14 c o n f i g . d c o f f s e t [ 0 ] = XTDC4 DC OFFSET P LVCMOS 18 ;

TiGer Example: Generate Common-Start from Stops

A trigger event on any Stop channel is used to generate the next event on the Start channel.The start value of the TiGeR block should be set so that the pulse occurs after the last stopevent of the group.

1 c o n f i g . t i g e r b l o c k [ 0 ] . e n a b l e = 1 ;2 c o n f i g . t i g e r b l o c k [ 0 ] . s t a r t = 16 ;3 c o n f i g . t i g e r b l o c k [ 0 ] . s t o p = c o n f i g . t i g e r b l o c k [ 0 ] . s t a r t + 1 ;4 c o n f i g . t i g e r b l o c k [ 0 ] . n e g a t e = 0 ;5 c o n f i g . t i g e r b l o c k [ 0 ] . e n a b l e l e m o o u t p u t = 1 ;6 // an event on any o f the channe l s A − D s t a r t s7 c o n f i g . t i g e r b l o c k [ 0 ] . s o u r c e s = XTDC4 TRIGGER SOURCE A |←

XTDC4 TRIGGER SOURCE B |XTDC4 TRIGGER SOURCE C |XTDC4 TRIGGER SOURCE D ;8

9 // i f TiGeR i s used f o r t r i g g e r i n g with p o s i t i v e p u l s e s10 c o n f i g . d c o f f s e t [ 0 ] = TIMETAGGER4 DC OFFSET P LVCMOS 18 ;


2.4 Performing a firmware update

After installing the xTDC4-PCIe device driver, a firmware update tool is available. By choosing“FirmwareGUI.exe” a firmware update can be performed. After invoking the application awindow as shown in Figure 2.5 will appear. The tool can be used for updating the firmware andto create a backup of the on-board calibration data of the xTDC4-PCIe unit. If several boardsare present, the one which is going to be used can be selected in the upper left corner of thewindow. Pressing the “Backup” buttons a backup of the firmware or the calibration data will becreated, respectively. In order to perform a firmware update, chose the “.cronorom”-file to usedby pressing “Browse”. The file contains the firmware data. By pressing “Flash” the firmware iswritten to the board. “Verify” can be used to compare the firmware data stored on the xTDC4-PCIe to the one inside a file. “Flash All” and “Verify All” perform the corresponding operationon all boards which are installed.

Figure 2.5: The firmware update and calibration data backup tool as provided with the xTDC4-PCIe device driver.

Important note: The new firmware will only be used after a power cycle, i.e. after switchingthe PC (or Ndigo crate) off and back on. A simple reboot is not sufficient. Therefore theinformation shown in the upper half of the application window does not change right afterflashing a new firmware.

2.5 Calibrating the Carry-Chain TDC

After each update of the xTDC4-PCIe firmware the Carry-Chain TDC has to be calibrated. Be-fore calibration make sure to power-cycle the system after updating the xTDC4-PCIe firmware.The calibration is done with the tool “XTDC4Calibration.exe” (see Figure 2.6) which is avail-able after installing the xTDC4-PCIe device driver. Connect an external pulse signal to theStart and channel inputs. The signal should be low active. The pulse low and high width has tobe at least 10ns each. Use “Calibrate” to start the calibration procedure. Follow the on-screeninstructions to gather calibration data on all channels. When all channels are calibrated use“Write” to permanently store the calibration data in the xTDC4’s on-board flash.


Figure 2.6: The xTDC4-PCIe Carry Chain TDC calibration tool.


3 Driver Programming API

The API is a DLL with C linkage.

The functions provided by the DLL are declared in xTDC4 interface.h.

3.1 Constants

#define xTDC4 CHANNEL COUNT 4The number of TDC input channels.

#define xTDC4 TIGER COUNT 5The number of timing generators. One for each TDC input and one for the Start input.

#define xTDC4 TRIGGER COUNT 16The number of potential trigger sources for the timing generators. One for each TDC input,one for the Start input plus some specials. Not all triggeer sources are available on the LEMOvariant of the xTDC4-PCIe. See Section 3.4.3 for details.

3.2 Initialization

int xtdc4 close(xtdc4 device *device)Finalizes the driver for this device.

int xtdc4 count devices(int *error code, char **error message)Returns the number of boards that are supported by this driver in the system.

int xtdc4 get default init parameters(xtdc4 init parameters *init)Sets up the standard parameters. Gets a set of default parameters for xtdc4 init(). This mustalways be used to initialize the xtdc4 init parameter() structure.

xtdc4 device *xtdc4 init(xtdc4 init parameters *params, int *error code, char **error message)Opens and initializes the xTDC4-PCIe board with the given index. With error code and er-ror message the user must provide pointers where to buffers where error information should bewritten by the driver.

Params is a structure of type xtdc4 init parameters that must be completely initialized.

3.2.1 Structure xtdc4 init parameters

int versionThe version number. Must be set to XTDC4 API VERSION.

int card indexThe index in the list of xTDC4-PCIe boards that should be initialized.

9

There might be multiple boards in the system that are handled by this driver as reported byxtdc4 count devices. This index selects one of them. Boards are enumerated depending on thePCIe slot. The lower the bus number and the lower the slot number the lower the card index.

int board idthe global index in all cronologic devices.This 8 bit number is filled into each packet created by the board and is useful if data streams ofmultiple boards will be merged. If only xTDC4-PCIe cards are used this number can be set to thecard index. If boards of different types that use a compatible data format are used in a systemeach board should get a unique id. Can be changed with int xtdc4 set board id(xtdc4 device*device, int board id).

int64 buffer size[8]The minimum size of the DMA buffer.If set to 0 the default size of 16 MByte is used. For the xTDC4-PCIe only the first entry is used.

int buffer typeThe type of buffer. Can be either allocated (only option currently) or physical.

#define XTDC4 BUFFER ALLOCATE 0

#define XTDC4 BUFFER USE PHYSICAL 1

int64 buffer addressThe start address of the reserved memory.The buffers will be allocated with the sizes given above. Make sure that the memory is largeenough.

int variantSet to 0. Can be used to activate future device variants such as different base frequencies.

int device typeA constant for the different devices of cronologic CRONO DEVICE *.Initialized by xtdc4 get default init parameters(). Must be left unchanged.

#define CRONO DEVICE HPTDC 1

#define CRONO DEVICE NDIGO5G 2

#define CRONO DEVICE NDIGO250M 4

#define CRONO DEVICE xTDC4 6

#define CRONO DEVICE TIMETAGGER4 8

int dma read delayThe update delay of the writing pointer after a packet has been send over PCIe. The base unitis 16 to 32 ns. Should not be changed by the user.

int use ext clockIf set to 1 use external 10 MHz reference. If set to 0 use internal reference.


3.3 Status Information

3.3.1 Functions for Information Retrieval

The driver provides functions to retrieve detailed information on the type of board, its configu-ration, settings and state. The information is split according to its scope and the computationalrequirements to query the information from the board.

int xtdc4 get driver revision()Returns the driver version, same format as xtdc4 static info::driver revision. This function doesnot require a present xTDC4-PCIe device.

const char* xtdc4 get driver revision str()Returns the driver version including SVN build revision as a string. This function does notrequire a present xTDC4-PCIe device.

int xtdc4 get fast info(xtdc4 device *device, xtdc4 fast info *info)Returns fast dynamic information.This call gets a structure that contains dynamic information that can be obtained within a fewmicroseconds.

int xtdc4 get param info(xtdc4 device *device, xtdc4 param info *info)Returns configuration changes.Gets a structure that contains information that changes indirectly due to configuration changes.

int xtdc4 get slow info(xtdc4 device *device, xtdc4 slow info *info)Returns slow dynamic information.The data reported in this structure requires milliseconds to be obtained. The application shouldonly call it in situation where the program flow can cope with an interruption of that magnitude.

int xtdc4 get static info(xtdc4 device *device,xtdc4 static info *info)Contains static information.Gets a structure that contains information about the board that does not change during runtime.

3.3.2 Structure xtdc4 static info

This structure contains information about the board that does not change during run time. Itis provided by the function xtdc4 get static info.

int sizeThe number of bytes occupied by the structure.

int versionThe version number.

int board idID of the board.This value is passed to the constructor. It is reflected in the output data.

int driver revisionEncoded version number.The lower three bytes contain a triple level hierarchy of version numbers, e.g. 0x010103 encodesversion 1.1.3.


A change in the first digit generally requires a recompilation of user applications. Change in thesecond digit denote significant improvements or changes that don’t break compatibility and thethird digit changes with minor bug fixes and similar updates.

int firmware revisionRevision number of the FPGA configuration.

int board revisionBoard revision number.The board revision number can be read from a register. It is a four bit number that changeswhen the schematic of the board is changed.

0: Experimental first board version. Labeled ”Rev. 1”

1: First commercial version. Labeled ”Rev. 2”

int board configurationDescribes the schematic configuration of the board.The same board schematic can be populated in multiple variants. This is a four bit code thatcan be read from a register.

int subversion revisionSubversion revision id of the FPGA configuration.

int chip id16 bit factory ID of the TDC chip.

int board serialSerial number.With year and running number in 8.24 format. The number is identical to the one printed onthe silvery sticker on the board.

unsigned int flash serial highhigh 32 bits of 64 bit manufacturer serial number of the flash chip.

unsigned int flash serial lowlow 32 bits of 64 bit manufacturer serial number of the flash chip

int flash validIf not 0 the driver found valid calibration data in the flash on the board and is using it.

3.3.3 Structure xtdc4 param info

This struct contains configuration changes provided by xtdc4 get param info().



double binsize Bin size (in ps) of the measured TDC data. The TDC main clock is running ata frequency of 76.8 GHz resulting in a bin size of ≈ 13.0208ps.

int board idBoard ID.The board uses this ID to identify itself in the output data stream. The ID takes values between


0 and 255.

int channelsNumber of channels in the current ADC mode.Can take values 1, 2 and 4.

int channel maskBit assignment of each enabled input channel.Mask assigns a certain bit to each enabled input channel.

int64 total bufferThe total amount of DMA buffer in bytes.

3.3.4 Structure xtdc4 fast info



int tdc rpmSpeed of the TDC fan. Reports 0 if no fan is present.

int fpga rpmSpeed of the FPGA fan. Reports 0 if no fan is present.

int alertsAlert bits from temperature sensor and the system monitor.

bit 0: TDC temperature alert (> 141C)

int pcie pwr mgmt

int pcie link widthNumber of PCIe lanes the card uses.

int pcie max payloadMaximum size in bytes for one PCIe transaction. Depends on system configuration.

3.4 Configuration

The device is configured with a configuration structure. The user should first obtain a structurethat contains the default settings of the device read from an on board ROM , than modify thestructure as needed for the user application and use the result to configure the device.

int xtdc4 configure(xtdc4 device *device, xtdc4 configuration *config)Configures the xTDC4-PCIe device.

int xtdc4 get current configuration(xtdc4 device *device, xtdc4 configuration *config)Gets current configuration. Copies the current configuration to the specified config pointer.

int xtdc4 get default configuration(xtdc4 device *device, xtdc4 configuration *config)Gets default configuration. Copies the default configuration to the specified config pointer.


3.4.1 Structure xtdc4 configuration

This is the structure containing the configuration information. It is used in conjunction withxtdc4 get default configuration(), xtdc4 get current configuration() and xtdc4 configure().

It uses internally the structures xtdc4 tiger block and xtdc4 trigger.


int versionA version number that is increased when the definition of the structure is changed. The incre-ment can be larger than one to match driver version numbers or similar. Set to 0 for all versionsup to first release.

int tdc modeTDC mode. Can be grouped or continuous. Currently supported: grouped.

crono bool t start rising Rising or falling edge trigger.

double dc offset[XTDC4 CHANNEL COUNT + 1]Set the switching voltage for the input channels S, A - D (see figure 3.1).

dc offset[0] : Start

dc offset[1 - 4] : A - D

Supported range is -1.32V to +1.18V. This should be close to 50% of the height of the inputpulse. Examples for various signaling standards are defined as follows


Lemo 00 connector

dc-offset[i]

DA

C

+

-503.

3V

Figure 3.1: Input circuit for each of the five input channels. Both inputs of the buffer are biasedat 1.32V by default.

#define DC OFFSET P NIM +0.35

#define DC OFFSET P CMOS +1.18

#define DC OFFSET P LVCMOS 33 +1.18



#define DC OFFSET P TTL +1.18

#define DC OFFSET P LVTTL 33 +1.18

#define DC OFFSET P LVTTL 25 +1.18

#define DC OFFSET P SSTL 3 +1.18

#define DC OFFSET P SSTL 2 +1.18

#define DC OFFSET N NIM -0.35

#define DC OFFSET N CMOS -1.32

#define DC OFFSET N LVCMOS 33 -1.32



#define DC OFFSET N TTL -1.32

#define DC OFFSET N LVTTL 33 -1.32

#define DC OFFSET N LVTTL 25 -1.25

#define DC OFFSET N SSTL 3 -1.32

#define DC OFFSET N SSTL 2 -1.25

The inputs are AC coupled. Thus, the absolute voltage is not important for pulse inputs. It isthe relative pulse amplitude that causes the input circuits to switch. dc offset must be set to therelative switching voltage for the input standard in use. If the pulses are negative, a negativeswitching threshold must be set and vice versa.


xtdc4 trigger trigger[XTDC4 TRIGGER COUNT]Configuration of the external trigger sources.

xtdc4 tiger block tiger block[XTDC4 TIGER COUNT] Configuration of the timing generator(TiGeR).

xtdc4 channel channel[XTDC4 CHANNEL COUNT]Configure polaritiy, type and threshold for the TDC channels.

xtdc4 lowres channel lowres channel[XTDC4 LOWRES CHANNEL COUNT]Not applicable for the LEMO variant of the xTDC4-PCIe, only available for xTDC4-Sciex.Configure polarity, type and threshold for the digital channels.

int auto trigger periodint auto trigger random exponentCreate a trigger either periodically or randomly. There are two parameters M = trigger periodand N = random exponent that result in a distance between triggers of T clock cycles.

T = 1 +M + [1...2N ] (3.1)

0 ≤M < 232 (3.2)

0 ≤ N < 32 (3.3)

There is no enable or reset as the usage of this trigger can be configured in the TiGer blockchannel source field.

3.4.2 Structure xtdc4 trigger

crono bool t fallingTriggers on falling edges.

crono bool t risingTriggers on rising edges.

3.4.3 Structure xtdc4 tiger block

crono bool t enableActivates the timing generator (TiGer).

crono bool t negateInverts output polarity. Default is set to false.

crono bool t retriggerEnables/disables retrigger setting.Default is set to false. If retriggering is enabled the timer is reset to the value of the startparameter, whenever the input signal is set while waiting to reach the stop time.

crono bool t extendNot implemented.

crono bool t enable lemo outputEnables the LEMO output.


int startPrecursor. Relative to the trigger signal, the data is delayed by the ’start’ time interval in unitsof 6.6 ns (150MHz). Thus, also data prior to the trigger event is recorded.

int stopPostcursor.For edge triggering: this is the total length of the recorded signal.

int sourcesA bit mask with a bit set for all trigger sources that can trigger this channel. Default isXTDC4 TRIGGER SOURCE S.

#define XTDC4 TRIGGER SOURCE S 0x00000001

#define XTDC4 TRIGGER SOURCE A 0x00000002

#define XTDC4 TRIGGER SOURCE B 0x00000004

#define XTDC4 TRIGGER SOURCE C 0x00000008

#define XTDC4 TRIGGER SOURCE D 0x00000010

#define XTDC4 TRIGGER SOURCE AUTO 0x00004000

#define XTDC4 TRIGGER SOURCE ONE 0x00008000

3.4.4 Structure xtdc4 channel

Contains TDC channel settings.

crono bool t enabledEnable TDC channel.

crono bool t risingSet whether to record rising or falling edges.

crono bool t cc enableEnable carry chain TDC. Default is true as initialized by xtdc4 get default configuration(). Shallbe left unchanged.

crono bool t cc same edgeSet whether the carry chain TDC records the same edge as THS788 (as backup) or oppositeedge. Default is true as initialized by xtdc4 get default configuration(). Shall be left unchanged.

crono bool t ths788 disableDisable THS788 timestamps. Default is false as initialized by xtdc4 get default configuration().Shall be left unchanged.

int startVeto function. Only timestamps posterior to ‘start’ are recorded.

int stopVeto function. Only timestamps prior to ‘stop’ are recorded.


3.5 Run Time Control

int xtdc4 continue capture(xtdc4 device *device)Call this to resume data acquisition after a call to xtdc4 pause capture().

int xtdc4 pause capture(xtdc4 device *device)Pause data acquisition.

int xtdc4 start capture(xtdc4 device *device)Start data acquisition.

int xtdc4 start tiger(xtdc4 device *device)Start timing generator.

int xtdc4 stop capture(xtdc4 device *device)Stop data acquisition.

int xtdc4 stop tiger(xtdc4 device *device)Stop timing generator.

3.6 Readout

int xtdc4 acknowledge(xtdc4 device *device, crono packet *packet)Acknowledges the processing of the last read block. This is only necessary if xtdc4 read() is notcalled.This feature allows to either free up partial DMA space early if there will be no call to xtdc4 readanytime soon. It also allows to keep data over multiple calls to xtdc4 read to avoid unnecessarycopying of data.

int xtdc4 get device typeReturns the type of the device. Either CRONO DEVICE XTDC45G or CRONO DEVICE XTDC4250M

const char* xtdc4 get last error message(xtdc4 device *device)Returns most recent error message.

int xtdc4 read(xtdc4 device *device, xtdc4 read in *in, xtdc4 read out *out)Return a pointer to an array of captured data in read out. The result can contain any numberof packets of type xtdc4 packet. read in provides parameters to the driver. A call to this methodautomatically allows the driver to reuse the memory returned in the previous call.Returns an error code as defined in the structure xtdc4 read out.

3.6.1 Input Structure xtdc4 read in

xtdc4 bool t acknowledge last readIf set xtdc4 read() automatically acknowledges packets from the last read.

3.6.2 Input Structure xtdc4 read out

crono packet *first packetPointer to the first packet that was capture by the call of xtdc4 read.


crono packet *last packetAddress of header of the last packet in the buffer.

int error codeAssignments of the error codes.

#define CRONO READ OK 0

#define CRONO READ NO DATA 1

#define CRONO READ INTERNAL ERROR 2

#define CRONO READ TIMEOUT 3

const char *error message

3.7 Packet Format

3.7.1 Output Structure crono packet

unsigned char channelUnused, always 0.

unsigned char cardIdentifies the source card in case there are multiple boards present. Defaults to 0 if no value isassigned to the parameter board id in Structure ndigo init parameters.

unsigned char typeThe data stream consists of 32 bit unsigned data as signified by a value of 6.

unsigned char flags#define XTDC4 PACKET FLAG ODD HITS 1The last data word in the data array consists of one timestamp only which is located in the

lower 32 bits of the 64 bit data word (little endian).

#define XTDC4 PACKET FLAG SLOW SYNC 2Start pulse distance is larger than the extended timestamp counter range.

#define XTDC4 PACKET FLAG START MISSED 4The trigger unit has discarded packets due to a full FIFO.

#define XTDC4 PACKET FLAG SHORTENED 8The trigger unit has shortend the current packet due to full FIFO.

#define XTDC4 PACKET FLAG DMA FIFO FULL 16The internal DMA FIFO was full. Might or might not result in dropped packets.

#define XTDC4 PACKET FLAG HOST BUFFER FULL 32The host buffer was full. Might or might not result in dropped packets.

unsigned int lengthNumber of 64-bit elements (each containing up to 2 TDC hits) in the data array.

unsigned int64 timestampCoarse timestamp of the start pulse. Values are given in multiples of 1.6 ns.


unsigned int64 data[1]TDC hits. the user can cast the array to uint32* to directly operate on the TDC hits.

# bits 31 to 8 7 to 4 3 to 0

content TDC DATA FLAGS CHN

The timestamp of the hit is stored in bits 31 down to 8. Bits 7 down to 4 are hit flags:

Bits 7 + 6: Timestamp consists of FPGA timing only with 1,666 ps precision, as both theTDC and the Carry Chain TDC missed this stop event.

Bit 7: FPGA did not see the stop event: hit may be out of sequence and may belong toanother group.

Bit 6: Timestamp consists of Carry Chain TDC timing only with 150 ps precision, as theTDC missed this hit.

Bit 5: Time since start pulse is longer than timestamp counter range (218µs). If the timestampcounter range is exceeded before the next occurrence of a stop event, a data[] element with bit 5set which does not belong to a hit on any channel is added to the sequence of hits. The channelnumber for this hit is set to 15. For each overflow of the timestamp counter in a group one suchdata[] element is added to the group. The total offset of a hit can be computed by

∆Thit = # bits · 218 µs + fine timestamp

where # bits counts the number of 5th bit occurrences until the hit shows up in the group. Themaximum counter range supported by the xTDC4-PCIe hardware is 13, 975 µs.

Bit 4: Timestamp of the rising edge. Default is falling edge.

The channel number is given in the lowest nibble of the data word. A value of 0 correspondsto channel A, a value of 3 to channel D. Values 7 to 14 are reserved and 15 denotes a group timecounter overflow.


4 C Example

1 // xtdc4 use r gu ide example . cpp : Example a p p l i c a t i o n f o r the xTDC42 #inc lude ” x T D C 4 i n t e r f a c e . h”3 #inc lude ” s t d i o . h”4 #inc lude <windows . h>5

6 typedef unsigned i n t u i n t 3 2 ;7 typedef unsigned i n t 6 4 u i n t 6 4 ;8

9 i n t main ( i n t argc , char* a r g v [ ] )10 11 // prepare i n i t i a l i z a t i o n12 x t d c 4 i n i t p a r a m e t e r s params ;13 x t d c 4 g e t d e f a u l t i n i t p a r a m e t e r s (&params ) ;14 params . b u f f e r s i z e [ 0 ] = 8 * 1024 * 1024 ; // use 8 MByte as packet ←

b u f f e r15 params . b o a r d i d = 0 ; // value copied to ” card ” f i e l d o f every←

packet , a l lowed range 0 . . 2 5 516 params . c a r d i n d e x = 0 ; // i n i t i a l i z e f i r s t xTDC4−PCIe board ←

found in the system17

18 // i n i t i a l i z e card19 i n t e r r o r c o d e ;20 const char * e r r m e s s a g e ;21 x t d c 4 d e v i c e * d e v i c e = x t d c 4 i n i t (&params , &e r r o r c o d e , &e r r m e s s a g e ) ;22 i f ( e r r o r c o d e != CRONO OK)23 24 p r i n t f ( ” Could not i n i t xTDC4 : %s \n” , e r r m e s s a g e ) ;25 return (1 ) ;26 27

28 // p r in t bard in fo rmat ion29 x t d c 4 s t a t i c i n f o s t a t i c i n f o ;30 x t d c 4 g e t s t a t i c i n f o ( d e v i c e , &s t a t i c i n f o ) ;31 p r i n t f ( ” Board S e r i a l : %d.%d\n” , s t a t i c i n f o . b o a r d s e r i a l >>24, ←

s t a t i c i n f o . b o a r d s e r i a l &0 x f f f f f f ) ;32 p r i n t f ( ” Board C o n f i g u r a t i o n : %d\n” , s t a t i c i n f o . b o a r d c o n f i g u r a t i o n ) ;33 p r i n t f ( ” Board R e v i s i o n : %d\n” , s t a t i c i n f o . b o a r d r e v i s i o n ) ;34 p r i n t f ( ” Firmware R e v i s i o n : %d.%d\n” , s t a t i c i n f o . f i r m w a r e r e v i s i o n , ←

s t a t i c i n f o . s u b v e r s i o n r e v i s i o n ) ;35 p r i n t f ( ” D r i v e r R e v i s i o n : %d.%d.%d.%d\n” , ( ( s t a t i c i n f o .←

d r i v e r r e v i s i o n >>24)&255) , ( ( s t a t i c i n f o . d r i v e r r e v i s i o n >>16)&255) , ←( ( s t a t i c i n f o . d r i v e r r e v i s i o n >>8)&255) , ( s t a t i c i n f o . d r i v e r r e v i s i o n←&255) ) ;

36

37 // prepare c o n f i g u r a t i o n38 x t d c 4 c o n f i g u r a t i o n c o n f i g ;39

40 // f i l l c o n f i g u r a t i o n data s t r u c t u r e with d e f a u l t va lue s

21

41 // so that the c o n f i g u r a t i o n i s v a l i d and only parameters42 // o f i n t e r e s t have to be s e t e x p l i c i t l y43 x t d c 4 g e t d e f a u l t c o n f i g u r a t i o n ( d e v i c e , &c o n f i g ) ;44

45 // s e t c o n f i g o f the 4 TDC channe l s46 f o r ( i n t i = 0 ; i < XTDC4 CHANNEL COUNT ; i ++)47 48 // enable r e co rd ing h i t s on TDC channel49 c o n f i g . c h a n n e l [ i ] . e n a b l e d = true ;50

51 // measure f a l l i n g edge52 c o n f i g . c h a n n e l [ i ] . r i s i n g = f a l s e ;53

54 // d e f i n e range o f the group55 c o n f i g . c h a n n e l [ i ] . s t a r t = 0 ; // range beg ins r i g h t a f t e r s t a r t pu l s e56 c o n f i g . c h a n n e l [ i ] . s t o p = 30000 ; // r e co rd ing window stops a f t e r ˜50 us57 58

59 // record f a l l i n g edges on the s t a r t channel60 c o n f i g . s t a r t r i s i n g = f a l s e ;61

62 // wr i t e c o n f i g u r a t i o n to board63 e r r o r c o d e = x t d c 4 c o n f i g u r e ( d e v i c e , &c o n f i g ) ;64 i f ( e r r o r c o d e != CRONO OK)65 66 p r i n t f ( ” Could not c o n f i g u r e xTDC4 : %s \n” , e r r m e s s a g e ) ;67 return (1 ) ;68 69

70 // c o n f i g u r e readout behaviour71 x t d c 4 r e a d i n r e a d c o n f i g ;72 // automat i ca l l y acknowledge a l l data as proce s s ed73 // on the next c a l l to xtdc4 read ( )74 // o ld packet p o i n t e r s are i n v a l i d a f t e r c a l l i n g xtdc4 read ( )75 r e a d c o n f i g . a c k n o w l e d g e l a s t r e a d = 1 ;76

77 // s t r u c t u r e with packet p o i n t e r s f o r read data78 x t d c 4 r e a d o u t r e a d d a t a ;79

80 // s t a r t data capture81 i n t s t a t u s = x t d c 4 s t a r t c a p t u r e ( d e v i c e ) ;82 i f ( s t a t u s != CRONO OK) 83 p r i n t f ( ” Could not s t a r t c a p t u r i n g %s ” , x t d c 4 g e t l a s t e r r o r m e s s a g e (←

d e v i c e ) ) ;84 x t d c 4 c l o s e ( d e v i c e ) ;85 return s t a t u s ;86 87

88 // some book keeping89 i n t p a c k e t c o u n t = 0 ;90 i n t e m p t y p a c k e t s = 0 ;91 i n t p a c k e t s w i t h e r r o r s = 0 ;92 bool l a s t r e a d n o d a t a = f a l s e ;93

94 i n t 6 4 GroupAbsTime = 0 ;95 i n t 6 4 GroupAbsTime old = 0 ;96 i n t UpdateCount = 100 ;97


98 p r i n t f ( ” Reading p a c k e t s :\ n” ) ;99 // read 10000 packets

100 whi le ( ( p a c k e t c o u n t < 10000) )101 102 // get p o i n t e r s to acqu i red packets103 s t a t u s = x t d c 4 r e a d ( d e v i c e , &r e a d c o n f i g , &r e a d d a t a ) ;104 i f ( s t a t u s != CRONO OK)105 106 S l e e p (100) ;107 p r i n t f ( ” − No data ! −\n” ) ;108 109 e l s e110 111 // i t e r a t e over a l l packets r e c e i v e d with the l a s t read112 c r o n o p a c k e t * p = r e a d d a t a . f i r s t p a c k e t ;113 whi le ( p <= r e a d d a t a . l a s t p a c k e t )114 115 // do something with the data , e . g . c a l c u l a t e cur rent ra t e116 GroupAbsTime = p−>t imestamp ;117 i f ( p a c k e t c o u n t%UpdateCount == 0) 118 double Rate = 1 . / ( ( double ) ( GroupAbsTime−GroupAbsTime old ) *1e←

−9*10/6/( double ) UpdateCount ) ;119 p r i n t f ( ”\ r%f kHz” , Rate ) ;120 GroupAbsTime old = GroupAbsTime ;121 122

123 // . . or p r i n t h i t s ( not a good idea at high data rate s ,124 // so l e t ' s do that only f o r every 1000 th packet . . . )125 // p r in t packet in fo rmat ion126 i f ( p a c k e t c o u n t %1000 == 0) 127 p r i n t f ( ” Card %d − F l a g s %d − Length %d − Type %d − TS %l l u \n” , p←

−>card , p−>f l a g s , p−>l e n g t h , p−>type , p−>t imestamp ) ;128

129 i n t h i t c o u n t = 2 * ( p−>l e n g t h ) ;130 i f ( ( p−> f l a g s & 0 x1 ) == 1)131 h i t c o u n t −= 1 ;132

133 u i n t 3 2 * p a c k e t d a t a = ( u i n t 3 2 *) ( p−>data ) ;134 f o r ( i n t i = 0 ; i < h i t c o u n t ; i++ )135 136 u i n t 3 2 * h i t = ( p a c k e t d a t a + i ) ;137

138 // e x t r a c t channel number (A−D)139 char c h a n n e l = 65 + (* h i t &0x f ) ;140

141 // e x t r a c t h i t f l a g s142 i n t f l a g s = (* h i t >>4 & 0 x f ) ;143

144 // e x t r a c t h i t timestamp145 i n t t s o f f s e t = (* h i t >>8&0 x f f f f f f ) ;146

147 // TDC bin s i z e i s 13 .0208 ps . Convert timestamp to ns .148 double t s o f f s e t n s = t s o f f s e t ;149 t s o f f s e t n s *= 0.0130208 ;150

151 p r i n t f ( ” H i t @Channel %c − F l a g s %d − O f f s e t %u ( raw ) / %f ns\n←” , channe l , f l a g s , t s o f f s e t , t s o f f s e t n s ) ;

152


153 p r i n t f ( ”\n\n” ) ;154 155

156 // go to next packet157 p = c r o n o n e x t p a c k e t ( p ) ;158 p a c k e t c o u n t++;159 160 161 162

163 // shut down packet gene ra t i on and DMA t r a n s f e r s164 x t d c 4 s t o p c a p t u r e ( d e v i c e ) ;165

166 // d e a c t i va t e XTDC4167 x t d c 4 c l o s e ( d e v i c e ) ;168

169 return 0 ;170


5 Technical Data

Power Requirements: 25W

Mechanical Dimensions: 170mm × 106mm

Throughput: 200 Mb/s

5.1 TDC Characteristics

Each board is tested against the values listed in the ‘Min’ column. ‘Typical’ is the mean valueof the first 10 boards produced.

Symbol Parameter Min Typical Max Units

INL Integral nonlinearity bins

DNL Differential nonlinearity bins

tBin Binsize 13.02083 ps

tRes Resolution 8 ps

5.2 Electrical Characteristics

5.2.1 Oscillator

The xTDC4-PCIe uses an oscillator with 25 ppb stability.

5.2.2 Environmental Conditions for Operation

The board is designed to be operated under the following conditions:


T ambient temperature 5 40 C

RH relative humidity at 31C 20 75 %

5.2.3 Environmental Conditions for Storage

The board shall be stored between operation under the following conditions:

25


T ambient temperature -30 60 C

RH relative humidity at 31C non condensing 10 70 %

5.2.4 Power Supply


I PCIe 3,3V rail power consumption 4 mA

VCC PCIe 3,3V rail power supply 3,1 3,3 3,5 V

I PCIe 12V rail power consumption 2,1 A

VCC PCIe 12V rail power supply 11,1 12 12,9 V

I PCIe 3,3VAux rail power consumption 0 A

VCC PCIe 3,3VAux rail power supply 3,3 V

5.2.5 Inputs

The xTDC4-PCIe’s inputs are single-ended AC-coupled with 50Ω DC termination.


VBase Input Baseline 0 5 V

VThreshold Trigger Level VBase - 1.32 VBase + 1.18 V

tPulse Pulse Length 2 5 200 ns

ZP Input Impedance 50 Ω

ITerm Termination Current -50 -20 50 mA

5.3 Information Required by DIN EN 61010-1

5.3.1 Manufacturer

The xTDC4-PCIe is a product of:

cronologic GmbH & Co. KGJahnstraße 4960318 Frankfurt

HRA 42869 beim Amtsgericht Frankfurt/M

VAT-ID: DE235184378


5.3.2 Intended Use and System Integration

The devices are not ready to use as delivered by cronologic. It requires the development ofspecialized software to fulfill the application of the end user. The device is provided to systemintegrators to be built into measurement systems that are distributed to end users. Thesesystems usually consist of the xTDC4-PCIe, a main board, a case, application software andpossible additional electronics to attach the system to some type of detector. They might alsobe integrated with the detector.

The xTDC4-PCIe is designed to comply with DIN EN 61326-1 when operated on a PCIecompliant main board housed in a properly shielded enclosure. When operated in a closedstandard compliant PC enclosure the device does not pose any hazards as defined by EN 61010-1.

Radiated emissions, noise immunity and safety highly depend on the quality of the enclosure.It is the responsibility of the system integrator to ensure that the assembled system is compliantto applicable standards of the country that the system is operated in, especially with regardsto user safety and electromagnetic interference. Compliance was only tested for attached cablesshorter than 3 m.

When handling the board, adequate measures have to be taken to protect the circuits againstelectrostatic discharge (ESD). All power supplied to the system must be turned off before in-stalling the board.

5.3.3 Cooling

The xTDC4-PCIe in its base configuration has passive cooling that requires a certain amount ofair flow. If the case design can’t provide enough air flow to the board, a slot cooler like ZalmanZM-SC100 can be placed next to the board. Active cooling is also available as an option to theboard.

5.3.4 Environmental Conditions

The board is designed to be operated under the following conditions:


T ambient temperature 5 40 C

RH relative humidity at 31C 20 75 %

and shall be stored between operation under the following conditions:


T ambient temperature -30 60 C

RH relative humidity at 31C non condensing 10 70 %


5.3.5 Inputs

All inputs are AC coupled. The inputs have very high input bandwidth requirements andtherefore there are no circuits that provide over voltage protection for these signals. Any voltageon the inputs above 5V or below -5V relative to the voltage of the slot cover can result inpermanent damage to the board.

5.3.6 Recycling

cronologic is registered with the “Stiftung Elektro-Altgerate Register” as a manufacturer ofelectronic systems with Registration ID DE 77895909.

The xTDC4-PCIe belongs to category 9, “Uberwachungs und Kontrollinstrumente fur aus-schließlich gewerbliche Nutzung”. The last owner of a xTDC4-PCIe must recycle it, treat theboard in compliance with §11 and §12 of the German ElektroG, or return it to the manufacturer’saddress listed on page 26.


6 Revision History

6.1 Firmware

Revision Date Comments

2.834 2017-12-05 Internal optimizations

2.797 2015-09-08 Hit sorting and packet generation issues fixed

6.2 Driver & Applications


1.4.1 2019-11-11 x64 32 mode issues fixed

1.4.0 2019-06-04 Improved Windows 10 support

1.3.0 2019-01-23 Added Windows 10 support

6.3 User Guide


1.6.0 2019-06-05 API clarifications

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