Microelectronics & VLSI

Department Of Electrical Engineering

IIT Hyderabad

Research Overview and M.Tech Student Profile

Advanced Embedded System and IC Design L

Research Overview

Research activity involves designing and implementation of low complexity and low power VLSI circuits for personalized healthdevelopment of CAD tool for IC design to reduce time to market, traditional transistors for next generation electronics, design for testability of 3D IC, signal processing and hardware development for stereovision useful in survey lines and ro

Research Area: · Electronic Design Automation for next generation IC Design.· Cyber Physical Systems for remote healthcare applications: VLSI fo· Internet of Things for smarter healthcare: VLSI fo

perspective. · Next Generation Electronics: Exploration into a new paradigm.

dvanced Embedded System and IC Design Lab

Research activity involves designing and implementation of low complexity and low power VLSI circuits for personalized healthdevelopment of CAD tool for IC design to reduce time to market, energy harvesting from trees, magnetic logic circuits to replace traditional transistors for next generation electronics, design for testability of 3D IC, methodology to detect diseases using proteomics

hardware development for stereovision useful in survey lines and robots.

Electronic Design Automation for next generation IC Design. Cyber Physical Systems for remote healthcare applications: VLSI for signal processing, VLSI Design and Verification perspective.

SI for signal processing, VLSI Design and Verification, SOC Design and Verification

Next Generation Electronics: Exploration into a new paradigm.

Research activity involves designing and implementation of low complexity and low power VLSI circuits for personalized healthcare, ic logic circuits to replace

methodology to detect diseases using proteomics

VLSI Design and Verification perspective. SOC Design and Verification

Related Courses:

• Embedded System. • Embedded Programming. • Digital IC Design & Verification. • Microprocessors and Computer Organization. • Biomedical IC Design.

Faculty Profile Dr. Amit Acharyya (Assistant Professor)

Phone: +91-40-2301 6106 (Office) Fax: +91-40-2301 6032

Email:amit_acharyya [at] iith.ac.in Homepage:http://www.iith.ac.in/~amit_acharyya/index.html

Areas of Interest:Signal Processing Algorithm and VLSI Architectures, VLSI systems for next generation healthcare systems, Low Power Design Techniques, Electronic Aspects of Pervasive Computing, Bio-informatics, Digital Arithmetic, Linear Algebra, Numerical Analysis, Computer-aided designs, VLSI for Communication systems, Genomic and Proteomic Signal Processing, VLSI in Proteomics.

Projects · Department of Electronics and Information Technology (DEITY), Ministry of Communications and Information Technology,

Government of India funded research project entitled "IOT for Smarter Healthcare".

· Advanced Research and Analysis Group, (ANURAG), Defense Research and Development Organization (DRDO), Government of India funded research project on "Healthcare Technology".

· Science and Engineering Research Board, (SERB), Department of Science and Technology (DST), Government of India funded research project on "Shear flow estimation and damage assessment of reinforced concrete columns under combined loading including torsion".

Tape Out

SoC Real-time Automated Non-invasive Cardiac Remote Health Monitoring System in TSMC 130nm operating at 2MHz.

Analog/Mixed-Signal, RF, Microwaves

Research Overview This research cluster emphasizes synergistic cooperation and innovation amongst faculty members whose research focuses on various aspects of electrical systems. The faculty in this research cluster are involved in biomedical system and circuits, RF transceivers, harvesting circuits and Data convertors.

An effective top-down simulation and modeling methodology of systems is being emphasized. Our research forms the basis for personal portable, self-sustainable healthcare devices of today and of the future.

Research Thrust Ø Analog integrated circuits Ø Data Converters Ø RF Circuit design Ø System-on-a-chip design Ø Energy Harvesting circuits Ø Radiation Hardened Circuits

Related courses Ø Analog IC design Ø Advanced memory design Ø Digital IC design Ø Biomedical IC design Ø Analog & digital circuit simulation lab Ø Embedded Circuit design

Faculty

Selected Projects

"IOT for Smarter Healthcare"funded by Department of Electronics and Information Technology (DEITY), Ministry of Communications and Information Technology, Government of India. "Cyber Physical Systems for remote healthcare applications"funded by Department of Electronics and Information Technology (DEITY), Ministry of Communications and Information Technology, Government of India.

"Self-powered wireless chipset for building to building communication" funded by Department of Electronics and

Information Technology (DEITY), Ministry of Communications and Information Technology, Government of India.

Dr.Ashudeb Dutta (Assistant Professor) Email : asudeb_dutta [at] iith.ac.in Phone : +91 (40) 2301 6051 Areas of Interest: Analog circuit design, biomedical circuit design, data Converters, energy harvesting circuits, RF circuit design.

Tapeout

2.4GHz direct conversion QLMVF

mode ZigBee/BLE Receiver including integer N

PLL

A 6µW Biomedical Frontend with

powered U

A 6µW Biomedical Frontend with ∑∆ ADC forSelf-

powered U-Healthcare Devices in 0.18µmCMOS

2.4GHz direct conversion QLMVF mode

including integer N PLL

2.4GHz direct conversion QLMVF mode ZigBee Receiver

including integer N PLL

Nano-X Lab

Research Overview

Research activities in the Microelectronics Group span a wide range of areas: physics, technology, characterization, modeling, simulation and design. Labs where research is conducted are Fabrication Clean Room, Electrochemistry laboratory, device characterization laboratory and simulation laboratory.

Faculty Profile

Areas of Interest:3-D ICs technology Development (Interconnects, electro-migration, Electrical and Thermal Modeling of 3-D ICs, Thermal and power aware placement of TSV (both signal and thermal) RF MEMS device design simulation fabrication and Characterization Micro/Nano fluidics, Electronics cooling, Lab on chip 3D solar cell, Ultra low power solar cell based energy harvesting ckt. Milk Net, Synthetic tree, Water adulterant, Mechanical to Electrical Energy Conversion.

Dr.Shiv Govind Singh (Associate Professor) Email : sgsingh [at] iith.ac.in Phone : +91 (40) 2301 6079

Related Courses: • Semiconductor Device and Modeling

• VLSI Technology

• CMOS Sensors

• More than Moore Electronics

• Nanotechnology and Principles.

Research Area: · Nano Devices and Sensors. · MEMS · Micro fluidics · 3D IC Technology Development · Lab On Chip Applications · Antennas · Silicon Based Sensors

Areas of Interest:Biosensors, Lab on Chip applications, VLSI Technology, Semiconductor device physics, MEMS

Areas of Interest:Nanomaterials, devices and circuits.

Areas of Interest:Physics of semiconductor devices and electronic transport, Micro/Nano-electronics, Modeling and simulation of electron devices, Quantum phenomena in nanostructures, Physical and wave electronics.

Dr.Kaushik Nayak (Assistant Professor) Email : :knayak [at] iith.ac.in Phone : +91 (40) 2301 8440

Dr.Sushmee Badhulika (Assistant Professor) Email : :sbadh [at] iith.ac.in

Siva Rama Krishna (Assistant Professor) Email : svanjari [at] iith.ac.in

Labs & Tools

VLSI Design Lab:Cadence (UMC 180nm)PspiceAgilent ADSMATLABSilvaco TCADCOMSOL

Advanced Digital design:Synopsis,

Mentor Graphics

Xilinx ISE, Xilinx Vivado

Keil µVision

Xilinx FPGA: Spartan 6, Virtex 7, Kintex 7, ZedBoardARM Versatile Express CortexM Prototyping System

ARM lab

Advanced Digital design:Synopsis,

Mentor Graphics

Xilinx ISE, Xilinx Vivado

Keil µVision

Xilinx FPGA: Spartan 6, Virtex 7, Kintex 7, ZedBoardARM Versatile Express Cortex-M Prototyping System

ARM lab-in-a-box.

Nano-X Lab:RF sputtering

Lithography system

Wafer Bonder Cascade Probshield and Keithley 4200 SCS with switch matrix Vector network analyzer

Sonoscan Acoustic Microscope

Electrochemical spectroscopy

Cascade Probshield and Keithley 4200 SCS with switch

Vector network analyzer

Sonoscan Acoustic Microscope

Electrochemical spectroscopy

Research Partners

Areas of Interest:Low power and complexity VLSI Architectures, Digital Design, Signal processing algorithms and Analog Design.

Description of Masters Project: Title: Algorithms and architectures for CORDIC based low complexity reconfigurable n-D FastICA (Independent Component Analysis)

Description: FastICA separates the independent signals from mixed signals. To reduce the complexity, CORDIC has been used to compute costly arithmetic operations involved in the FastICA. reconfigurable nature of the proposed n-dimensional architecture makes it possible to use for any number of inputs (≤n). So, it can be used in signal processing and biomedical applications (ECG, EEG signal extraction) without any changes. Apart from this, I am also working on designing of low complexity architecture for unsupervised K-means clustering as part of the post processing of FastICA, whwill be used in the health monitoring systems.

Other Projects: • Implementation of low complexity ECG Feature extraction

algorithm on TMS320C6713DSK and FPGA prototyping.• Design of Incremental Delta Sigma ADC. • Design of 256x64 6T SRAM cell and Read/Wri

modelling • Fast algorithm for Dynamic Supply and Threshold Voltage

Scaling for CMOS circuits. Publications: 2 - IEEE international conference papers

Adapa Bhagyaraja M.Tech (Microelectronics & VLSI)

Link: http://in.linkedin.com/in/adapabhagyaraja

Student Profile

Bollam Nandini M.Tech (Microelectronics & VLSI) Link:https://in.linkedin.com/pub/bollam

Description of Masters Project: Title: Implementation of 10 bit 50MSPS Pipeline ADC for CMOSalong with design of readout circuit for single pixel using CDS amplifier.Pipeline ADC is best to implement high-speed, mediumADCs with minimum power consumption. Pipelined adc is designed by using optimized number of bits per stage which significantly reduces therequirements of amplifier therefore power and also area of each stage. In order to decrease the total power stage scaling is included. Now the next step is to design Correlated double sampling (CDS) amplifier to noise in image sensor and 4T pixel circuit. Final target is to do layout of the entire system. Other Projects:

• Design of 1MSPS 4bit first order noise shaped two step pipeline for incorporating itas a quantizer in sigma delta ADC .

• Implementation of controller algorithm for an Adaptive artificial pancreas system in Verilog.

• Implementation of ECG feature extraction algorithm in Verilog• Design of 256 x 64 6T SRAM array • Implementation of low complexity Foetal ECG Extraction algorithm for

Mobile Health Monitoring Applications using TMS320C6713 DSK.

Low power and complexity VLSI Architectures, Digital Design, Signal

nalog Design.

Algorithms and architectures for CORDIC based low complexity D FastICA (Independent Component Analysis)

FastICA separates the independent signals from mixed reduce the complexity, CORDIC has been used to

arithmetic operations involved in the FastICA. The dimensional architecture

≤n). So, it can be signal processing and biomedical applications (ECG, EEG

signal extraction) without any changes. Apart from this, I am also working on designing of low complexity architecture for unsupervised

means clustering as part of the post processing of FastICA, which

Implementation of low complexity ECG Feature extraction algorithm on TMS320C6713DSK and FPGA prototyping.

Design of 256x64 6T SRAM cell and Read/Write Delay

Fast algorithm for Dynamic Supply and Threshold Voltage

://in.linkedin.com/in/adapabhagyaraja Areas of Interest: Low power and complexity

VLSI Architectures, Digital Design, Signal processing algorithms and Analog Design.

in.linkedin.com/pub/bollam-nandini/93/8a4/a16

for CMOS image sensor circuit for single pixel using CDS amplifier.

medium-to-high resolution ADCs with minimum power consumption. Pipelined adc is designed by using optimized number of bits per stage which significantly reduces the requirements of amplifier therefore power and also area of each stage. In order to decrease the total power stage scaling is included. Now the next step is to

reduce fixed pattern target is to do layout of the

Design of 1MSPS 4bit first order noise shaped two step pipeline adc incorporating itas a quantizer in sigma delta ADC .

an Adaptive artificial

Implementation of ECG feature extraction algorithm in Verilog

Implementation of low complexity Foetal ECG Extraction algorithm for ng TMS320C6713 DSK.

Low power and complexity VLSI Architectures, Digital Design, Signal processing algorithms and Analog Design.

Pranit Namdeorao Jadhav M.Tech (Microelectronics & VLSI) Link: http://www.iith.ac.in/~amit_acharyya/

Homepages/Jadhav_Pranit_Namdeorao.htmlhttps://in.linkedin.com/in/jadhavpranit

Area of Interest:Digital Circuits, Digital System Design, Low complexity architecture for EEG processor, Embedded System Design, VLSI for Signal Processing, Analog circuits.

Description of Master’s Project: The main objective of the project is to remove blink and muscle artefact from the EEG recording for proper diagnosis and treatment of various neurodevelopmental disorders in children. FastICA based on CORDIC, separates the independent EEG signal from the mixed EEG signals. Discrete Wavelet Transform is applied to each of the independent signal and further processing is carried out to detect and remove the artefactsbased on the characteristics feature without the use of reference electrode. This system is prototyped and tested on FPGA platform and further work on Silicon implementation is going on. Currently working on designing of low complexity architecture for Single Channel ICA (SCICA) which will extract frequency disjoint signals from single source to reduce EEG electrodes.

Other Projects: • RF energy harvesting • Designing of 6T SRAM cell and Read/Write delay model of 256*64

SRAM memory. • Power control using microcontroller for efficient moulding of plastic.

amit_acharyya/ Homepages/Jadhav_Pranit_Namdeorao.html

Digital Circuits, Digital System Design, Low complexity System Design, VLSI for Signal

The main objective of the project is to remove blink and muscle artefact from the EEG recording for proper diagnosis and treatment of various

isorders in children. FastICA based on CORDIC, separates the independent EEG signal from the mixed EEG signals. Discrete Wavelet Transform is applied to each of the independent signal and further processing is carried out to detect and remove the artefacts based on the characteristics feature without the use of reference electrode. This system is prototyped and tested on FPGA platform and further work on Silicon implementation is going on. Currently working on designing of low

ingle Channel ICA (SCICA) which will extract frequency disjoint signals from single source to reduce EEG electrodes.

Designing of 6T SRAM cell and Read/Write delay model of 256*64

controller for efficient moulding of plastic.

Aniket Ramesh GholeM.Tech (Microelectronics & VLSI)

Link:https://in.linkedin.com/pub/aniket

Areas of Interest: Analog & Mixed Signal Design,cost Sensors design and Modelling.

Description of Master’s Project: Milk adulteration detection. Commercially available milk is found to be adulterated with number of chemicals such as hydrated lime, sodium hydroxide, sodium carbonate, sodium bicarbonate, hydrogen peroxide, etc. which may cause hazardous and irreversible damage to the organs of the consumers. We work on development of the single hand-held sensor platform (with single sensor) for the all adulterants. The fabrication of the sensor and requiredcircuitry for the same on single chip forms the major objective of the project.

Other Projects: • Remove blink and muscle artefact from the EEG recording for

proper diagnosis and treatment of various neurodisorders in children and its implementation on FPGA.

• Designing of 6T SRAM cell and Read/Write delay model of 256*64 SRAM memory.

• RF energy harvesting system. • Development nanofiber composite using electrospinning

technique for bio-sensing applications. • Development of sensor for early cancer detect

anomalies in DNA strands. •

Publications:1 IEEE Conference Paper.

Aniket Ramesh Ghole M.Tech (Microelectronics & VLSI)

in.linkedin.com/pub/aniket-ghole/17/10b/939

Design, Digital IC Design, Low

Milk adulteration detection. Commercially available milk is found to be adulterated with number of chemicals such as hydrated lime, sodium hydroxide, sodium carbonate,

ide, etc. which may cause hazardous and irreversible damage to the organs of the consumers. We

held sensor platform (with single the all adulterants. The fabrication of the sensor and designof

the same on single chip forms the major objective of

Remove blink and muscle artefact from the EEG recording for proper diagnosis and treatment of various neuro-developmental

on on FPGA. Designing of 6T SRAM cell and Read/Write delay model of

Development nanofiber composite using electrospinning

Development of sensor for early cancer detection by sensing

Area of Interest: Data Converters, ultra-low power analog circuit design, biomedical signal processing circuits, mixed signal design, Digital IC Design, electronic design automation, embedded system design.

Other Projects: • A low power analog front-end for ECG signals • Designing of 6T SRAM cell and Read/Write delay model of

256*64 SRAM memory. • ECG signal denoising and the system implementation on

Virtex-7 FPGA board.

Work experience: One and half year experience in Tata consultancy services as Assistant System engineer. Worked in SAP EDI domain in B2B integration & deployment.

Description of Master’s Project: An ultra-low power successive approximationregisterADC for biomedical application is the focus of my research. An energy efficient Charge recycling approach such as split capacitor, merged capacitor are targeted in UMC 180nm process. An Ultra-low power (<50nW) SAR ADC chip is expected to be taped out and tested at the end of my project.

Kunal Yadav M.Tech(Microelectronics & VLSI) Link: https://in.linkedin.com/in/kunalyadav2

low power analog circuit n, biomedical signal processing circuits, mixed signal design, Digital

IC Design, electronic design automation, embedded system design.

Designing of 6T SRAM cell and Read/Write delay model of

stem implementation on

ta consultancy System engineer. Worked in SAP EDI domain in

low power successive biomedical application is the focus of my

research. An energy efficient Charge recycling approach such as split capacitor, merged capacitor are targeted in UMC 180nm process. An

low power (<50nW) SAR ADC chip is expected to be taped out and

://in.linkedin.com/in/kunalyadav2

Areas of Interest:mm wave antenna Design, UWB antenna Design, Analog circuit Design.

Description of Masters Project: Title: Body worn millimeter wave antenna design on fabric.

Description: The goal is to design a wearable antenna at mm wave which can be stitched on to the fabric. The various issues which need to be considered at mm wave include interaction of mm whuman body at 60 GHz and change in the antenna performance in the close vicinity of human body. A detailed study of human skin dielectric constant is needed since at 60 GHz or in V-band properties of skin differ from properties at other frequency.

Other Projects: • Magnetic quantum cellular automata (MQCA) for Digital logic• Multilayer nanoparticle arrays for efficiency enhancement in

thin film photovoltaic • Design of 256x64 6T SRAM cell and Read/Write Delay

modelling • Modified-Dickson Charge pump design • CMOS RF Biosensor using Nuclear Magnetic Resonance

(NMR)

Publications: 2 - IEEE international conference papers

Lakhan M.Tech (Microelectronics & VLSI)

Link: https://in.linkedin.com/pub/lakhan

mm wave antenna Design, UWB antenna

Body worn millimeter wave antenna design on fabric. wearable antenna at mm wave

which can be stitched on to the fabric. The various issues which need to be considered at mm wave include interaction of mm waves with

and change in the antenna performance in the human body. A detailed study of human skin dielectric

band properties of skin

Magnetic quantum cellular automata (MQCA) for Digital logic Multilayer nanoparticle arrays for efficiency enhancement in

Design of 256x64 6T SRAM cell and Read/Write Delay

CMOS RF Biosensor using Nuclear Magnetic Resonance

M.Tech (Microelectronics & VLSI)

in.linkedin.com/pub/lakhan-panwar/81/baa/108

R.Aishwarya M.Tech (Microelectronics and VLSI) Link:https://in.linkedin.com/pub/raishwarya/9a/555/a02a

Description of Masters Project: Fabricating and characterizing a T microchannel device for Lab(LoC) applications. The applications of this device is detection of occurrence of heart attack and detection of cancer and other diseases. This device used to separate the plasma from blood by using a passive method called hydrodynamic separation technique in microchannels with size of the order of mm which leads to cost reduction and low maintenance of the device. This separated plasma can be post processed for the detection of proteins like Cardiac troponin I or cardiac troponin T which indicates occurrence of heart attack and then WBC s are separated for detecting cancer.

Other Projects •FPGA based design and implementation of an adaptive Artificial Pancreas System. •Design of 256x64 6T SRAM array with 65nm node. •Gm-C filter design with 180nm node. •Implementation of voice Scrambler using TMS320C6713 DSK.• ECG lead reconstruction. •TCAD Simulation of Ion Sensitive field effect transistor (ISFET).

Areas of Interest:Digital and Analog Circuitdesign, Embedded system design,Memory design, Microsensors for Lab-onSystems,Cooling system for 3D IC.

in.linkedin.com/pub/raishwarya/9a/555/a02a

e for Lab-on-Chip (LoC) applications. The applications of this device is detection of occurrence of heart attack and detection of cancer and other diseases. This device is

from blood by using a passive method called c separation technique in microchannels with size of the order

of mm which leads to cost reduction and low maintenance of the device. This separated plasma can be post processed for the detection of proteins

which indicates occurrence of heart attack and then WBC s are separated for detecting cancer.

•FPGA based design and implementation of an adaptive Artificial Pancreas

TMS320C6713 DSK.

ield effect transistor (ISFET).

Digital and Analog Circuitdesign, Embedded system on-Chip (LoC)

ThalladaSandeep M.Tech (Microelectronics and VLSI)

Link:https://in.linkedin.com/pub/thallada

Areas of Interest:Digital IC design, Low power VLSI Design Automation, Embedded Systems, Analog Circuits, Semiconductor Device Modelling, VLSI Technology, Programming and Software Development.

Description of Master’s Thesis: Title: Hardware Software co-design of Protein Sequencing in Bioinformatics: Design of bit split implementation of Aho-Corasick algorithm

Description: Aho-Corasick algorithm is a string based pattern matching algorithm and it is used in analysis of protein sequences. The proposed algorithm is written in C language and subsequently implemented on FPGA using the Xilinx Tools. The proposed algorithm accelerates string matching process, improves the speed of peptide identification and consumes less memory as compared to the existing algorithms. Other projects:

• Fast and reliable protein profile extraction using Fast ICA in Matlab.

• Low complexity hardware based feature extractio• Design of 256x64 6T SRAM cell and its analysis for critical path

timing for read and write operations. • Metal assisted chemical etching for the formation of TSV used in 3D

IC integration. • Characterization of Junctionless transistor using

Microelectronics and VLSI)

in.linkedin.com/pub/thallada-sandeep/56/aba/943

Low power VLSI design, Electronic Design Automation, Embedded Systems, Analog Circuits, Semiconductor

nology, Programming and Software

design of Protein Sequencing in Bioinformatics: Corasick algorithm

string based pattern matching algorithm and it is used in analysis of protein sequences. The proposed algorithm is written in C language and subsequently implemented on FPGA using the Xilinx Tools. The proposed algorithm accelerates string matching

, improves the speed of peptide identification and consumes less

file extraction using Fast ICA algorithm

Low complexity hardware based feature extraction of ECG signal. Design of 256x64 6T SRAM cell and its analysis for critical path

Metal assisted chemical etching for the formation of TSV used in 3D

Characterization of Junctionless transistor using Silvaco TCAD.

Harsha S M.Tech (Microelectronics & VLSI)

Link: https://in.linkedin.com/pub/harsha-s/44/59/a16

Areas of Interest:Digital and Analog system design, ASIC/FPGAImplementation, Semiconductor Devices Description of Master’s Project: Fabrication Of Hybrid Photo Detector(HPD) The project involves detection of single photon within a range of wavelengths using a combination of photo cathode and an electron multiplier. III-V semiconductor based photo cathode and a Silicon based avalanche diode in reverse biased mode as electron multiplier form the basic structure of the device.Material used for III-V semiconductor wildetermine the range of wavelengths that can be detected by the system. High gain by avalanche multiplication helps in detection of current using normal read out circuits.HPD finds application in various fields in medical field,LIDAR(communication), nuclear reactors(detect leakage) etc., Other Projects:

• CORDIC based Householder Reflection with ASIC process flow implementation

• FPGA Implementation of Hamming Code • FPGA Implementation of Lapped Orthogonal Transform• ADPCM Encoder • SILVACO/TCAD Simulation of Dual-Material Gate Junctionless

Transistor

s/44/59/a16

Digital and Analog system design,

The project involves detection of single photon within a range of bination of photo cathode and an electron

V semiconductor based photo cathode and a Silicon based avalanche diode in reverse biased mode as electron multiplier form the

V semiconductor will determine the range of wavelengths that can be detected by the system. High gain by avalanche multiplication helps in detection of current using normal read out circuits.HPD finds application in various fields in

ar reactors(detect leakage)

CORDIC based Householder Reflection with ASIC process flow

FPGA Implementation of Lapped Orthogonal Transform

Material Gate Junctionless

Link:https://in.linkedin.com/pub/himanshu bansal/a0/357/861

Areas of Interest: Analog and Digital circuit design, ASIC/FPGA Implementation, Semiconductor Devices Description of Master’s Project: Simulation and Fabrication of Solar Cells: Embedding different kind of nanoparticles with-in and above the surface of Amorphous Si to improve solar cell efficiency. Other Projects:

● CORDIC Based Householder Reflection ● FPGA Implementation of Hamming code ● Front-end and back-end implementation of CORDIC algorithms

using synopsis EDA tools

Himanshu M.Tech(Microelectronics & VLSI

https://in.linkedin.com/pub/himanshu-

Analog and Digital circuit design, ASIC/FPGA

in and above the surface of

end implementation of CORDIC algorithms

M.Tech(Microelectronics & VLSI)

K.DEEP M.Tech (Microelectronics & VLSI)

Link:https://in.linkedin.com/pub/khandavallideep/b0/8ba/43a

Areas of Interest: Semiconductor Devices, Analog and Digital circuit

design. Description of Masters Project The project involves designing a chip for Medical diagnosis(LAB Owhich includes simulation and fabrication of devices. Project mainly deals with the concept of Electro-wetting on dielectric(EWOD) Other Projects

• Band gap reference, Two stage op-amp design • Front-end and Back-end implementation of CORDIC algorithm

using synopsis EDA tools. • FPGA Implementation of sequence detector. • 32 point FFT implementation in Xilinx.

khandavallideep

Semiconductor Devices, Analog and Digital circuit

The project involves designing a chip for Medical diagnosis(LAB ON CHIP) which includes simulation and fabrication of devices. Project mainly deals

ion of CORDIC algorithms

Areas of Interest: ASIC Design, Physical Design Flow, EDA Tools, FRONT END Design Projects:

• Design of High speed Adders, Multiplier and Square Root Modules

• 32 point FFT implementation using verilog• Cordic implementation • Booth Algorithm implementation on FPGA

P Udaya Teja M.Tech (Microelectronics & VLSI)

Link:https://in.linkedin.com/pub/udaya/26/9ab

hysical Design Flow, EDA

Design of High speed Adders, Multiplier and Square Root

32 point FFT implementation using verilog

Booth Algorithm implementation on FPGA

(Microelectronics & VLSI)

https://in.linkedin.com/pub/uday-teja/1

Shikhar Jain M.Tech (Microelectronics & VLSI)

Link:https://in.linkedin.com/pub/shikharjain/a2/800/ab4

Areas ofInterest: Analog and Digital system design, ASIC/FPGAimplementation, Semiconductor Devices Description of Masters Project: The project involves 3D IC fine chip Cu-Cu bonding using Nickel as passivation layer within Industrial limits of Temperature and Pressure. This technology can be used for more fine pitch with more stable bondseven at higher temperature and smaller footprint.Other Projects:

• Band gap reference, Two stage op-amp design • 32 point fft in Xilinx. • Booth Algorithm implementation on FPGA • Front-end and Back-end implementation of CORDIC

algorithms using synopsys EDA tools.

://in.linkedin.com/pub/shikhar-

Digital system design,

using Nickel as passivation layer within Industrial limits of Temperature and

pitch with more footprint.

ion of CORDIC

Description of Masters Project: A bolometer is an IR sensor used in thermal imaging having wide range of applications. This project is targeted at making a low cost micro bolometer on Silicon only with front-end bulk micro-machinsimple fabrication steps and then integrate vertically (3D integration) with the Read Out IC (ROIC) designed for it. A micro bolometer is realized on a Silicon wafer by under etching Si and creating a hanging structure of it. We use only wet chemical etching of Silicon and the mask geometry that we used exposes planes at an angle of 450 with the wafer flat which etches the Silicon vertically(also horizontally) unlike

Areas of Interest: Digital Design, Analog Design, Device Modelling,

Link:https://in.linkedin.com/pub/rangareddy/a0/34b/976

Other Project: • Implementation of CORDIC based Householder reflection.• TSV noise coupling in 3D IC using guard Ring

Publications: 1- IEEE International conference Paper

the 54.70 planes exposed when etched on (100) wafer .

R Ranga Reddy M.Tech (Microelectronics & VLSI)

A bolometer is an IR sensor used in thermal imaging having wide range of applications. This project is targeted at making a low cost micro

machining using simple fabrication steps and then integrate vertically (3D integration) with the Read Out IC (ROIC) designed for it. A micro bolometer is realized on a Silicon wafer by under etching Si and creating a hanging

ical etching of Silicon and the mask geometry that we used exposes planes at an angle of 450 with the wafer flat which etches the Silicon vertically(also horizontally) unlike

Digital Design, Analog

://in.linkedin.com/pub/ranga-

Implementation of CORDIC based Householder reflection.

VLSI)

Srinivasulu Kanaparthi M.Tech(Microelectronics & VLSI)

Link:https://www.linkedin.com/pub/srinivasulu-kanaparthi/a7/792/879

Areas of Interest:Semiconductor Devices, NanoelectronicsDesign of Analog and Digital circuits Description of Master’s Project: Fabrication, Characterization and Applications of Carbon electronicsOther Project:

• RF data concentrator Unit • Solar String Monitoring Unit • Rectifier for Piezoelectric Energy Harvesting • Implementation of LMS filter on DSP and ARM cortex

boards • FPGA implementation of sequence detector • Front-end and Back-end implementation of CORDIC

Algorithm using Synopsis EDA Experience: Two years of work experience as Embedded Engineer at Ami Te(India) Pvt. Ltd

Raja U M.Tech (Microelectronics & VLSI)

Areas of Interest: Analog and Digital circuit design, ASIC/FPGAimplementation, Semiconductor Devices Description of Masters Project The project involves simulation study of Bilayer Graphene FET using nonequilibrium green's function formalism through the selfsolution of the Poisson and the Schrodinger equations. Other Projects

• Band gap reference,Two stage op-amp design • Front-end and Back-end implementation of CORDIC algorithms

using synopsys EDA tools • 32 point fft in Xilinx. • FPGA Implementation of sequence detector,CORDIC

algorithms.

Link: https://in.linkedin.com/pub/raja00/636/897

M.Tech(Microelectronics & VLSI)

://www.linkedin.com/pub/srinivasulu

electronics and

Fabrication, Characterization and Applications of Carbon electronics

Implementation of LMS filter on DSP and ARM cortex

end implementation of CORDIC

Two years of work experience as Embedded Engineer at Ami Tech

M.Tech (Microelectronics & VLSI)

Analog and Digital circuit design,

The project involves simulation study of Bilayer Graphene FET using nequilibrium green's function formalism through the self-consistent

end implementation of CORDIC algorithms

FPGA Implementation of sequence detector,CORDIC

in.linkedin.com/pub/raja-upputuri/1

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