Report_ashit
Transcript of Report_ashit
1
INTRODUCTION
The alarm annunciator systems are used to give alarms for some dangerous
conditions e.g. fire, gas leakage, temperature rise, water over-flow etc. In most of
the industries now-a-days safety is matter of concern. So, at various parts of the
factory special sensors are used to monitor various physical quantities and provide
an alarm in case of any dangerous situation in order to report to the main control
room.
Block Diagram:
The basic the functioning of the Alarm Annunciator System can be well understood
from the following functional block diagram,
Input Processor Output
The function of each of these components is as given below:
1. Sensors:
These are the inputs to the micro-controller unit. The sensor used in various
industries includes the temperature sensor, fire detector, water level detector,
pressure sensor, smoke detector etc, depending upon the type of industry.
These basically consist of the transducer circuits that essentially convert the
physical quantities into the corresponding electrical signals to be given to the
electrical circuits so a specific voltage is developed across the element according
Sensors
Micro-controller
Display &
Alarm
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to the magnitude of the physical quantity.
The sensors are generally located at remote location from the main control room. A
separate power supply is used for these sensors in order to provide an electrical
isolation between the main circuit and the sensor circuit.
2. Processor:
The processor can be a micro-processor or a micro-controller, to process the data
given by the sensors. The technique of processing the data depends upon the user
who then suitably programs this micro-controller unit.
The user has to define the different alarm conditions to observe by programming
the micro-controller using assembly language program or by programming in
higher level languages like C, C++ etc. The processor thus provides an output
under occurrence of any fault to the display and alarm unit.
3. Display & Alarm:
The display and alarm unit ultimately finishes the role of the alarm annunciator by
displaying the fault visually through LEDs (Light Emitting Diode), LCD (Liquid
Crystal Display) etc and also audibly with the help of buzzers, horn, siren etc.
This permits the operator on the control room to inform a person installed at the
location where the fault has occurred. This person can immediately look into the
fault and rectify the same before occurrence of any dangerous situation. This
removes the need of the person at each location to carefully observe for any faults
occurring at any location of the industry.
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4 CHANNEL ALARM ANNUNCIATOR SYSTEM
The four channel alarm annunciator system can give alarm for different four fault
conditions. The front panel consists of a four windows, of four LEDs (Light Emitting
Diode) each corresponding to each channel and one LCD display. Even a buzzer
is included to provide the alarm. There are also three pushbuttons namely,
• ACCEPT,
• RESET, and
• TEST.
When there is no fault at any channel of the alarm annunciator, all the LED
windows and the buzzer are off with no faults displayed in the LCD display.
Occurrence of Fault
Now, suppose a fault occurs at, say, channel three, then the window three starts
blinking i.e. the four LEDs of the channel three starts blinking with buzzer is turned
ON and the LCD displays channel 3 indicating the occurrence of fault.
When the operators detect such an alarm, he can ask the respective person to
look after the problem so as to undertake the required action.
Function of Pushbuttons:
The three pushbuttons used on the front panel of the annunciator used by the
operator having the following functions,
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• ACCEPT
The continuously ringing buzzer irritates, so the operator can press ACCEPT
button to tell the annunciator that he has detected the fault condition. Now Buzzer
is turned off and window is kept continuously on to indicate that it is accepted fault
i.e. the fault has not been solved as yet.
Now if fault is generated in say channel one, then again the buzzer starts ringing
with window one starts blinking and window three continuously on.
• RESET
When all faults are removed the operator can check it by pressing RESET button
to reset the annunciator, if all faults are removed then all windows and buzzer will
be off. But if still there is fault in some channel the buzzer starts ringing with
corresponding window starts blinking.
• TEST
The TEST button is given for testing. When it is pressed all windows starts blinking
and buzzer starts ringing until button is released. Thus operator can check whether
all LEDs and buzzer are working or not. So an occasional testing of the equipment
can also be very easily carried out by the operator.
Role of LCD Display:
The use of LCD display permits an easy understanding of faults. The display is
meant to show at which channel number (1, 2, 3 or 4) the fault has occurred and
the channel number whose fault has been accepted. When there are no faults the
display shows,
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FAULT AT CHANNEL NO. NONE ACCEPTED CHANNEL NO. NONE
Now, suppose a fault has occurred at say channel three then it shows,
FAULT AT CHANNEL NO. 3 ACCEPTED CHANNEL NO. NONE
And when this fault has been accepted by the operator i.e. pressing of ACCEPT button the respective fault gets accepted and accordingly the LCD display changes
to, FAULT AT CHANNEL NO. 3 ACCEPTED CHANNEL NO. 3
Hence, after rectification of the problem the display shows none for both.
FAULT AT CHANNEL NO. NONE ACCEPTED CHANNEL NO. NONE
Additional computer support can also be provided to the project. The system is
connected to personal computer using the data communication through the serial
port. The computer software is written in Microsoft Visual Basic. It provides the
status of each channel on the screen and also keeps record of various faults
occurred in the form of database. This information is stored in file as history and
can be used while planning security measures etc.
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PROGRAMMING The project of the micro-controller is done with the help of Assembly language
program. There are basically two programs, namely one as the master program
for the micro-controller to fulfill the basic functions of the annunciator and the
second for the working of the LCD Display.
MASTER PROGRAM BAUD9600 EQU 0FDH
HEADER EQU "H"
FOOTER EQU "F"
STX EQU "$"
ETX EQU "#"
RXSTFLG EQU 029H
STACK EQU 030H
PCON EQU 087H
RXMEM EQU 080H
TXMEM EQU 090H
DATAMEM EQU 0B0H
ORG 0000H
START: LJMP MAIN
ORG 0003H ; EXTERNAL INTERRUPT 0
; LJMP GETCMD
RETI
ORG 000BH ; TIMER0 INTERRUPT
RETI
ORG 0013H ; EXTERNAL INTERRUPT 1
7
RETI
ORG 001BH ; TIMER1 INTERRUPT
RETI
ORG 0023H ; SERIAL PORT INTERRUPTS
LJMP RXDATA
RETI
ORG 002BH ; TIMER2 INTERRUPT
; LJMP INTRT2
RETI
ORG 0040H
MAIN: MOV SP, #STACK ; INITIALISE STACK
MOV P1, #0FFH ; SET ALL 3 PORTS AS I/O PORTS
MOV P2, #0FFH
MOV P3, #0FFH
NOP
NOP
MOV RXSTFLG, #HEADER; SET RECIEVE STATUS FLAG = HEADER
LCALL FILL1
SETB P3.3
LCALL INIT96 ; INITIALISE SERIAL PORT WITH 9600
BAUDRATE
SETB IE.4 ; ENABLE SERIAL PORT INTERRUPT
SETB EA ; ENABLE COMMON INTERRUPT CONTROL BIT
AGAIN:; LCALL GET1
LCALL GET2
LJMP AGAIN
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FILL1: MOV B, #004H
MOV R0, #DATAMEM
MOV A, #041H
FILLN: MOV @R0, A
INC R0
INC A
DJNZ B, FILLN
RET
INIT96: MOV PSW, #00H
MOV TCON, #00H ; STOP TIMER1/0
MOV PCON, #00H ; SMOD=0 FOR BAUDRATE CALCULATION OF
9600
MOV IE, #080H
MOV SCON, #050H ; MODE=1, TX RX DISABLED
MOV TMOD, #00100001B; TIMER1 MODE=2, 8BIT, AUTORELOAD,
TIMER0=16 BIT
MOV TH1, #BAUD9600 ; BAUD9600=TH1= 0FDH
MOV TCON, #01000000B; TIMER 1 RUN ON
CLR RI
RET
GET1: MOV R0, #DATAMEM; R0 IS DATMEMORY POINTER
MOV R3, #000H ; R3 IS BYTE COUNTER
REPEAT: JNB P3.5, $ ; WAIT UNTIL STATUS SIGNAL BECOMES
HIGH
MOV P2, R3 ; PUT BYTENO ON DATABUS
INC R3 ; INCREMENT BYTE COUNTER
CLR P3.7 ; MAKE RD*=0
CLR P3.6 ; MAKE WR*=0
CLR P3.2 ; MAKE CS1*=0
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JB P3.5, $ ; WAIT UNTIL STATUS SIGNAL BECOMES
LOW
MOV P2, #0FFH ; MAKE DATABUS HIGH
SETB P3.7 ; MAKE RD*=1
SETB P3.6 ; MAKE WR*=1
SETB P3.2 ; MAKE CS1*=1
JNB P3.5, $ ; WAIT UNTIL STATUS SIGNLA BECOMES
HIGH
CLR P3.2 ; MAKE CS1*=0
JB P3.5, $ ; WAIT UNTIL STATUS BECOMES LOW
MOV @R0, P2 ; READ DATABYTE AND STORE IN MEMORY
INC R0 ; INCREMENT DATAMEMORY POINTER
SETB P3.2 ; MAKE CS1*=1
JNB P3.5, $ ; WAIT UNTILL STATUS BECOMES HIGH
MOV A, R0 ; REPEAT LOOP UNTIL 4 BYTES RECIEVED
CJNE A, #DATAMEM+4, REPEAT
RET
GET2: MOV R0, #DATAMEM+4; R0 IS DATMEMORY POINTER
MOV R3, #000H ; R3 IS BYTE COUNTER
REPET1: JNB P3.5, $ ; WAIT UNTIL STATUS SIGNAL BECOMES
HIGH
MOV P2, R3 ; PUT BYTENO ON DATABUS
INC R3 ; INCREMENT BYTE COUNTER
CLR P3.7 ; MAKE RD*=0
CLR P3.6 ; MAKE WR*=0
CLR P3.4 ; MAKE CS2*=0
JB P3.5, $ ; WAIT UNTIL STATUS SIGNAL BECOMES
LOW
MOV P2, #0FFH ; MAKE DATABUS HIGH
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SETB P3.7 ; MAKE RD*=1
SETB P3.6 ; MAKE WR*=1
SETB P3.4 ; MAKE CS2*=1
JNB P3.5, $ ; WAIT UNTIL STATUS SIGNLA BECOMES
HIGH
CLR P3.4 ; MAKE CS2*=0
JB P3.5, $ ; WAIT UNTIL STATUS BECOMES LOW
MOV @R0, P2 ; READ DATABYTE AND STORE IN MEMORY
INC R0 ; INCREMENT DATAMEMORY POINTER
SETB P3.4 ; MAKE CS2*=1
JNB P3.5, $ ; WAIT UNTILL STATUS BECOMES HIGH
MOV A, R0 ; REPEAT LOOP UNTIL 4 BYTES RECIEVED
CJNE A, #DATAMEM+8, REPEAT
RET
RXDATA: CLR IE.4
PUSH PSW
PUSH 000H
PUSH 001H
JNB RI, $
CLR RI
MOV A, RXSTFLG
CJNE A, #HEADER, CHKFUT
MOV A, SBUF
CJNE A, #STX, RXRET
MOV R0, #RXMEM
MOV @R0, A
INC R0
MOV RXSTFLG, #FOOTER
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RXRET: POP 001H
POP 000H
POP PSW
SETB IE.4
RETI
CHKFUT: MOV A, SBUF
MOV @R0, A
INC R0
CJNE A, #ETX, FTRET
MOV RXSTFLG, #HEADER
LCALL PROCESS
FTRET: LJMP RXRET
PROCESS: MOV R0, #RXMEM+1
MOV A,@R0
CJNE A, #"G", PRORET
MOV R0, #TXMEM
MOV @R0, #STX
INC R0
MOV B, #008H
MOV R1, #DATAMEM
NXTF: MOV A,@R1
MOV @R0, A
INC R1
INC R0
DJNZ B, NXTF
MOV @R0, #ETX
LCALL TXDATA
PRORET: RET
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TXDATA: MOV R0, #TXMEM
CLR P3.3
MOV B, #00AH
CLR TI
TXNXT: NOP
NOP
MOV SBUF,@R0
NOP
NOP
JNB TI, $
CLR TI
INC R0
DJNZ B, TXNXT
SETB P3.3
RET
BLNKDLY: MOV R5, #0FFH
D1: MOV R6, #0FFH
DJNZ R6, $
DJNZ R6, $
DJNZ R6, $
DJNZ R6, $
DJNZ R5, D1
RET
DBNCDLY: MOV R5, #028H
D2: MOV R6, #0FFH
DJNZ R6, $
DJNZ R5, D2
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RET
END
LCD PROGRAM 1 #include <studio’s>
//#include <string’s>
#include <atmel\At89x52.h>
#include <LCD_ROUTINES.h>
#define HEADER '$'
#define FOOTER '#'
void isr_ext0(void);
void isr_timer0(void);
void isr_ext1(void);
void isr_timer1(void);
void isr_serial(void);
void INITIALISE(void);
void INIT_SERIAL_PORT(void);
void TRANSMIT_QUERY(void);
void DELAY_n_ms(unsigned int);
unsigned char DISP_BUF[]="FLT CH.= NONE ACT CH.= NONE ";
unsigned char code temp[]=' ',' ','N','O','N','E',' ',' ';
bit PACKET_READY_FLAG;
bit HEAD_FOOT_FLAG ;
unsigned char RXBUF[16];
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unsigned char RXBUF_POINTER;
unsigned char TXBUF[]="$G#";
void isr_ext0(void) interrupt 0
void isr_timer0(void) interrupt 1
void isr_ext1(void) interrupt 2
void isr_timer1(void) interrupt 3
void isr_serial(void) interrupt 4
unsigned char RX_BYTE;
if (RI==1)
RI=0;
RX_BYTE=SBUF;
if (HEAD_FOOT_FLAG==0)
if (RX_BYTE == HEADER)
RXBUF[0]=RX_BYTE;
RXBUF_POINTER=1;
HEAD_FOOT_FLAG=1;
else
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RXBUF[RXBUF_POINTER]=RX_BYTE;
RXBUF_POINTER++;
if (RX_BYTE == FOOTER)
PACKET_READY_FLAG=1;
void INITIALISE(void)
PSW=0;
P1=0xFF;
P3=0xF7;
PACKET_READY_FLAG=0;
HEAD_FOOT_FLAG=0;
void INIT_SERIAL_PORT(void)
TR1=0;
TF1=0;
PCON=0;
SCON=0x50;
TMOD=0x21;
TH1=0xFD;
TR1=1;
RI=0;
TI=0;
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void TRANSMIT_QUERY(void)
unsigned char tx_counter;
EA=0;
for (tx_counter=0;tx_counter<3; tx_counter++)
TI=0;
SBUF=TXBUF[tx_counter];
while(TI==0)
TI=0;
ES=1;
EA=1;
void FILL_NONE(unsigned char address)
unsigned char i;
for (i=0;i<=7;i++)
DISP_BUF[address+i]=temp[i];
//memcpy(&DISP_BUF[address],temp,8);
/* DISP_BUF[address]=' ';
DISP_BUF[address+1]=' ';
DISP_BUF[address+2]='N';
DISP_BUF[address+3]='O';
DISP_BUF[address+4]='N';
DISP_BUF[address+5]='E';
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DISP_BUF[address+6]=' ';
DISP_BUF[address+7]=' ';*/
void PROCESS_PACKET(void)
unsigned char packet_ctr,flt_ctr=8,act_ctr=24;
if (RXBUF[0]==HEADER &&RXBUF[9]==FOOTER)
FILL_NONE(8);
FILL_NONE(24);
for (packet_ctr=1;packet_ctr<=4;packet_ctr++)
if (RXBUF[packet_ctr]=='F')
DISP_BUF[flt_ctr]=packet_ctr|0x30;
flt_ctr++;
DISP_BUF[flt_ctr]=',';
flt_ctr++;
continue;
if (RXBUF[packet_ctr]=='A')
DISP_BUF[act_ctr]=packet_ctr|0x30;
act_ctr++;
DISP_BUF[act_ctr]=',';
act_ctr++;
if (flt_ctr>8)
flt_ctr-=1;
while(flt_ctr<16)
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DISP_BUF[flt_ctr]=' ';
flt_ctr++;
if (act_ctr>24)
act_ctr-=1;
while(act_ctr<32)
DISP_BUF[act_ctr]=' ';
act_ctr++;
void DELAY_n_ms(unsigned int count)
while(count)
DELAY_1ms();
count--;
void main(void)
EA=0;
INITIALISE();
INIT_SERIAL_PORT();
INIT_LCD();
DISP_LCD(&DISP_BUF[0], 0x80,16);
DISP_LCD(&DISP_BUF[16], 0xC0,16);
while(1)
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PACKET_READY_FLAG=0;
HEAD_FOOT_FLAG=0;
TRANSMIT_QUERY();
//GET_RESPONSE();
DELAY_n_ms(30);
if (PACKET_READY_FLAG)
PROCESS_PACKET();
DISP_LCD(&DISP_BUF[0], 0x80,16);
DISP_LCD(&DISP_BUF[16], 0xC0,16);
DELAY_n_ms(460);
LCD PROGRAM 2 #include <stdio.h>
#include <atmel\At89x52.h>
#include <intrins.h>
#define DATAPORT P1
#define LCD_EN P3_3
#define LCD_RS P3_4
#define LCD_R_W P3_5
#define BUSY_BIT P1_7
void DELAY_1ms(void);
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void COMMAND(unsigned char);
void LCD_SETUP(unsigned char);
void BUSY(void);
void INIT_LCD(void);
void DISPLAY_CHAR(unsigned char);
void DISP_LCD(unsigned char *, unsigned char,unsigned char);
char code LCD_INIT_CMD[]=0x38,0x0C,0x06,0x01;
void DELAY_1ms(void)
unsigned char count1,count2;
for (count1=2;count1>0; count1--)
for (count2=229;count2>0; count2--)
void COMMAND(unsigned char command_byte)
P1=command_byte; //MOVE PORT1 WITH ACCUMULATOR
LCD_R_W=0; //CLEAR R_W_BIT
LCD_RS=0; //CLEAR RS_BIT
LCD_EN=1; //SET ENABLE_BIT
P1=command_byte; //MOVE PORT1 WITH ACCUMULATOR
_nop_();
_nop_();
LCD_EN=0; //CLEAR ENABLE_BIT
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void LCD_SETUP(unsigned char del_count)
for (del_count=del_count;del_count>0;del_count--)
DELAY_1ms();
COMMAND(0x30);
void BUSY(void)
LCD_EN=0;
P1=0xFF;
LCD_RS=0;
LCD_R_W=1;
while(BUSY_BIT)
LCD_EN=0;
LCD_EN=1;
LCD_EN=0;
void INIT_LCD(void)
unsigned char cmd_count;
LCD_SETUP(15);
LCD_SETUP(5);
LCD_SETUP(1);
for (cmd_count=0;cmd_count<4;cmd_count++)
BUSY();
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COMMAND(LCD_INIT_CMD[cmd_count]);
*************************************************************
************
******************** DISPLAY_CHAR SUBROUTINE
***************************
* DISPLAY ROUTINE WRITES ASCCI CODE OF CHARACTER TO BE
DISPLAYED, IN LCD
* DISPLAY RAM. THE ADDRESS OF DD RAM MUST SET USING 'COMMAND'
SUBROUTINE.
* ASCII CODE MUST BE PASSED IN DISP_BYTE wHILE CALLING THIS
ROUTINE.
*************************************************************
************
*/
void DISPLAY_CHAR(unsigned char DISP_BYTE)
P1= DISP_BYTE; //MOVE PORT1 WITH ACCUMULATOR
LCD_RS=1; //SET RS_BIT
LCD_R_W=0; //CLEAR R_W_BIT
LCD_EN=1; //SET ENABLE_BIT
P1= DISP_BYTE; //MOVE PORT1 WITH ACCUMULATOR
_nop_();
_nop_();
LCD_EN=0; //CLEAR ENABLE_BIT
LCD_RS=1; //CLEAR RS_BIT
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*************************************************************
****************
*************************DISP_LCD****************************
************
* THIS ROUTINE WRITES SPECIFIED NO> BYTES DATA (MAX 16), OF
UPPER OR LOWER
* LINE, IN DD RAM OF LCD. STARTING ADDRESS OF LINE MUST BE
PASSED IN SA.
* (SA=0x80=UPPER LINE; SA=0xC0=LOWER LINE).
* PASS NO> OF BYTES TO WRITE IN BYTE_COUNT (MAX 16).
* Also pass Starting address of SOURCE DATA BUFFER IN *buffer
*************************************************************
************
*/
void DISP_LCD(unsigned char *buffer, unsigned char
SA,unsigned char BYTE_COUNT)
BUSY();
COMMAND(SA);
//BYTE_COUNT=BYTE_COUNT
for(;BYTE_COUNT>0;BYTE_COUNT--)
BUSY();
DISPLAY_CHAR(*buffer);
buffer++;
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TEMPERATURE SENSOR
+12V
+12V
R1100
R2
100
+
-
U2
AD741
3
26
7 14 5
R4
100
R5100
R6100
R7100
RTD
R3100
R10
100
R11
1K
R12
1K
R131K
R141K
R9R9 100
Circuit Diagram
Working: 1. The temperature is sensed with the help of the RTD (Resistance Temperature
Dependent) which converts it into corresponding electrical signals.
2. Inverting terminal of the Op-Amp is kept fixed at a specific voltage level.
3. But, the non inverting terminal of Op-Amp gets voltage that varies in
accordance with the temperature.
4. When the temperature is below a specified limit the bridge is balanced
providing no output signal.
5. But, when the temperature exceeds a specified limit the bridge is unbalanced
and the voltage at the non-inverting input of the Op-Amp increases.
6. So, the comparator gives the necessary (low or high), output voltage
depending whether the temperature is above/below the desired limit.
7. The output is thus given to the annunciator.
Bridge
Comparator
25
WATER LEVEL DETECTOR
Circuit diagram
1. Here water acts as a conductor for flow of electric current.
2. One of the conductor (i.e. wire), is connected to DC power supply (+Vcc) is
kept fixed inside the jar somewhat near the bottom level dipped in the water.
3. The other conductor that decides the level of water to be judged is kept fixed
at a level inside the jar at some specific level been dipped in the water.
4. If the desired water level is not reached then the conductor connected to Vcc
remains inside the water while the other conductor B is not and so the circuit
is incomplete, the current does not flow and the transistor does not get the
required base drive. Hence, the transistor and the LED are OFF.
5. Now, if the water level increases to the required level, the two conductors are
inside the water completing the circuit path for the flow of current. So, the
transistor gets the required base drive and is turned ON that turns ON the
LED.
6. The output from the collector of the transistor is given to that annunciator.
26
LIGHT DETECTOR
Circuit Diagram
Working:
1. Here, a reference voltage of V1 is applied at the inverting input of the
comparator.
2. The Light Dependent Resistor (LDR) and a potentiometer R3 common point is
given to non-inverting terminal V2 of the comparator.
3. When light is not present on the LDR, its resistance is high providing high
voltage to the non-inverting input of the comparator and so the LED glows.
4. But, when the light falls on the LDR, its resistance decreases and also the
voltage at the non-inverting input of the comparator and so the LED does not
glow.
5. Rpot value is adjusted to get V2 just less than V1 reference voltage.
6. Note the load can be buzzer, LED, etc and the output voltage is thus given to
the annunciator.
27
INFRARED SENSOR This infrared sensor consists of two sections namely the transmitter and the
receiver.
INFRARED TRANSMITTER:
Circuit Diagram
Working:
1. The circuit uses the 555 IC as an Astable multi-vibrator.
2. At the output of this, two infrared LEDs are connected in series to emit the
IR (Infrared) radiations.
3. The frequency of output oscillations is decided by the internal resistors RA
and RB and the capacitors C.
4. The output frequency is kept at 38 KHz.
5. These radiations are given to an IR receiver of TSOP 1738 circuit for
detection.
28
INFRARED RECEIVER:
Circuit Diagram
Working:
1. The circuit uses the TSOP 1738 IC to detect the infrared radiations of
frequency 38kHz given by the 555 IC astable multi-vibrators.
2. When the IR LEDs and this TSOP sensor are placed closed to each other,
the voltage on the output pin of TSOP 1738 is high and so the transistor
and the LED are both ON.
3. So the voltage at the collector of the transistor given to the annunciator is
low.
4. Now, if an obstacle comes in between the IR LEDs and the TSOP, its
output goes low thereby turning OFF the transistor and the LED.
5. Thus the collector voltage of the transistor goes high providing high
voltage output to the annunciator.
29
MAIN CIRCUIT DIAGRAM The main circuit diagram of the Alarm Annunciator project is as given below:
<Doc> <RevCode>
<Title>
A
1 1Saturday, February 01, 2003
Title
Size Document Number Rev
Date: Sheet of
+5V
+5V
+5V
+10V
+12V
+5V
+5V
+5V
+5V
+5V
D6
Y111.0592MHz
U1
AT89C52
9
18
19
20
2930
3140
12345678
2122232425262728
10
11
1213
14
15
16
17
3938373635343332
RST
XTAL2
XTAL1
GN
D
PSENALE/PROG
EA
/VP
P
VC
C
P1.0/T2P1.1/T2-EXP1.2P1.3P1.4P1.5P1.6P1.7
P2.0/A8P2.1/A9
P2.2/A10P2.3/A11P2.4/A12P2.5/A13P2.6/A14P2.7/A15
P3.0/RXD
P3.1/TXD
P3.2/INTOP3.3/INT1
P3.4/TO
P3.5/T1
P3.6/WR
P3.7/RD
P0.0/AD0P0.1/AD1P0.2/AD2P0.3/AD3P0.4/AD4P0.5/AD5P0.6/AD6P0.7/AD7
U2
74LS245
23456789
191
1817161514131211
20 10
A1A2A3A4A5A6A7A8
G
DIR
B1B2B3B4B5B6B7B8
VC
C
GN
D
R5330
R610K
R1
1K
R15330
R111K
R1210K
Q1
BC547
12
3
D2
4148
C210uF
C333pF
C4
33pF
C8CAP
SW1
U5
MAX232
13
8
11
101345
2
6
12
9
14
7
16
15
R1IN
R2IN
T1INT2
IN
C+C1-C2+C2-
V+
V-
R1OUT
R2OUT
T1OUT
T2O
UT
VC
C
GND
C1110uF
C1210uF
C13
10uF
C14
10uF
C1510uF
U4 MCT2E1
6
2
54
P1
PC COMM CONN
5
4
3
2
1
JP11 2
R13330K
3-24V BUZZER
1
2
JP21 2
JP31 2
D5
D3
D4
R14
1K
Q3BC547
12
3
I/P1
SUCH 8 I/PS
SUCH 8 O/PS
8 CHANNEL ALARM ANNUNCIATOR
ACCEPT
RESET
TEST
D TYPE 9 P
So the three sections i.e. the sensor, the micro-controller and the display
together forms the alarm annunciator circuit.
Sensor
Display &
Alarm
Micro-controller
30
PHOTO OF THE MAIN ANNUNCIATOR KIT
31
The films used for the printing of the PCB are as shown below,
LED CIRCUIT
MAIN CIRCUIT
LED CIRCUIT
32
COMPONENTS LIST
The various components used in the project are as given below:
INTEGRATED CIRCUITS: AT 89C52 MICROCONTROLLER
SN 74LS245 LATCH
MCT2E OPTOCOUPLER (4 nos.)
AD 741 SERIES OP-AMP (3 nos.)
NE 555 TIMER
LM 7805 REGULATOR
TRANSISTORS: BC 547 (6 nos.)
SENSORS: TSOP 1738
RTD
LDR
RESISTORS: 100Ω (10 nos.)
200 Ω
220 Ω
330 Ω
470 Ω
1KΩ (9 nos.)
2.2 KΩ
33
3.3KΩ
10 KΩ (5 nos.)
10 KΩ POT
330 KΩ (2 nos.)
BUZZER 3-24V (1 nos.) CAPACITORS:
33 pF (2 nos.) 0.0022 µF
0.01 µF
10 µF DIODES:
1N4148
LEDs (19 nos.)
IR LEDS (2 nos.)
LCD DISPLAY
JUMPERS (3 nos.) PUSH BUTTONS (3 nos.) CRYSTAL 11.0592 MHZ PRINTED CIRCUIT BOARDS (8 nos.) WIRES AND CONNECTORS
34
DATASHEETS The datasheets for the various components used in the project is as shown
below,
8-Bit Microcontroller with 8K Bytes Flash
AT89C52
Features
• Compatible with MCS-51™ Products
• 8K Bytes of In-System Reprogrammable Flash Memory
• Endurance: 1,000 Write/Erase Cycles
• Fully Static Operation: 0 Hz to 24 MHz
• Three-Level Program Memory Lock
• 256 x 8-Bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-Bit Timer/Counters
• Eight Interrupt Sources
• Programmable Serial Channel
• Low Power Idle and Power Down Modes
In addition it provides the following standard features: 8K bytes of Flash, 256
bytes of RAM, 32 I/O lines, three 16-bit timer/counters, six-vector two-level
interrupt architecture, a full duplex serial port, on-chip oscillator, and clock
circuitry.
35
Description
The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer
with 8K bytes of Flash programmable and erasable read only memory
(PEROM). The device is manufactured using Atmel’s high density nonvolatile
memory technology and is compatible with the industry standard 80C51 and
80C52 instruction set and pin out.
The on-chip Flash allows the program memory to be reprogrammed in-
system or by a conventional nonvolatile memory programmer. By combining a
versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C52 is a
powerful microcomputer which provides a highly flexible and cost effective
solution to many embedded control applications.
Pin Configurations
In addition, the AT89C52 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes. The Idle
Mode stops the CPU while allowing the RAM, timer/counters, serial port, and
interrupt system to continue functioning.
36
The Power Down Mode saves the RAM contents but freezes the oscillator, disabling
all other chip functions until the next hardware reset.
Block Diagram The block diagram for AT89C52 is as given below,
Pin Description
• VCC Supply voltage.
37
• GND Ground.
• Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can
sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as
high-impedance inputs.
Port 0 can also be configured to be the multiplexed low-order address/data bus
during accesses to external pro-gram and data memory. In this mode, P0 has
internal pull-ups.
Port 0 also receives the code bytes during Flash programming and outputs the
code bytes during program verification. External pull-ups are required during
program verification.
• Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they
are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1
pins that are externally being pulled low will source current (IIL) because of the
internal pull-ups.
In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external
count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX),
respectively, as shown in the following table.
Port 1 also receives the low-order address bytes during Flash programming and
verification.
38
Port Pin Alternate Functions
P1.0 T2 (external count input to Timer/Counter 2), clock-out
P1.1 T2EX (Timer/Counter 2 capture/reload trigger and direction control)
• Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output
buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they
are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2
pins that are externally being pulled low will source current (IIL) because of the
internal pull-ups.
Port 2 emits the high-order address byte during fetches from external program
memory and during accesses to external data memory that uses 16-bit addresses
(MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when
emitting 1s. During accesses to external data memory that uses 8-bit addresses
(MOVX @ RI); Port 2 emits the contents of the P2 Special Function Register.
Port 2 also receives the high-order address bits and some control signals during
Flash programming and verification.
• Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output
buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they
are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3
pins that are externally being pulled low will source current (IIL) because of the
pull-ups.
Port 3 also serves the functions of various special features of the AT89C51, as
shown in the following table. Port 3 also receives some control signals for Flash
programming and verification.
39
Port Pin Alternate Functions
P3.0 RXD (serial input port)
P3.1 TXD (serial output port)
P3.2 INT0 (external interrupt 0)
P3.3 INT1 (external interrupt 1)
P3.4 T0 (timer 0 external input)
P3.5 T1 (timer 1 external input)
P3.6 WR (external data memory write strobe)
P3.7 RD (external data memory read strobe)
• RST Reset input. A high on this pin for two machine cycles while the oscillator is running
resets the device.
• ALE/PROG Address Latch Enable is an output pulse for latching the low byte of the
address during accesses to external memory. This pin is also the program
pulse input (PROG) during Flash programming.
In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator
frequency and may be used for external timing or clocking purposes. Note,
however, that one ALE pulse is skipped during each access to external
data memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR location
8EH. With the bit set, ALE is active only during a MOVX or MOVC
instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-
disable bit has no effect if the microcontroller is in external execution mode.
40
• PSEN Program Store Enable is the read strobe to external program memory.
When the AT89C52 is executing code from external pro-gram memory,
PSEN is activated twice each machine cycle, except that two PSEN
activations are skipped during each access to external data memory.
• EA/VPP External Access Enable. EA must be strapped to GND in order to enable
the device to fetch code from external pro-gram memory locations starting
at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA
will be internally latched on reset.
EA should be strapped to VCC for internal program executions. This pin
also receives the 12-volt programming enable volt-age (VPP) during Flash
programming when 12-volt programming is selected.
• XTAL1 Input to the inverting oscillator amplifier and input to the internal clock
operating circuit.
• XTAL2 Output from the inverting oscillator amplifier.
Special Function Registers A map of the on-chip memory area called the Special Function Register (SFR).
Note that not all of the addresses are occupied, and unoccupied addresses may
not be implemented on the chip. Read accesses to these addresses will in general
return random data, and write accesses will have an indeterminate effect.
• Timer 2 Registers Control and status bits are contained in registers T2CON and T2MOD for Timer 2.
41
The register pair (RCAP2H,RCAP2L) are the Capture/Reload registers for Timer 2
in16-bit capture mode or 16-bit auto-reload mode.
• Interrupt Registers: The individual interrupt enable bits are in the IE register. Two priorities can be set
for each of the six interrupt sources in the IP register.
• Data Memory The AT89C52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy
a parallel address space to the Special Function Registers. That means the upper
128 bytes have the same addresses as the SFR space but are physically separate
from SFR space.
When an instruction accesses an internal location above address 7FH, the address
mode used in the instruction specifies whether the CPU accesses the upper 128
bytes of RAM or the SFR space. Instructions that use direct addressing access
SFR space.
For example, the following direct addressing instruction accesses the SFR at
location 0A0H (which is P2).
MOV 0A0H, #data
Instructions that use indirect addressing access the upper 128 bytes of RAM. For
example, the following indirect addressing instruction, where R0 contains 0A0H,
accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).
MOV @R0, #data
Note that stack operations are examples of indirect addressing, so the upper 128
bytes of data RAM are avail-able as stack space.
42
• Timer 0 and 1 Timer 0 and Timer 1 in the AT89C52 operate the same way as Timer 0 and Timer
1 in the AT89C51.
• Timer 2 Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event
counter. The type of operation is selected by bit C/T2 in the SFR T2CON.
Timer 2 has three operating modes: capture, auto-reload (up or down counting),
and baud rate generator. The modes are selected by bits in T2CON. Timer 2
consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register
is incremented every machine cycle. Since a machine cycle consists of 12
oscillator periods, the count rate is 1/12 of the oscillator frequency.
• Oscillator Characteristics
C1, C2 = 30 pF ± 10 pF for Crystals = 40 pF ± 10 pF for Ceramic Resonators
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier
that can be configured for use as an on-chip oscillator. Either a quartz crystal or
ceramic resonator may be used.
To drive the device from an external clock source, XTAL2 should be left
unconnected while XTAL1 is driven.
43
There are no requirements on the duty cycle of the external clock signal, since the
input to the internal clocking circuitry is from a divide-by-two flip-flop, but minimum
and maximum voltage high and low time specifications must be observed.
Absolute Maximum Ratings
44
TSOP17
PHOTO MODULES FOR PCM REMOTE CONTROL SYSTEMS
Available types for different carrier frequencies
Type fo
TSOP1730 30 kHz
TSOP1733 33 kHz
TSOP1736 36 kHz
TSOP1737 36.7 kHz
TSOP1738 38 kHz
TSOP1740 40 kHz
TSOP1756 56 kHz
Description
The TSOP17... – series are miniaturized receivers for infrared remote control
systems.
45
PIN diode and preamplifier are assembled on lead frame, the epoxy package is
designed as IR filter. The demodulated output signal can directly be decoded by
a microprocessor. TSOP17... is the standard IR remote control receiver series,
supporting all major transmission codes.
Features
• Photo detector and preamplifier in one package
• Internal filter for PCM frequency
• Improved shielding against electrical field disturbance
• TTL and CMOS compatibility
• Output active low
• Low power consumption
• High immunity against ambient light
• Continuous data transmission possible (up to 2400 bps)
Block Diagram
46
Absolute Maximum Ratings Tamb = 25°C
Parameter Test Conditions Symbol Value Unit
Supply Voltage (Pin 2) VS –0.3...6.0 V Supply Current (Pin 2) IS 5 mA Output Voltage (Pin 3) VO –0.3...6.0 V Output Current (Pin 3) IO 5 mA Junction Temperature Tj 100 _C Storage Temperature Range Tstg –25...+85 _C Operating Temperature Range Tamb –25...+85 _C Power Consumption (Tamb _ 85 _C) Ptot 50 mW Soldering Temperature t _ 10 s, 1 mm from case Tsd 260 _C
Basic Characteristics Tamb = 25°C
Parameter Test Conditions Symbol Min Typ Max Unit
VS = 5 V, Ev = 0 ISD 0.4 0.6 1.5 mA Supply Current (Pin 2) VS = 5 V, Ev = 40 klx, sunlight ISH 1.0 mA
Supply Voltage (Pin 2) VS 4.5 5.5 V
Transmission Distance Ev = 0, test signal d 35 m
IR diode TSAL6200, IF = 400 mA Output Voltage Low
(Pin 3) IOSL = 0.5 mA, Ee = 0.7 mW/m2, VOSL 250 mV
f = fo, tp/T = 0.4 Irradiance (30 – 40
kHz) Pulse width tolerance: Ee min 0.35 0.5 mW/m2
tpi – 5/fo < tpo < tpi + 6/fo, test signal (see fig.7)
Irradiance (56 kHz) Pulse width tolerance: Ee min 0.4 0.6 mW/m2
tpi – 5/fo < tpo < tpi + 6/fo, test signal (see fig.7)
Irradiance tpi – 5/fo < tpo < tpi + 6/fo Ee max 30 W/m2 Directivity Angle of half transmission distance j ±45 deg
47
Suitable Data Format
The circuit of the TSOP17... is designed in that way that unexpected output pulses
due to noise or disturbance signals are avoided.
A bandpassfilter, an integrator stage and an automatic gain control are used to
suppress such disturbances. The distinguishing mark between data signal and
disturbance signal are carrier frequency, burst length and duty cycle.
The data signal should fulfill the following condition:
• Carrier frequency should be close to center frequency of the bandpass (e.g. 38 kHz).
• Burst length should be 10 cycles/burst or longer.
• After each burst which is between 10 cycles and 70 cycles a gap time of at least 14
cycles is necessary.
• For each burst which is longer than 1.8ms a corresponding gap time is necessary at
some time in the data stream. This gap time should have at least same length as the
burst.
• Up to 1400 short bursts per second can be received continuously.
When a disturbance signal is applied to the TSOP17... it can still receive the data
signal. However the sensitivity is reduced to that level that no unexpected pulses will
occur.
Some examples for such disturbance signals which are suppressed by the TSOP17...
are:
• DC light (e.g. from tungsten bulb or sunlight).
• Continuous signal at 38 kHz or at any other frequency.
• Signals from fluorescent lamps with electronic ballast.
48
Dimensions in mm
49
Low Cost,
High Accuracy IC Op Amps
AD 741 Series
Mini-DIP (N) Package
TO-99 (H) Package
CONNECTION DIAGRAMS
GENERAL DESCRIPTION
The Analog Devices AD741 Series are high performance monolithic operational
amplifiers. All the devices feature full short circuit protection and internal
compensation.
+
-
-V
+V
v1 (Non-inverting input)
741 C
7
4
3
2
6
V2 (Non-inverting input)
VO (Output)
50
The Analog Devices AD741J, AD741K, AD741L, and AD741S are specially
tested and selected versions of the standard AD741 operational amplifier.
Improved processing and additional electrical testing guarantee the user
precision performance at a very low cost.
The AD741J, K and L substantially increase overall accuracy over the standard
AD741C by providing maximum limits on offset voltage drift and significantly
reducing the errors due to offset voltage, bias current, offset current, voltage
gain, power supply rejection and common-mode rejection.
For example, the AD741L features maximum offset voltage drift of 5 V/C,
offset voltage of 0.5 mV max, offset current of 5 nA max, bias current of 50 nA
max and a CMRR of 90 dB min. The AD741S offers guaranteed performance
over the extended temperature range of –55C to +125C, with max offset
voltage drift of 15 µV/°C, max offset voltage of 4 mV, max offset current of 25 nA,
and a minimum CMRR of 80 dB.
HIGH OUTPUT CAPABILITY
Both the AD741J and AD741S offer the user the additional advantages of high
guaranteed output current and gain at low values of load impedance.
The AD741J guarantees a minimum gain of 25,000 swinging ±10 V into a 1 kW
load from 0°C to +70°C. The AD741S guarantees a minimum gain of 25,000
swinging ±10 V into a 1 kW load from –55°C to +125°C. All devices feature full
short circuit protection, high gain, high common-mode range and internal
compensation. The AD741J, K and L are specified for operation from 0 to +70°C
and are available in both the TO-99 and mini-DIP packages.
51
AD741 Series–SPECIFICATIONS
(typical @ +25°C and +15 V dc, unless otherwise noted)
AD741C Model Min Typ Max OPEN-LOOP GAIN
RL = 1kΩ, VO = ± 10 V 20,000 200,000 TA = min to max RL = 2 kW 15,000
OUTPUT CHARACTERISTICS
Voltage @ RL = 1 kΩ, TA = min to max 610 ± 13 Short Circuit Current 25
FREQUENCY RESPONSE Unity Gain, Small Signal 1
Slew Rate 0.5 Rise Time CL ≤ 10 V p-p 0.3
Overshoot 5.0 INPUT OFFSET VOLTAGE
Initial, RS ≤ 10 kΩ, Adjust to Zero 1.0 6.0 TA = min to max 1.0 7.5
INPUT OFFSET CURRENT Initial 20 200
TA = min to max 40 300 Average vs. Temperature INPUT BIAS CURRENT
Initial 80 500 TA = min to max 120 800
INPUT IMPEDANCE DIFFERENTIAL 0.3 2.0
INPUT VOLTAGE RANGE
Differential, max Safe Common-Mode, max Safe Common-Mode Rejection,
± 12 ± 13
RS = ≤10 kΩ, TA = min to max, VIN = ±12 V 70 90
POWER SUPPLY Rated Performance ± 15
Power Supply Rejection Ratio 30 150
Quiescent Current 1.7 2.8
Power Consumption 50 85
TEMPERATURE RANGE Operating Rated Performance 0 +70
Storage –65 +150
52
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings AD741C
Supply Voltage ± 18 V
Internal Power Dissipation 500 mW
Differential Input Voltage ± 30 V
Input Voltage ± 15 V
Storage Temperature Range –65°C to +150°C
Lead Temperature (Soldering, 60 sec) +300°C
Output Short Circuit Duration Indefinite
OUTLINE DIMENSIONS Dimensions shown in inches and (mm).
Mini DIP (N)
53
BC547 / BC547A / BC547B / BC547C
Discrete POWER & Signal Technologies
NPN General Purpose Amplifier This device is designed for use as general purpose amplifiers and switches requiring
collector currents to 300 mA.
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter Value Units
VCEO Collector-Emitter Voltage 45 V
VCES Collector-Base Voltage 50 V
VEBO Emitter-Base Voltage 6.0 V
IC Collector Current - Continuous 500 mA
TJ, Tstg Operating and Storage Junction Temperature Range -55 to +150 °C
These ratings are limiting values above which the serviceability of any
semiconductor device may be impaired.
1. These ratings are based on a maximum junction temperature of 150 degrees C.
2. These are steady state limits. The factory should be consulted on applications
involving pulsed or low duty cycle operations.
54
Thermal Characteristics TA = 25°C unless otherwise noted
Thermal Characteristics TA = 25°C unless otherwise noted
Max Symbol Characteristic
BC547 / A / B / C Units
PD Total Device Dissipation Derate above 25°C 625 5.0
mW mW/°C
RqJC Thermal Resistance, Junction to Case 83.3 °C/W
RqJA Thermal Resistance, Junction to Ambient 200 °C/W
Electrical Characteristics TA = 25°C unless otherwise noted
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Max Units
OFF CHARACTERISTICS
V(BR)CEO Collector-Emitter Breakdown Voltage IC = 1.0 mA, IB = 0 45 V
V(BR)CBO Collector-Base Breakdown Voltage IC = 10 mA, IE = 0 50 V
V(BR)CES Collector-Base Breakdown Voltage IC = 10 mA, IE = 0 50 V
V(BR)EBO Emitter-Base Breakdown Voltage IE = 10 mA, IC = 0 6.0 V
ICBO Collector Cutoff Current VCB = 30 V, IE = 0 15 nA
ON CHARACTERISTICS
hFE DC Current Gain VCE = 5.0 V, IC =
2.0 mA 547
110 800
VCE(sat) Collector-Emitter Saturation Voltage
IC = 10 mA, IB = 0.5 mA IC = 100 mA, IB
= 5.0 mA 0.25
0.60 V V
VBE(on) Base-Emitter On Voltage
VCE = 5.0 V, IC = 2.0 mA VCE = 5.0 V,
IC = 10 mA 0.58 0.70
0.77 V V
SMALL SIGNAL CHARACTERISTICS
hfe Small-Signal Current Gain
IC = 2.0 mA, VCE = 5.0 V, f = 1.0 kHz 125 900
55
Optocoupler, Phototransistor Output, With Base Connection
Features
• Interfaces with common logic families
• Input-output coupling capacitance < 0.5 pF
• Industry Standard Dual-in line 6-pin package
• 5300 VRMS isolation test voltage
• Lead-free component
• Component in accordance to RoHS 2002/95/EC and WEEE 2002/96/EC
Pin Diagram
The optocoupler basically accomplishes the function of providing the necessary
electrical isolation in the circuit. This isolation performance is accomplished through
Vishay double molding isolation manufacturing process.
56
The input is given to the Light Emitting Diode that provides the required output to be
detected by the photo transistor. The Light Emitting Diode and the photo transistor
are inside the IC. So coupling of energy is thus through light and not through
electrical current.
Applications
• AC mains detection
• Reed relay driving
• Switch mode power supply feedback
• Telephone ring detection
• Logic ground isolation
• Logic coupling with high frequency noise rejection
Description
In this Standard Single Channel Phototransistor Couplers, the MCT2/ MCTE family
is an Industry Standard Single Channel Phototransistor. Each optocoupler consists
of gallium arsenide infrared LED and a silicon NPN phototransistor. These couplers
are underwriters Laboratories (UL), listed to comply with a 5300 VRMS isolation test
voltage.
These isolation processes and the Vishay ISO9001 quality program results in the
highest isolation performance available for a commercial plastic phototransistor
optocoupler.
The devices are available in lead formed configuration suitable for surface mounting
and are available either on tape and reel, or in standard tube shipping containers.
57
Absolute Maximum Ratings
INPUT
Parameter Test condition Symbol Value Unit Reverse voltage VR 6.0 V Forward current IF 60 mA Surge current t ≤ 10 μs IFSM 2.5 A
Power dissipation Pdiss 100 mW
Output Parameter Test condition Symbol Value Unit
Collector-emitter breakdown VCEO 70 V
Emitter-base breakdown voltage BVEBO 7.0 V
IC 50 mA Collector current
t < 1.0 ms IC 100 mA Power dissipation Pdiss 150 mW
Coupler
Parameter Test condition Symbol Value Unit Isolation test voltage VISO 5300 VRMS
Creepage ≥ 7.0 mm Clearance ≥ 7.0 mm
Isolation thickness between ≥ 0.4 mm
emitter and detector Comparative tracking
index per DIN IEC 112/VDE0303,part 1
175
VIO = 500 V, Tamb = 25 °C RIO 1012 Ω
Isolation resistance VIO = 500 V, Tamb = 100 °C RIO 1011 Ω
Storage temperature Tstg - 55 to + 150 °C Operating temperature Tstg - 55 to + 100 °C Junction temperature Tj 100 °C
Soldering temperature max. 10 s dip soldering:
distance to seating plane ≥ 1.5 mm
Tsld 260 °C
58
Electrical Characteristics
Tamb = 25 °C, unless otherwise specified
Minimum and maximum values are testing requirements. Typical values are the
characteristics of the device and are the result of engineering evaluation. Typical
values are for information only and are not part of the testing requirements.
Input
Parameter Test condition Symbol Min Typ. Max Unit Forward voltage IF = 20 mA VF 1.1 1.5 V
Reverse current VR = 3.0 V IR 10 μA Capacitance VR = 0, f = 1.0 MHz CO 25 pF
Output
Parameter Test condition Symbol Min Typ. Max Unit Collector-emitter
breakdown voltage IC = 1.0 mA, IF = 0
mA BVCEO 30 V
Emitter-collector breakdown voltage
IE = 100 μA, IF = 0 mA BVECO 7.0 V
Collector-base breakdown voltage
IC = 10 μA, IF = 0 mA BVCBO 70 V
Collector-emitter leakage current
VCE = 10 V, IF = 0 mA ICEO 5.0 50 nA
Collector-base leakage current
VCE = 10 V, IF = 0 mA ICBO 20 nA
Collector-emitter capacitance VCE = 0 CCE 10 pF
Coupler
Parameter Test condition Symbol Min Typ. Max Unit Resistance,
input to output RIO 100 GΩ
Capacitance (input-output)
CIO 0.5 pF
59
Current Transfer Ratio
Parameter Test condition Symbol Min Typ. Max UnitDC Current Transfer
Ratio VCE = 10 V, IF = 10 mA CTRDC 20 60 %
Switching Characteristics
Parameter Test condition Symbol Min Typ. Max Unit
Switching time IC = 2 mA, RL = 100 Ω, VCE = 10 V
ton, toff 10 μs
Package Dimensions in Inches (mm)
60
NE/SA/SE555/SE555C
Timer
PIN CONFIGURATION
FEATURES • Max. operating frequency greater than 500 kHz
• Timing from microseconds to hours
• Operates in both astable and mono-stable modes
• High output current
• Adjustable duty cycle
• TTL compatible
• Temperature stability of 0.005% per °C
DESCRIPTION The 555 monolithic timing circuit is a highly stable controller capable of producing
accurate time delays, or oscillation. In the time delay mode of operation, the time is
precisely controlled by one external resistor and capacitor.
61
For a stable operation as an oscillator, the free running frequency and the duty cycle
are both accurately controlled with two external resistors and one capacitor. The
circuit may be triggered and reset on falling waveforms, and the output structure can
source or sink up to 200 mA.
BLOCK DIAGRAM
APPLICATIONS
• Precision timing
• Pulse generation
• Sequential timing
• Time delay generation
• Pulse width modulation
62
ABSOLUTE MAXIMUM RATINGS
SYMBOL PARAMETER RATING UNIT
VCC Supply voltage SE555 NE555, SE555C, SA555 +18 +16 V
PD Maximum allowable power dissipation 600 mW
Operating ambient temperature range NE555 SA555 0 to +70 –40 to +85 °C °C Tamb
SE555, SE555C –55 to +125 °C Tstg Storage temperature range –65 to +150 °C
TSOLD Lead soldering temperature (10 sec max) +230 °C
DC AND AC ELECTRICAL CHARACTERISTICS Tamb = 25 °C, VCC = +5 V to +15 V unless otherwise specified.
NE555/SA555/SE555C
SYMBOL PARAMETER TEST CONDITIONS Min Typ Max
UNIT
VCC Supply voltage 4.5 16 V
ICC Supply current
(low state) VCC = 5 V, RL = ∞ 3 6 mA
VC Control voltage level VCC = 5 V 2.6 3.33 4.0 V
VTH Threshold voltage VCC = 5 V 2.4 3.33 4.2 V
ITH Threshold current 0.1 0.25 mA
VTRIG Trigger voltage VCC = 5 V 1.1 1.67 2.2 V
ITRIG Trigger current VTRIG = 0 V 0.5 2.0 mA
VRESET Reset voltage VCC = 15 V, VTH = 10.5
V 0.3 1.0 V
IRESET Reset current VRESET = 0.4 V
VRESET = 0 V 0.1 0.4 0.4 1.5 mA
VOH HIGH-level output
voltage
VCC = 5 V ISOURCE =
100 mA 2.75 3.3 V
63
DIP8: plastic dual in-line package; 8 leads (300 mil)
64
LM78XX Series
3-Terminal Positive Regulators
Features • Complete specifications at 1A load
• Output voltage tolerances of ±2% at Tj = 25°C and ±4% over the temperature
range
• Line regulation of 0.01% of VOUT/V of ΔVIN at 1A load
• Load regulation of 0.3% of VOUT/A (LM340A)
• Internal thermal overload protection
• Internal short-circuit current limit
• Output transistor safe area protection
General Description
The LM78XXC monolithic 3-terminal positive voltage regulators employ internal
current-limiting, thermal shutdown and safe-area compensation, making them
essentially indestructible. If adequate heat sinking is provided, they can deliver
over 1.0A output current. They are intended as fixed voltage regulators in a wide
range of applications including local (on-card) regulation for elimination of noise
and distribution problems associated with single-point regulation.
Fixed Output Regulator
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In addition to use as fixed voltage regulators, these devices can be used with
external components to obtain adjustable output voltages and currents.
Considerable effort was expended to make the entire series of regulators easy to
use and minimize the number of external components. It is not necessary to
bypass the output, although this does improve transient response. Input bypassing
is needed only if the regulator is located far from the filter capacitor of the power
supply.
The 5V, 12V, and 15V regulator options are available in the steel TO-3 power
package. The LM78XXC series is available in the TO-220 plastic power package.
TO-220 Power Package (T)
Absolute Maximum Ratings
DC Input Voltage 35V
Internal Power Dissipation Internally Limited
Maximum Junction Temperature 150°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec.) 230°C
Temperature Range (TA) 0°C to +125°C
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LM78XX Electrical Characteristics
IOUT = 1A, 0°C ≤ TJ ≤ + 125°C (LM340A) unless otherwise specified
Output Voltage 5V
Input Voltage (unless otherwise noted)
10V Units
Symbol
Parameter Conditions Min Typ Max
TJ = 25°C 4.9 5 5.1 V
PD ≤ 15W, 5 mA ≤ IO ≤ 1A 4.8 5.2 V
VO
Output Voltage VMIN ≤ VIN ≤ VMAX (7.5 ≤ VIN ≤ 20) V
IO = 500 mA 10 mV
ΔVIN (7.5 ≤ VIN ≤ 20) V
TJ = 25°C 3 10 mV
ΔVIN (7.5 ≤ VIN ≤ 20) V
TJ = 25°C 4 mV
Over Temperature 12 mV
ΔVO
Line Regulation
ΔVIN (8 ≤ VIN ≤ 12) V
TJ = 25°C 10 25 mV
5 mA ≤ IO ≤
1.5A
250 mA ≤ IO
≤ 750 mA
15 mV ΔVO
Load Regulation Over Temperature
5mA ≤ IO ≤ 1A
25 mV
TJ = 25°C 6 mA IQ
Quiescent Current Over Temperature 6.5 mA
Dropout Voltage TJ = 25°C,
IO = 1A 2.0 V
Output Resistance f=1kHz 8 mΩ RO
Short-Circuit
Current
TJ = 25°C 2.1 A
VIN Input Voltage
Required to
Maintain
TJ = 25°C 7.5 14.5 17.5 V
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Physical Dimensions inches (millimeters) unless otherwise noted
TO-220 Power Package (T)
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SN74LS245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
Features • 3-State Outputs Drive Bus Lines Directly
• PNP Inputs Reduce dc Loading on Bus Lines
• Hysteresis at Bus Inputs Improves Noise Margins
• Typical Propagation Delay Times Port to Port, 8 ns
Pin diagram
Description
These octal bus transceivers are designed for asynchronous two-way
communication between data buses. The control-function implementation minimizes
external timing requirements. The devices allow data transmission from the A bus to
the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can disable the device so
that the buses are effectively isolated.
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FUNCTION TABLE
INPUTS
OE DIROPERATION
L L B data to A bus
L H A data to B bus
H X Isolation
ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Package thermal impedance DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
N package . . .. . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
NS package . . . . . .. . . . . . . . . . . . . . . . . . . . . 60°C/W
Storage temperature range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Recommended Operating Conditions
SN74LS245
MIN NOM MAXUNIT
VCC Supply voltage 4.75 5 5.25 V
IOH High-level output
current –15 mA
IOL Low-level output
current 24 mA
TA Operating free-air
temperature 0 70 °C
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Physical dimensions
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LCD MANUAL
The Oriole's Display Module (ODM) is a dot matrix liquid crystal display that
displays alphanumeric, Kana (Japanese) characters and symbols. The built-in
controller & driver LSIs provide convenient connectivity between a dot matrix LCD
and most 4 or 8 bit microprocessors or microcontrollers.
All the functions required for a dot matrix liquid crystal display drive are internally
provided. Internal refresh is provided by the ODM. The CMOS technology makes
the device ideal for Applications in hand held, portable and the other battery
powered instruments with low power consumption.
The data bus with MPU is available either for 8 bits 1-operation or 4 bit 2-operation
allowing the ODM to the interfaced with either an 8 bit or 4 bit MPU. When the
interface data is 8 bits long, data bits DB to DB are all 0 7 used and data
input/output is carried out simultaneously.
Features • Easy interface with a 4-bit or 8-bit MPU.
• Built-in Dot Matrix LCD Controller with font 5×7 or 5×10 dots.
• Display Data RAM for 80 characters (80×8 bits).
• Character generator ROM, which provides 160 characters with font 5×7 dots
and 32 characters with font 5×10 dots.
• Both display data and character generator RAMs can be read from the MPU.
• Internal automatic reset circuit at power ON.
• Built-in Oscillator circuit. (No external clock required)
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Circuit Block Diagram
Power supply for the LCD
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Some of the typical pictures of the Alarm Annunciator used for various applications are
as shown below:
The following are the annunciators of,
1. K162-BC-211A2 LV Battery Charger A2 Alarm
2. Alarm Series 9000
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3. Alarm series 725
These annunciators are basically available in the control room for it to be controlled by
the operator.
• CONTROL ROOM:
1. It is the main room of control from where the entire plant is controlled.
2. It consists of various microprocessor based control systems including the alarm
annunciator.
3. All the controls are computerized based but a person is generally installed to
control the plant in case of emergency situations.
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CONCLUSION
The four channel alarm annunciator project can be useful in small scale industries
for safety. Many industries now-a-days provide utmost importance to safety these
days.
If safe and secure measures are not been taken by the industry, then these minor
faults can lead to damage of the expensive equipments located nearby and also
those who come under a direct influence of these faults. Many large scale
industries do afford to expend larger amount on safety for a better tomorrow of
their business.
The project can be further expanded to eight channels for eight different fault
conditions. In case if the sensors are very far away from the control room then
suitable repeaters can be included in the communication path to successful
communication.
The project is similar to the SCADA (Supervisor Control And Data Acquisition
System) used in various industries lately where a PLC (Programmable Logic
Controller) is used as a the main controller that handles the data from the sensors
through different communication media like wireless, fiber optic, cables etc. Also
special software packages are been made by the industries for displaying the
status of different physical quantities in the form of digital, analog or graphically.
And an alarm is also suitable programmed for the same.
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REFERENCES
1. Design with Operational Amplifiers and Analog Integrated Circuits
Sergio Franco
Tata McGraw-Hill Publishing Company Limited, Year-2003, Third Edition
2. Electronic Devices and Circuit Theory
Robert L. Boylestad
Louis Nashelsky
Prentice Hall India, Year-2000
3. Linear Integrated Circuits
Ramakant Gayakwad
4. The 8051 Microcontroller
Kenneth Ayala
5. Basic Electronics and Linear Circuits
N. N. Bhargava
S. C. Gupta
D.C. Kushreshtha