RDS Encoder Stereo FM Motion
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RDS Encoder Stereo FM Motion + good benefits.
Hi all, the proposal later I will do is the forum for those who are interested in
participating in the design and prototyping of one (or more) systems for stereo and
RDS FM encoding. The objective is to design the first part of the stereo encoder and
once we have a design that meets the claims, incorporate a RDS. I'm sure that some
of the blocks of the encoder can also be used for stereo RDS encoder therefore save
resources when enconders implement both simultaneously. In advance notice that
the post is quite long, but it sure some going find interesting ... There will be awards
for those who read to the end, hehehehe. I've been mulling over this issue for some
time as the systems that have been implemented always have some weakness: They
are either expensive (DACs very high speed and CPUs), or are not broadcast in
broadcast quality (such as those using the monolithic type BH1417 IC, BA1404, etc)
or very unstable and difficult to adjust (MC1496), or do not work well in all FM
receivers (fault Precision 38kHz subcarrier). Of those who I liked more was to Pira.cz (
http://pira.cz/eng/stk2en.htm ), but there are things I do not like it. What I dislike is
the deviation of the 38kHz carrier a few tens of hertz for not using a crystal that is an
exact multiple of that frequency, which may for most recipients to work reasonably
well, but for some decoding fails especially in cheap rate SDR receivers (some only
synchronize the phase of the pilot, but do not adjust the frequency but synthesize
directly using 38.000kHz carrier FFT), which are increasingly more common to find in
mobile phones, devices mp3 / mp4, etc. I also think that the Pira wastes resources
but gets good performance. I think it's possible to do something of the same quality
with simpler elements (eg a cheaper MCU) from those based on direct multiplexed
using a square 38 kHz and two type switches 4066 hardly speak and suffering of all
evil, much background noise due to the number of harmonics in the switching leak
can not finish being very close to the passband and a very poor channel separation,
about a 15-20dB due to lack of compensation levels and lack of adjustment of the
phase of the pilot, once senoidificada, with respect to the subcarrier. So the first goal
is to make an economical encoder, as accurate as possible (at most 10Hz / 20Hz of
deviation from the carrier 38kHz, and if you are under so much the better, as above
20Hz deviation in some host family cacophonous effect those with SSB receivers
occurs). Desirable to have good SNR margin of 60dB if possible, and channel spacing
according to the SNR. If you have a SNR margin of 60dB is not worth getting a
separation of greater than 60dB channel because everything that falls below that
level will be masked by background noise. This necessitates the use of a quartz
crystal that is an integer multiple 38 kHz carrier, otherwise we would be forced to use
a PLL / Prescaler / Divider ratio of frequencies, etc., and that much more expensive
project. Also formerly was difficult to get accurate crystals but today with the Internet
and the fact that cheap systems also used, it is not that hard to get them. In fact this
is a design project that was parked in a while and has revived thanks to that
happened a few weeks ago I came across an offer of 4.864MHz crystals very
interesting and I ended up buying. With them I've started doing my first tests. These
crystals so I understand are very hard to get but give the advantage of providing a
multiple of 38kHz which is exactly a power of 2, ie 128 * 38kHz = 4.864MHz. This
means that dividing by 2 ^ 7 crystal frequency we obtain the frequency of the
carrier, and dividing by 2 ^ 8 have the pilot frequency. 've also got 4.332MHz
crystals. This frequency is not a multiple containing only powers of two, but there is
something very interesting ... It contains a power of 3 to 19kHz, allowing it to achieve
57kHz carrier for RDS addition of 38kHz and 19kHz pilot. Summing , with the glass of
4.864MHz is easier to design a stereo encoder construction but slightly complicates
RDS (not being a multiple glass 3). However with the encoder of 4.332MHz slightly
complicated but the carrier stereo RDS is easily obtained. I'm also waiting for me to
arrive and 38kHz crystals 7.600MHz. These crystals although with certain drawbacks,
are also integer multiples of 38 kHz (1 * 38 = 38 200 * 38 = 7600) and using some
ideas can implement higher quality encoders used for both (these crystals are quite
common in find when searching a bit online, as they are used for encoding BA1404
monolithic (38kHz) and BH1417 (7.6MHz)). Summarizing. The designs should be
directed to use one of these four crystals (if you find another possible crystal of a
multiple frequency of 38kHz and accessible to get speak ye because I have not found
it): 7.600MHz (very accessible and cheap, stereo nontrivial RDS is not trivial).
4.864MHz (Rare, stereo trivial, nontrivial RDS). 4.332MHz (Less rare, nontrivial stereo
RDS trivial.) 38kHz (Relatively affordable, not expensive, not trivial stereo RDS
nontrivial) Well, I've started experimenting with that of 4.864MHz but have also
generated a stable carrier using 38.000KHz of 4.332MHz. When I reach the other
crystals I will test them. We start with the theory: For those that have not yet
clear how mathematically build a MPX signal to FM from two audio channels, I will not
extend much since these links explains it better than I can explain ...
http://es.wikipedia.org/wiki/FM_estéreo http://transmitters.tripod.com/stereo.htm But
I will summarize all the above theory in the usual formula for the multiplex signal:
MPX = (Vi + Vd) + (Vi-Vd) * S (38kHz) + 0.1 * P (19kHz) where S is the sine of 38 kHz
subcarrier and P 19kHz pilot signal. Vi is the audio of left channel and Vd is the audio
signal from the right channel. The pilot signal is not involved in the coding process
but adds 10% to be used to synchronize the stereo subcarrier. So for simplicity we
put the MPX signal as MPX = (Vi + Vd) + (Vi-Vd) * S = A + B * S At the receiver is
demodulated B = (Vi-Vd) and filtered A = ( vi + Vd) thus obtained two channels
separately, one sum (A) and a subtraction (B). In fact I saw channel is recovered by
summing both signals (Vd is canceled), winning 2 * Vi and Vd channel recovers
subtracting both signals (Vi canceled), winning 2 * Vd. Of how balanced levels are A
= (Vi + Vd) with respect to B = (Vi-Vd), both in amplitude and phase depend on the
channel spacing. This means that if for example I saw of A is not exactly the same
that I saw in B, the receiver can not be canceled altogether Vi subtracting B from A
and therefore the channel you a part of the channel appears Vi and vice versa, so
that the channel spacing will suffer. Hence, for a good stereo encoder need three
things: -To the LV and RV of signal levels are the same as the LV and RV signal levels
B. -Make 19kHz pilot signal is exactly in phase with the 38 kHz. That the above
conditions do not vary with operating conditions, temperature, humidity, etc. By an
almost analog encoder, using operational to generate the signals amount A (Vl + Vd)
and subtracting B (Vi-Vd), and then use a balanced modulator to obtain a
multiplication in four quadrants (ie both negative voltages as positive) as the MC1496
to generate the B * S signal, achieved a very high separation. Unfortunately the
stability conditions are short and that by varying the values of the components with
the operating system then undergoes channel spacing, forcing readjust operating
conditions. The MPX signal from the above formula we can write equivalent form of it
this way: MPX = Vi * (1 + S) + Vd * (1 - S) The transition from one formula to another
is mathematically simple and you just have to operate with a little algebra and
remember properties of addition and multiplication. It seems that now the shape of
the signal generated is complicated by two multiplications appear instead of one, but
what is between the parentheses, by accounting for 1, and the S signal is a sine wave
(the signal S varies between 1 and -1), never be worth less than 0, in fact worth
between 0 and 2. This causes the two-quadrant multipliers are instead of four, which
is easier to achieve. There is a time when MPX is 2 * Vi + 0 = 2 * Vd * Vi and another
time, 180 degrees out of phase, or what is the same for 38kHz, about 13.16 us later,
MPX is 0 * Vi + 2 . * Vd = 2 * Vd believe the MPX signal is composed by two sub-
signals, MPXd and MPXi, that would: MPXi = Vi * (1 + S) MPXd = Vd * (1-S) and then
MPX = MPXi + MPXd + 0.1 * Driver. This other way of expressing the MPX signal
suggests that both the channel I watched as you are slowly alternating in time.
However at a certain intermediate point not only has Vi or Vd but a combination of
them. Therefore we have used semidigitales techniques to create multiplications (1 +
S) and (1-S) for Vi and Vd with achieve an approximation of MPX. I say approximate
because these techniques try to get an S that looks like a sine greater or lesser
extent, but there will always be some difference between digital signal created by the
encoder and the pure sinusoidal signal S. The approach to economic modulator is the
use of a C instead of the signal S which rather than sine is approximated by a square
of between +1 and -1. In fact the signal (1 + C) is a signal that is 2 0ºC-180 between
180 degrees and 0-360. The signal (1-C) signal is an offset 180 ° from the above, so
that it 0ºC-180 0 2 between 180 and-360. Since MPXi MPXd and signals are
generated in the same way, with the carrier 38kHz outdated 180, we can consider
only the aspects of the generation of the MPXi signal (carrier of the left channel) to
be recícprocos in the generation of the carrier of the right channel, or MPXd. The
multiplication Vi * (1 + C) easily achieved by making 0ºC-180 this value is 2 * Vi, and
between 180 and 360 this value is 0. With You reciprocal channel, between 0 ° and
180 ° is between 180 0-360 will be 2 * Vd. Without But when we get MPXi = Vi * (1 +
C), since C is a square wave of amplitude 1, this is composed of a series of odd
harmonic fourier sine infinite S, which are as follows: MPXi = Vi * (1 + 4 / PI * (S + 1/3
* S (3) + 1/5 * S (5) ...) This is something that is not particularly a lot like the original
form MPXi = Vi * (1 + S). Where S (3), S (5), ... are the odd harmonics of the
fundamental carrier comprising the square. If not completely eliminate these
harmonics in the receiver a phenomenon of aliasing occurs causing appear ghost
tones and artifacts in the audible signal that should not be there, so the SNR is
greatly suffers and the audio quality is quite degraded. To do this, you need a filter
that does not distort the phase of the passband and is abrupt to remove from the
third harmonic, or in other words, they allow up to 53kHz without altering the phase,
but annulled the maximum frequency of 95kHz on. This is very difficult to do so
stereo encoders that use a square to generate signals MPXi MPXd and have to choose
between a poor SNR or poor separation, depending on whether filtered with a filter
that distorts abrupt phase or a less steep filter phase distortion less but allow some
of the harmonics. To complicate matters further, imagine that through an ideal filter
that cuts to 53kHz, eliminate harmonics S (3), S (5), ... In Then we get a signal MPXi
= Vi * (1 + S * 4 / PI) What should range between parentheses sinusoidally between 0
and 2, however as S worth more than 4 / PI and at least -4 / IP, the parenthesis just
being worth a maximum value of 2.273 and a minimum value of -0273 ... I mean, the
moment when I saw the sign should be worth 0, it -0273. This implies that the
composite signal, the MPX moment that you should be present only, ie, 0 + 2 * * I
saw you there is actually this: -0273 * 2273 * Vd + Vi. This means that 12% of the
channel interferes saw you channel and therefore we can achieve maximum
separation eliminating all harmonic is -20Log (0.12) = 18,41dB. Poor separation. In
order to improve this separation, anyway worth far MPXi at its maximum value
(because its value can vary with gain control, we have to make its minimum value is
0. This is the full signal adds this: MPX (final) = MPX (filtered) + (4 / PI-1) * (Vi + Vd)
=> MPXi = Vi * (4 / PI + S * 4 / PI) = Vi * (1 + S ) * 4 / PI Now although the factor 4 /
PI, it is important that the signal varies, ie, what is between the parentheses is
between 0 and 2 so MPXi worth between 0 and Vi * 2 * 4 / PI. This means that if we
implement a multiplexer that you stagger signals and Vi, the output of the
multiplexer should add a 27'3% of the sum signal (Vd + Vi) and thus increase ..
considerably channel separation Sadly almost no implementation of this type that
uses 4066 type switches adds this offset is shown here graphically what has been
explained: In Figure 1, the Square is the signal that is used to multiply Vi, and the
theoretical signal S which should vary between 0 and 2. In Figure 2, you have the
original square wave and sine wave REAL resulting after filtering the third and
successive harmonics. Note the negative peak of the sine. Figure 3 shows the square
wave offset adding a level of 0.273 * Vi, and the resulting sine wave in any case just
to be below zero shows. But even if we can make the signal levels, we have the
problem of finding a filter completely remove the third and successive harmonics and
leave intact the phase of the passband. So what replaces the sine S in the equation,
can not be a square plain but it has to be something else. In my designs I will use
several ideas to synthesize the S signal with a minimum quality that allows using a
less steep filter but respecting the phase, while the compensation, if necessary, is
less than in the case of the square wave. The most logical thing is that we do not
need to remove the harmonic S (3) because the wave we use harmonic that does not
exist. We may use a system to cancel the third harmonic signal we use to mimic S.
Say you have a square wave C we have used before. Now we go through a delay that
departure C shows the same signal but with a lag of 60 °. The third harmonic will
have a phase shift of 60 * 3 = 180 °, ie have -S (3). If we now add this wave with the
original wave, the third harmonic of the resulting wave will be S (3) + (- S (3)) = 0.
That same wave divide it by 2 to restore the original levels. Thus we have an M-wave
(modified sine wave or modified square) to remind the original square, but lacking
the third harmonic. Furthermore, the process can be repeated again first by moving
36th and it then by 25,71º to cancel the harmonic 5 and 7. The harmonic annulled 9
to cancel the third harmonic and the harmonic 9 is a multiple of 3. A square that has
been Delayed 3 times and was averaged as many times ultimately a wave that
contains only 9 levels (enough to be generated with a DAC of 4 bits) and the first
harmonic is number 11 (ie, at 418kHz, and far from we are interested in the band and
therefore easily filtered without altering the phase of the passband). Although the
signal only has 9 levels once completely filtered the remaining harmonics, we have a
signal of 4-bit resolution. We have a pure sine wave (which must be compensated as
long as remaining harmonics have to offset some but far less than the original
square). The process of peeling away harmonic averaging the same square with itself
lagged shown in the following image and repeated several times for different
phases ... In fact this system of harmonic elimination of interference is known as
comb filter (as it not only eliminates harmonic if all its multiples, showing that the
filter response is apparently a comb) and works with any input waveform. A modified
example includes eliminating harmonic waves where instead of a square have a
triangular, and parabolic. But take again modified wave from square ( it is easier to
multiply the triangular or square dish since only two states). Now suppose we
implement a square 38 kHz and 60 desfasamos. These two signals are used to
multiply Vi so that we generate the following expression: MPXi = Vi * (1 + M) where
M is now 2 * sqrt (3) / PI * (S + 1/5 * S (5) + 1/7 * S (7) ...). We now see that no longer
exists S (3) and harmonics start at S (5) which is 38 * 5 = 190kHz. It is now much
easier to filter out these harmonics, we can use a filter that is not as sharp and better
conserve phase. If now we filter, we have to factor 2 * sqrt we have (3) / PI = 1.103:
MPXi = Vi * (1 + S * 1.103), ie, that uncompensated have reduced crosstalk from
12% to 4 , 9% giving 26,3dB separation. It is not a great achievement, but more than
8 dB square wave. Also just have to compensate with 10.3% of the sum signal
instead of 27.3% of the case of the square wave. In the picture below are the figures
before but now applied to a modified waveform to eliminate the third harmonic I
Ideally to implement multiple filters with various offsets to cancel up to harmonic 7 as
shown in the pictures above, but with analog phase shifters easier the more you go
any phase so just having again harmonic levels does not filter the output filter.
However we can use a digital oversampling to generate the exact sine wave without
harmonics to number 11. This requires that the count frequency is a multiple of such
harmonics to the divide by those amounts frequency is accurate, that is, the
frequency original has to be a multiple of 3, 5 and 7, making x105 be asserted.
Unfortunately we can not get the necessary to achieve oversampling x105, since the
value of the glass should be 3.990Mhz glass. Someone might think you could use a
4MHz crystal and holy Easter, with almost almost gets to have a 4MHz but by dividing
by 105, the resulting frequency would 38,095kHz far from our intention to get the
exact 38,000kHz. However if you just want to eliminate "digitally" the third harmonic
and we have a decent filter to eliminate the fifth and succeeding, we can do it
relatively easily using a glass 4.332kHz (since it is a multiple of 3), readily available
and step and get the 57kHz signal to feed an RDS enconder. Here I will propose two
systems for achieving encoded using a modified waveform to elimnar the third
harmonic. The first generates a square 38kHz using a crystal of that frequency, and a
phase shift network 60 generates an offset signal (the phase shifter may be an RC
network which delays the square for 4.4 us and a schmitt trigger to re-shape the
square signal. So we used to combine two signals in a summing obtaining direct
multiplication of both channels signals (1 + M) and (1-M). The remaining blocks do
not need much explanation. Is the compensation network to cancel crosstalk, and the
system to generate the 19kHz pilot signal using a bistable type T and sine wave
shaper (either a 19kHz filter with a very high Q), plus another delay to adjust the sine
phase to minimize again the crosstalk. The second system does the same as the first
but the phase signals are generated by a sequential counter 6 states. This system
has the advantage that by designing the gap 60 may not be varied by the operating
conditions, cold, heat, humidity, etc. Otherwise is the same as the first, although it
uses a crystal of 4.332MHz and allows also generate the 57kHz RDS carrier. Another
method for multiplexing with a sine: In addition to the cancellation of
harmonics, it is possible to synthesize the signals (1+ S) and (1-S) by other methods.
The encoders used in oversampling DACs is the use of two-quadrant multiplier or a
DAC multiplexing at different levels. The typical DAC is one that makes use of an
array of resistors to provide at its output proportional to the analog input digital
signal level. The best known of this type is the R-2R ladder networks, and weighted
resistance (when trying to generate known periodic signals). Other DACs lesser
known but more common because they work almost entirely in the digital domain,
are DACs with pulse density modulation, or PDM. Not to be confused with PWM or
pulse width modulation, which is another way to implement a DAC but not as digital
modulation ... The PDM is also known for its construction, as Delta-Sigma modulation
(or Sigma-Delta). A Delta-Sigma modulator does is track analog pulse signal
generating more "together" the higher the level of the analog signal. For a more
detailed description please visit the wikipedia link on this modulation:
http://es.wikipedia.org/wiki/Modulación_Sigma-Delta A feature of this system is to
achieve a good resolution is sufficient with little bits whenever we can modulator
operate much faster than the frequency we want to synthesize. In fact it is quite
common to see Delta-Sigma modulators using only one bit. The characteristic of this
modulator is based on the harmonics instead of going equally moving along the
spectrum, concentrate on the top of it, so a simple low-pass filter with frequency cut
away the area where the density is higher harmonics, faithfully reconstructs the
original signal. We do not need ADC part, ie, the crawler generates bits. We can
generate a table containing bit Delta-Sigma sinusoidal sequence at a certain
frequency, and storing the table in a fast memory, either an EPROM, a RAM, or a
microcontroller. However the DAC modulator hand, can be as simple as an RC filter
with the cutoff frequency two decades below the sampling frequency (40dB
attenuation getting annoying harmonics). That is, a simple switch switching quickly
put at 128 times the frequency you want to synthesize, and then the filter we obtain
the corresponding audio channel multiplied with the sine (1 + S) with a fairly
acceptable resolution. The image below shows the waves when the frequency of the
bit stream is 128 times the subcarrier frequency, ie 128 * 38 = 4.684MHz. We can
also easily generate several waves while since we have several bits in memory for
each temporal position in the sequence. For example we can use one or two bits both
to generate waves of 38kHz and 19kHz pilot. The following schemes are based on
this principle. The first uses an EPROM type memory and a crystal that powers the
clock counter that said memory addresses. To generate the 19kHz signal must be
repeated 2 times 38 kHz, so a 4.864MHz crystal 256Bytes needed, with one of
7.6MHz, 400Bytes, and that of 4.332MHz, 228Bytes. Except 4.864MHz crystal, other
crystals for the next to last position of the table causes the counter is reset and
return to the beginning of memory. Although not shown in these diagrams,
eliminating much of harmonics, the level of the fundamental wave is greatly reduced,
but not the DC level. This means it is necessary to compensate but in this case
instead of adding to the MPX (Vi + Vd) signal subtract a percentage of it, equivalent
to the level of the signal over the final composite signal. Testing breadboard for
try to generate both 38kHz and 19kHz pulses as sinusoidal waves corresponding to
these frequencies, the moment I tried using the table of Delta-Sigma have generated
waves to construct the graph seen above. I used two bits to encode the 38 kHz signal
of 2 bits PDM, one extra bit to encode the same signal with a resolution of 1 bit, and
3 bits over 19kHz to generate two bits and 1 bit. In total I have used 6 of the 8 bits in
a parallel EEPROM Xicor X2804 model (that is what we had for the disaster box). How
many bytes are not've programmed manually. I used a crystal 4.864MHz with a
74HC04 gate to generate the wave train feeding the meter. Precisely the problem
with my installation and that has limited me quite the results have been used a low-
speed version of the 4040, such as the MC14040 works well up to 2MHz to 5V (I gave
a pulse train more than twice as fast). The counter had, but Q1, ie A0 in memory,
never down to 2.5V so you'll always remained to 1. The result is that with this I could
only counter directional odd memory addresses at that speed so that oversampling is
reduced from x64 to x128. Besides the lack of speed makes addresses crawl in the
series (they lag behind the pulse train) which makes the resulting wave is not
perfectly sinusoidal but trailing slightly behind. I hope to correct these problems
when they get a 74HC4040 which is 10 times faster than the MC14040. So far these
are the images that have been gathered from the tests. Here I show an image
generating portion of the Delta-Sigma mounted on breadboard: Here is a picture of
the square wave generated by the glass: In the next photo, output Q8 meter (19,000
kHz ie 4864/256) In the next photo The Q7 output (38,000 kHz is 4864/128) In the
next photo, you have the PDM signal 19,000KHz a bit with the clock of 19KHz. In the
next photo, you have the PDM signal 38,000KHz of one bit with the clock of 38KHz. In
the next photo, I placed an RC lowpass with a 10k resistor and 470pF capacitor at the
output of each of the PDM signals of 19 and 38 kHz. 19kHz signal is reconstructed
fairly well despite being only 1 bit, but the asymmetry is due to the drag bit that I
mentioned before because of the counter. However although it should also become
good, PDM 38 kHz signal appears formed like a triangle. Already in the last photo, the
drag bit for PDM 19kHz signal and two bits of resolution did not put as although
improved symmetry, an area had a strong distortion. However the 38 kHz if it
improved by using 2 bits (basically place 2 10k resistors at the two outputs and
connected to the same 470pF capacitor integrator making and summing the two
signals). Now at 38 kHz is clearly synthesized sine. So far these are the tests I've
done. I want to get more integrated logic, as more counters, flip-flops, faster gates,
etc. So I can deploy multiple versions of the designs I've shown and see what
everyone is more stable, less noise, more separation, it is friendly to the RDS, etc.
Hence the title of this POST. I am a person of limited means, and I also like to make
this project and remain as collaborative design forum (then we each do what he
wanted with it). Proposal:
So I wonder if there are people willing to test the ideas explained here ultimately help
achieve some of the designs I have proposed either materializing or adding more
functional blocks (pre-emphasis filter, etc). And once we Stereo few modulators,
design the RDS modulator that best fits the stereo modulator (using frequency
master clock for example). It is not a project that has to be done quickly, that is, that
I do not care if it costs a year or more to complete, but if you get something decent
we could have a design that became popular and thus give some publicity to the
forum. As it is cheaper to buy many components when shopping on ebay and other
online sites have more crystals . those who will use would have to share the following
crystals are difficult to obtain in principle to share one glass per person: . 10
4.864MHz crystal 4.332MHz crystal 10. And as soon as I arrive in the mail in addition I
will share the following : . 10 crystals for 7.600MHz . 10 crystals of 38kHz not charge
anything for the glass, all I would ask that the shipping costs for Spain would be
approximately 1 euro, and would be done by mail. For outside Spain especially Latin
America shipping is multiplied so that initially ideally involving Spanish foreros
though someone get the crystals on your own or is willing to pay the cost of
international shipping, so be it . Also, if anyone needs more than one glass should
justify why you want more than one. It must also be someone on the forum, ie,
someone who actively participate. Although it has many messages, you must have at
least relevant messages or odd contribution. Those interested in a crystal that
comment that they want to participate in the design in this thread. The design should
begin to realize or implement, or at least parts of it, within 6 months from the date
you mail the glass. No matter then later to finish the project, it is important to at
least start. Well, I hope your ideas and contributions to the project, and of course,
your requests. Ahh, if someone wants to implement the project using a generated
table in RAM high speed my disposal 10 static RAM chips HM6116 recycled arcade. I
could send one of them along the glass (provided the total does not exceed about 20
grams). Regards, and thanks for get to read to the end.