RANGER STATUS UPDATE RADAR DIGITAL BACKENDSIDE NOTES – FMCW RADAR Theory of operation • RF...

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RANGER STATUS UPDATE RADAR DIGITAL BACKEND Adrian Figueroa Electrical Engineering and Information Technology IEE, Chair for Circuit Design and Network Theory CCN Dresden, 29.09.17

Transcript of RANGER STATUS UPDATE RADAR DIGITAL BACKENDSIDE NOTES – FMCW RADAR Theory of operation • RF...

Page 1: RANGER STATUS UPDATE RADAR DIGITAL BACKENDSIDE NOTES – FMCW RADAR Theory of operation • RF transmission towards target • Reception of delayed signal • Deramping • Mixer outputfrequency

RANGER STATUS UPDATERADAR DIGITAL BACKEND

Adrian Figueroa

Electrical Engineering and Information Technology IEE, Chair for Circuit Design and Network Theory CCN

Dresden, 29.09.17

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MIMO SYSTEM DESIGN – 29.09.2017

OUTLINE

RANGER summaryMotivationDigital hardware and system designSystem performanceConclusion

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MIMO SYSTEM DESIGN – 29.09.2017

RANGER – SUMMARY

Maritime coastal radar

• OTH radar for distant targets (40-350 km)• (PE-)MIMO radar for close targets (0-15 km)

Tasks of TUD

• System evaluation of MIMO radar• Design of radar frontend• Design of output stage• Antenna design• Design of digital hardware

• Processing of raw data

Installation site

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MIMO SYSTEM DESIGN – 29.09.2017

MOTIVATION

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MIMO SYSTEM DESIGN – 29.09.2017

MOTIVATION

A high speed system is needed

• Current system much too slow (2 Hz)• SNR is weak without averaging

• Realtime capability is lacking• Analog hardware is fast enough

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MIMO SYSTEM DESIGN – 29.09.2017

NEW SYSTEM DESIGN

Speedup ingredients

• Use of DMA, interrupts and double buffer memory

• Direct storage to SDRAM• Ethernet transmission• Small FPGA for precise clocking

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MIMO SYSTEM DESIGN – 29.09.2017

NEW SYSTEM DESIGN – (FUTURE) BLOCK DIAGRAM

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MIMO SYSTEM DESIGN – 29.09.2017

HARDWARE DESIGN – DIGITAL PCB DESIGN

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MIMO SYSTEM DESIGN – 29.09.2017

HARDWARE DESIGN – DIGITAL PCB PROTOTYPE

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MIMO SYSTEM DESIGN – 29.09.2017

HARDWARE DESIGN – DIGITAL PCB BLOCKS

STM32

FPGA

Programmer

SDRAM

Ethernet

Trigger and clock inputsSD card

WiFi

Reference clock

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MIMO SYSTEM DESIGN – 29.09.2017

NEW SYSTEM DESIGN – BENEFITS

NEW DESIGN PREVIOUS DESIGN

Acquisition rate Over 1000 Hz 2 Hz

Connectivity 100 Mbit Ethernet, WiFi, Trigger and clock inputs

UART, ZigBee

Cost Cheaper, mainstream components

Expensive FPGA

Other features Integrated programmerSD cardSDRAMGyroscopeAccelerometerUWB Module

SD cardSRAM

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MIMO SYSTEM DESIGN – 29.09.2017

SIDE NOTES – FMCW RADAR

Theory of operation

• RF transmission towards target• Reception of delayed signal• Deramping• Mixer output frequency and phase

proportional to range

• Phase wraps at RF-wavelength

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MIMO SYSTEM DESIGN – 29.09.2017

SIDE NOTES – DEMO

Theory of operation

• Range measurement without reflector• Secondary radar• Direct path coupling• TX and RX separate in this test

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MIMO SYSTEM DESIGN – 29.09.2017

DEMO

System settings

• Refresh rate of 25 Hz (limited by Matlab display engine)• Transfer of data over Ethernet to Matlab TCP-Server• Display time domain signal after Deramping• Chirp settings:

1 ms duration, 150 MHz bandwidth, 2.4 GHz band

Please observe

• Phase change when moving the receiver• Stability of the time domain signal

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MIMO SYSTEM DESIGN – 29.09.2017

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MIMO SYSTEM DESIGN – 29.09.2017

ACHIEVEMENTS AND OUTLOOK

Working prototype of digital PCB

• Precise ranging possible• Very high refresh rate• Ethernet data connection• Flexible development platform for other projects

Next steps

• Analog DDS PCB design (Niko Joram)• Implementation of processing algorithms• Expand to MIMO

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Chair for Circuit Design and Network Theory