Quad-Channel, 16-Bit, 1.25 GSPS Digital-To-Analog ...? Digital Inverse Sinc Filters BGA package. ......

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Transcript of Quad-Channel, 16-Bit, 1.25 GSPS Digital-To-Analog ...? Digital Inverse Sinc Filters BGA package. ......

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    ReferenceDesign

    DAC34H84SLAS751D MARCH 2011REVISED SEPTEMBER 2015

    DAC34H84 Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter (DAC)A high-performance low jitter clock multiplier1 Featuressimplifies clocking of the device without significant

    1 Very Low Power: 1.4 W at 1.25 GSPS impact on the dynamic range. The digital Quadrature Multi-DAC Synchronization Modulator Correction (QMC) enables complete IQ

    compensation for gain, offset, phase and group delay Selectable 2x, 4x, 8x, 16x Interpolation Filterbetween channels in direct up-conversion Stop-Band Attenuation > 90 dBc applications.

    Flexible On-chip Complex MixingDigital data is input to the device through a 32-bit Two Independent Fine Mixers with 32-bit wide LVDS data bus with on-chip termination. The

    NCOs wide bus allows the processing of very high Power Saving Coarse Mixers: nFs/8 bandwidth signals. The device includes a FIFO, data

    pattern checker and parity test to ease the input High Performance, Low Jitter Clock Multiplyinginterface. The interface also allows fullPLLsynchronization of multiple devices. Digital I and Q CorrectionThe device is characterized for operation over the Gain, Phase, Offset, and Group Delayentire industrial temperature range of 40C to 85CCorrection and is available in a 196-ball, 12x12mm, 0.8mm pitch

    Digital Inverse Sinc Filters BGA package. 32-Bit DDR Flexible LVDS Input Data Bus The DAC34H84 very low power, high bandwidth

    8 Sample Input FIFO support, superior crosstalk, high dynamic range andfeatures are an ideal fit for next generation Supports Data Rates up to 625 MSPScommunication systems. Data Pattern Checker

    Parity Check Device Information(1) Temperature Sensor PART NUMBER PACKAGE BODY SIZE (NOM) Differential Scalable Output: 10mA to 30mA DAC34H84 NFBGA (196) 12.00 mm x 12.00 mm 196-Ball, 12x12mm NFBGA (GREEN / Pb-Free) (1) For all available packages, see the orderable addendum at

    the end of the data sheet.2 Applications

    Simplified Schematic Cellular Base Stations Diversity Transmit Wideband Communications

    3 DescriptionThe DAC34H84 is a very low power, high dynamicrange, quad-channel, 16-bit digital-to-analogconverter (DAC) with a sample rate as high as 1.25GSPS.

    The device includes features that simplify the designof complex transmit architectures: 2x to 16x digitalinterpolation filters with over 90 dB of stop-bandattenuation simplify the data interface andreconstruction filters. Independent complex mixersallow flexible carrier placement.

    1

    An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,intellectual property matters and other important disclaimers. PRODUCTION DATA.

    http://www.ti.com/product/DAC34H84?dcmp=dsproject&hqs=pfhttp://www.ti.com/product/DAC34H84?dcmp=dsproject&hqs=sandbuysamplebuyhttp://www.ti.com/product/DAC34H84?dcmp=dsproject&hqs=tddoctype2http://www.ti.com/product/DAC34H84?dcmp=dsproject&hqs=swdesKithttp://www.ti.com/product/DAC34H84?dcmp=dsproject&hqs=supportcommunityhttp://www.ti.com/tool/TIDA-00077?dcmp=dsproject&hqs=rdhttp://www.ti.com/product/dac34h84?qgpn=dac34h84

  • DAC34H84SLAS751D MARCH 2011REVISED SEPTEMBER 2015 www.ti.com

    Table of Contents7.3 Feature Description................................................. 241 Features .................................................................. 17.4 Device Functional Modes........................................ 522 Applications ........................................................... 17.5 Programming........................................................... 563 Description ............................................................. 17.6 Register Map........................................................... 604 Revision History..................................................... 2

    8 Application and Implementation ........................ 775 Pin Configuration and Functions ......................... 48.1 Application Information............................................ 776 Specifications......................................................... 78.2 Typical Applications ............................................... 786.1 Absolute Maximum Ratings ...................................... 7

    9 Power Supply Recommendations ...................... 846.2 ESD Ratings ............................................................ 710 Layout................................................................... 856.3 Recommended Operating Conditions....................... 8

    10.1 Layout Guidelines ................................................. 856.4 Thermal Information .................................................. 810.2 Layout Examples................................................... 866.5 Electrical Characteristics DC Specifications .......... 8

    11 Device and Documentation Support ................. 896.6 Electrical Characteristics Digital Specifications ... 1011.1 Device Support .................................................... 896.7 Electrical Characteristics AC Specifications ........ 1111.2 Documentation Support ....................................... 896.8 Timing Requirements Digital Specifications......... 1111.3 Community Resources.......................................... 906.9 Switching Characteristics AC Specifications........ 1311.4 Trademarks ........................................................... 906.10 Typical Characteristics .......................................... 1411.5 Electrostatic Discharge Caution............................ 907 Detailed Description ............................................ 2211.6 Glossary ................................................................ 907.1 Overview ................................................................. 22

    12 Mechanical, Packaging, and Orderable7.2 Functional Block Diagram ....................................... 23Information ........................................................... 90

    4 Revision HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.

    Changes from Revision C (August 2012) to Revision D Page

    Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementationsection, Power Supply Recommendations section, Layout section, Device and Documentation Support section, andMechanical, Packaging, and Orderable Information section. ................................................................................................ 1

    Changes from Revision B (August 2011) to Revision C Page

    Added thermal information to the Absolute Maximum Ratings table ..................................................................................... 7 Added Recommended Operating Conditions table ................................................................................................................ 8 Deleted TJ row from top of thermal table................................................................................................................................ 8 Deleted OPERATING RANGE section from bottom of Electrical Characteristics DC Specifications ............................... 10

    Changes from Revision A (June 2011) to Revision B Page

    Changed ALARM description ................................................................................................................................................. 5 Added notes to Electrical Characteristics DC Specifications .............................................................................................. 9 Deleted t(align) from Electrical Characteristics Digital Specifications .................................................................................. 10 Added fDAC PLL ON MIN of 1000 MSPS in Electrical Characteristics AC Specifications ................................................. 11 Changed DIGITAL INPUT TIMING SPECIFICATIONS in Timing Requirements - Digital Specifications............................ 11 Changed DAC Wake-up Time in Switching Characteristics AC Specifications ................................................................ 13 Added information to SINGLE SYNC SOURCE MODE section .......................................................................................... 29 Deleted t(align) from BYPASS MODE section ......................................................................................................................... 29 Changed 1.2288GHz to 983.04MHz in PLL MODE description........................................................................................... 31 Changed data in Table 4 ...................................................................................................................................................... 31 Deleted 2x in Table 6............................................................................................................................................................ 35

    2 Submit Documentation Feedback Copyright 20112015, Texas Instruments Incorporated

    Product Folder Links: DAC34H84

    http://www.ti.com/product/dac34h84?qgpn=dac34h84http://www.ti.comhttp://www.go-dsp.com/forms/techdoc/doc_feed