PWM ON SAMSUNG's S3C2410X

Building Embedded LINUX SYSTEM

Outline

• SAMSUNG's S3C2410X components

• CLOCK& POWER MANAGEMENT

• PWM TIMER

• I/O PORTS

• Finally Project


SAMSUNG's S3C2410X components(1/4)

• 1.8V core, 3.3V memory, 3.3V external I/O microprocesso

r with 16KB I-Cache/16KB D-Cache/MMU

• External memory controller (SDRAM Control and Chip Se

lect logic)

• LCD controller (STN and TFT) with 1-ch LCD-dedicated

DMA

• 4-ch DMAs with external request pins

• 3-ch UART (IrDA1.0, 16-Byte Tx FIFO, and 16-Byte Rx

FIFO) / 2-ch SPI



• 1-ch multi-master IIC-BUS/1-ch IIS-BUS controller

• SD Host interface version 1.0 & Multi-Media Card Protoc

ol version 2.11 compatible

• 2-port USB Host /1- port USB Device (ver 1.1)

• 4-ch PWM timers & 1-ch internal timer

• Watch Dog Timer

• 117-bit general purpose I/O ports / 24-ch external interrupt

source

• Power control: Normal, Slow, Idle and Power-off mode



• 8-ch 10-bit ADC and Touch screen interface

• RTC with calendar function

• On-chip clock generator with PLL


CLOCK & POWER MANAGEMENT(1/3)

• The Clock control logic in S3C2410X can generate the

required clock signals including FCLK for CPU, HCLK

for the AHB bus peripherals, and PCLK for the APB bus

peripherals.

• FCLK is used by ARM920T.

• HCLK is used for AHB bus, which is used by the

ARM920T, the memory controller, the interrupt controller,

the LCD controller, the DMA and the USB host block.



• PCLK is used for APB bus, which is used by the

peripherals such as WDT, IIS, I2C, PWM timer, MMC

interface, ADC, UART, GPIO, RTC and SPI.

• The power management block controls the system clocks

by software for the reduction of power consumption in the

S3C2410X.

• These schemes are related to PLL, clock control logics

(FCLK, HCLK, and PCLK) and wakeup signals.


PWM TIMER(1/4)

• Five 16-bit timers

• Timer 0, 1, 2, and 3 have Pulse Width Modulation (PWM) functio

n.

• Timer 4 has an internal timer only with no output pins.

• Two 8-bit prescalers & Two 4-bit divider

• The timer 0 and 1 share an 8-bit prescaler, while the timer 2, 3 and

4 share other 8-bit prescaler.

• Each timer has a clock divider which 5 different divided signals (1

/2, 1/4, 1/8, 1/16, and TCLK).


PWM TIMER(2/4)

• Programmable duty control of output waveform (PWM)

• Dead-zone generator

• The dead zone is for the PWM control in a power device.


PWM TIMER(3/4)


PWM TIMER(4/4)


I/O PORTS

• The S3C2410X has 117 multi-functional input/output port

pins. The ports are:

• Port A (GPA): 23-output port

• Port B (GPB): 11-input/output port

• Port C (GPC): 16-input/output port

• Port D (GPD): 16-input/output port

• Port E (GPE): 16-input/output port

• Port F (GPF): 8-input/output port

• Port G (GPG): 16-input/output port

• Port H (GPH): 11-input/output port


Finally Project

• 撰寫一個驅動程式 ,透過 PWM 裝置驅動馬達 ,調整馬達的輸出功率 .

Embedded system S3C2410 GPIO control line

PWM

Motor Controller

PWM ON SAMSUNG's S3C2410X

Documents

Transcript of PWM ON SAMSUNG's S3C2410X