PWM-Control of Multi-Level Voltage-Source Inverters

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PWM-Control of Multi-Level Voltage-Source Inverters

M artin Veenstra Prof. Alfred Rufer

Laboratory of Industrial Electronics

Swiss Federal Institute of Technology Lausanne

CH-1015

Lausanne EPFL, Switzerland

martin.veenstraQepfl.ch

Abstract

Many different PWM-strategies for

multi-level inverters exist. Usually the modulator is

chosen to match the hardware topology, although this

not always optimizes the harmonic content. The least-

harmonics PWM-strategy can be used for all hard-

ware topologies. It behaves like a three-dimensional

A/D-converter.

A

carrier signal improves the out-

put quality of the low-resolution A/D-converter and

generates the well-known PWM-signals. Using this

description, the state-space averaging procedure be-

comes very straight-forward and fundamental inverter

behavior can be easily modeled and analyzed.

I .

INTRODUCTION

In recent years multi-level voltage source inverters have

become quite popular, mainly due to their capability to

increase the output-voltage magnitude and to reduce the

output-voltage and -current harmonic content [ l ,

,

31.

Many different strategies for the multi-level pulse-width

modulation (PWM) exist. Usually the modulator is cho-

sen to match the hardware topology. However, this

choice does not always correspond to the PWM-strategy

which generates the least harmonic content. This least-

harmonics PWM-strategy can be used for all hardware

topologies. It only requires a logic circuit to decode the

PWM-output to the individual switch commands.

This paper describes the least-harmonics PWM-strate-

gy in a different way, which shows that it behaves like a

three-dimensional analog-to-digital (A/D) converter. A

carrier signal is added to the analog input signals in order

to improve the output quality of the low-resolution A/D-

converter. The well-known PW-Modulation is obtained.

Using the new modulator description, the state-space

averaging procedure becomes very straight-forward. Fun-

damental inverter behavior can be easily modeled and an-

alyzed. This is especially useful for multi-level inverters,

where the voltages of intermediate-circuit capacitors have

to be stabilized. As an example, the neutral-point voltage

variations of a three-level inverter will be presented.

11.

TRANSFORMING

HREE-PHASE QUANTITIES

Three-phase quantities are usually transformed into the

phasor representation because it simplifies the analysis of

the investigated systems. The three independent phase

quantities U,, U b and uc are transformed into a

two-

dimensional phasor C, which is usually defined using com-

plex numbers:

This phasor represents the differential-mode part of the

original three-phase quantity. For a symmetrical sinus-

oidal system the phasor rotates along a circle through the

complex plane. By choosing 2/3 as the scaling factor, the

length of the phasor (radius of the circle) corresponds to

the amplitude of the phase quantities. For

a

balanced sys-

tem the original phase quantities can be reconstructed by

geometrical projection of the phasor on the corresponding

phase axes

E

= e ', Eb = e j J and Cc = e j y , which are

rotated by

120

relative to each other.

The homopolar or common-mode part (also known

as zero-sequence component) of three-phase quantities

is usually omitted or treated separately, because it has

a completely different influence on the system. In

most cases common-mode impedances are different from

differential-mode impedances, and the common-mode sys-

tem has totally different voltage and current require-

ments. Usually the average value of the three phase quan-

tities is used:

which corresponds to the voltage difference between the

(real or artificial) neutral points of the source and the

load.

However, one can combine the differential- and the

common-mode transforms into one single Park transform

[4, 1.

The transform can be described by a 3-by-3 ma-

trix: the input vector contains the three phase quan-

tities as three independent dimensions (abc-space), the

output vector contains the transformed values, again as

three independent dimensions (xyz-space, also known as

ap0-space). The differential-mode part is found in the

xy-plane, the common-mode part along the z-axis. We

will define the transformation matrix A

as

a real unitary

matrix:

, / I -3

- 31

A = / : [

0

- I ,

. . ,

(3)

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1

a 0

1

state number

z b

1

N O

CC 1

voltage vector voltage vector

in abc-space in iyz- spac e

d

1

0

1

0

1 1y

2

1

0 1

1 0 1

2 Y

Fig.

1.

Transformed voltage vector

C

and phase

axes Za, b , ZC.

Three-dimensional view and the projections on the sy -,

sz-

and

yz-planes respectively.

and the following relation holds:

With this definition, transformed objects will only be ro-

tated in three-dimensional space and not be deformed or

scaled. The transformed vector

GxYz

with

Gabc =

)

,

CxYz

=

ii)

is a rotation of the original vector tiabc with the same

length. The same holds for the three phase axes Za,

?b

and

ZC: after transformation they will still be perpendicular

to each other. The transformed voltage vector and phase

axes are shown in Fig. 1.

The scaling

of

the transform in (3) is however differ-

ent from the usual definition in

(1)

and (2). By using a

unitary transform matrix, the equations for the electrical-

system instantaneous power (active and reactive) will be

conserved [5 ] . For the currents and voltages

of

a three-

phase system, the instantaneous active power

P

can be

expressed as:

For the instantaneous reactive power Q we can write:

Q

= ZZ 3

ii x

T

1

=

-[(ubic

-

UCib)

+

u c i a

- a i c ) +

(uaib

-

Ubia)]

a

= (U - uyix). 7)

The vector

e',

is the unit vector in the z-direction, either

in zyz- or in abc-space:

111. TRANSFORMING

HREE PHASE INVERTER

STATES

In the following sections we will define all inverter volt-

ages relative to the (equivalent) intermediate circuit mid-

point. For all inverters wo-level or multi-level

the maximum value of the output phase voltage will be

defined equal to +1, the minimum value equal to -1 .

For two-level inverters only those two ou tput sta tes exist.

Multi-level inverters have additional states in between,

which are equally distributed between those limits.

The ou tput states of a three-phase inverter form a cube

in the three-dimensional abc-space. For a two-level in-

verter, the

23 =

8 sta tes form the eight corners of the

basic cube

as

shown in Table I. The application of the

Park transform to the inverter states results in a rotation

of the cube into zyz-space

(see

Fig. 2) .

For an n-level inverter, the cube

is

filled with additional

regularly distributed points. The

n3

state s form a regular

grid within the basic cube. Again, the application of the

Park transform to the inverter states results

in a

rotation

of

the grid cube into zyz-space. Fig.

3

shows the states

of

a

nine-level inverter.

Iv. MULTI-LEVELULSE-WIDTH MODUL AT OR

For PW-Modulated multi-level inverters many different

choices for the triangular carrier signals exist: horizon-

tally shifted, vertically shifted in-phase, vertically shifted

TABLE

I

THE UTPUT-STATES VOLTAGES OF

A

TWO-LEVEL

INVERTER.

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- I,

2 5' O6

-2 -1

0 1 2

X

1

E) O .

-1

l

2 1

2

6

4 0

0 4 0

0

01

0

1 0

6

3

0

3

5 - 1 . 5

7

W

1

7

- 0

-1

2

1

4 ; o 6 0 i 2

0

-1

-2

-2 -1 0

1 p

2 2Y

7

0

-21 : 21 ::

-2

1

0 1 2 -2 -1 0 1 2

X Y

Fig.

2.

Transformed states

of a

two-level inverter. Three-

dimensional view and the projections on the xy-, z- and yz-planes

respectively.

opposite-phase, etc. They can be chosen in-phase or phase

shifted by

120'

for the

3

phases. For all n-level inverters

n 1carrier signals are needed to generate a phase output

signal.

If

the phase output states are numbered from

0

(minimum value) to n -1 (maximum value), output state

s will be selected if the reference signal is above s carrier

signals nd thus below n

1 -

s carrier signals.

Depending on the hardware realization of the multi-

level inverter (neutral-points clamped NPC, imbricated

cells IC, series-connected H-bridge cells

HC,

.. ), a logic

circuit is needed to decode the output state number to

the individual switch commands. This logic should also

handle possible redundant states, for example by cycling

through them. For certain hardware/modulator combina-

tions a direct relation between the carrier signals and the

individual switch commands exists (NPC with vertically

shifted carriers, HC with horizontally shifted carriers) and

therefore no additional logic is needed. These combina-

tions are often used in multi-level applications

[2,

3,

6,

71.

We will use the vertically shifted in-phase triangular

carrier signals (see Fig. 4), because they generate the

smallest harmonic content in the output voltage for three-

phase loads without the neutral connected [SI.As an ex-

ample, reference signals for a modulation index

m =

1.15

(ratio of reference-phasor amplitude and maximal output

phase voltage) are given. The generated output phase

voltages are shown in Fig. 5. As can be seen in Fig. 6,

the resulting line-to-line output voltages modulate locally

only between two adjacent states, which is not the case for

other carrier signals like the commonly used horizontally

2

1

a 0

-1

-2

2 2

-2-2

- 2 -1 0 1

2

-2 -1

0 1

2

X

Y

Fig.

3.

Transformed states

of

a nine-level inverter. Three-

dimensional view and the projections on the xy-,

z-

and yz-planes

respectively.

shifted triangular carrier signals [3,

6, 7,

91.

Since all carrier signals are in fact composed of the same

basic triangular signal plus a (different) constant offset,

we can subtract this basic triangular signal from all car-

riers and all reference signals. This will not change the

intersection points of the reference and the carrier sig-

nals, and therefore the generated output voltages will be

the same. The original carrier signals are now reduced to

their constant offset levels, whereas the reference signals

are modified by the basic carrier (see Fig. 7).

Again, if the phase output states are numbered from

0

(minimum value) to n -

1

(maximum value), output

state

s

will be selected if the (modified) reference signal

is above

s

comparison levels nd thus below n - 1 - s

comparison levels. The selected output state s s located

exactly in the middle of the band between the two adja-

cent comparison levels (see Fig. 7). With this modulator,

the behaviour of the inverter is thus like that of an A/D-

converter. Since the resolution of this A/D-converter is

quite bad (only

3

possible digital values for a three-level

inverter), the quality

of

the output voltage is improved by

the addition of the carrier to the reference signals. This

results in the well-known PW-Modulation between adja-

cent discrete states. The peak- tepeak amplitude of the

carrier signal is equal to the A/D-converter level distance.

V. TRANSFORMING

ULSE-WIDTH

MODULATOR SIGNALS

In abc-space the constant PWM comparison levels for

phase a are planes parallel to the bc-plane (a = constant).

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0 + A

g7r A 7r

A

2n

w t

Fig. 4.

c1, . 8 of a nine-level inverter. m

=

1.15.

Reference signals

U: U:, U:

and triangular carriers

0

A 3. A 77

% A

2 x

wt

Fig.

7.

Modified reference signals

U:

U;

U:

and comparison levels

1 1 , . . Is

of a nine-level inverter.

m =

1.15. The phase output states

are located at

U a , U b , U c E {-I, - 3 , - + , - + , 0 , + f , + L 2

+3, +1) .

0 x 27r

7r i7r

27r

wt

Fig. 5. Reference signals

U:

U:

U:

and generated output voltages

t i a , U b , uc of

a nine-level inverter.

m =

1.15.

I I

2

1.5

1

0.5

0

-0.5

-1

-1.5

-2

Fig.

6.

Phase-to-phase reference signals

output voltages

ab , Ubc ,

t ica of a nine-level Inverter. = 1.15.

?lc,: and generated

Similarly, the levels for phase b and c are parallel to the

ac- and the ab-plane respectively. Together those planes

form little cubes around all the inverter states, creating

a three-dimensional A/D-converter. If the reference sig-

nal vector is somewhere in a comparison cube, the cor-

responding inverter state (in its center) will be selected.

Again, the application of the Park transform to the com-

parison cubes results in a rotation of the cubes into xyz-

space (see Fig. 8).

We now apply the Park transform to the three mod-

ified phase reference signals. Because the carrier added

to the reference signals is the same for all three phases, it

represents a common-mode component.

If

the original ref-

erence signals form a symmetrical sinusoidal three-phase

system with constant amplitude and frequency, its vector

representation will describe

a

circle parallel to the xy-

plane in zyz-space.

A

possible common-mode component

will move it along the z-direction. The modified reference

vector will have the triangular carrier added to this in the

z-direction (see Fig. 9).

The pulse-width modulation process in vector space can

now be described as follows. The reference vector is de-

scribing its orbit through the A/D-converter cube, moving

up and down with the carrier frequency all the time (in-

tersection of Fig.

9

with Fig.

8).

It will

go

through several

different comparison cubes on i ts way, and the correspond-

ing output states will be selected. If the original reference

vector is moving much slower than the carrier, the modi-

fied reference vector can touch maximally four comparison

cubes each carrier period. Seen along the z-axis (classical

phasor view), the modulator will sequentially select those

states for a certain time that form a triangle around the

phasor tip. Two of the four states are redundant in the xy-

plane, like the well-known zero states

b c (-1,

-1, -1)

and

Z a b c

- +l, 1, +l . This results basically in the

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X

-2

-1

0 1 2 2

1

0

1

2

X

Y

Fig. 8.

Transformed comparison levels

of

a

nine-level inverter.

Three-dimensional view and the projections

on

the xy-,

xz-

and

yt-planes respectively.

same modulation pattern as with the well-known classical

space-vector modulation procedure. By choosing appro-

priate values for the common-mode part of the reference

signals, the desired redundant or differential-mode

output states can be easily reached.

VI.

STATE-SPACEVERAGING

If the carrier frequency is significantly higher than the

output frequencyof the inverter, the state-space averaging

procedure can model the fundamental inverter behavior

(phenomena with a characteristic time much larger than

the switching period) in the continuous time domain. The

switching behaviour of the inverter is neglected by aver-

aging over one carrier period. The resulting model is sim-

pler: easier to understand, and much faster to simulate.

Using the description of the pulse-width modulator

given in the previous sections, the state-space averaging

procedure becomes very straight-forward.

For

each out-

put sta te of the multi-level inverter, the behavioral func-

tion has to be determined. The behavioral function be-

tween the inverter states can now be determined by simple

linear interpolation in three-dimensional space. To find

the inverter behavior for a chosen reference vector orbit ,

the interpolation has to be done along this reference vec-

tor orbit.

Often the output voltage common-mode part can t

least to a certain amount e considered as a degree

of freedom for the inverter output voltage. It is often

used to optimize the switching pattern [9, 0, 11,

12,

131.

a

-1

-2

-2

t

h

- 1 0 1 2

2 1

?i*, ?i*

0

1

-1

l

1 1 a * ,

a*

-2

2

1

0 1 2 -2

1 0

1 2

X Y

Fig.

9.

Original

( a )

nd modified

( a * )

eference vector

of

a

nine-

level inverter.

m

= 1.15. Three-dimensional view and the projec-

tions on the

xy-, xt-

and yz-planes respectively.

To visualize and to optimize the influence of the possible

common-mode output voltages on other inverter behavior

of interest (e.g. the voltages of intermediate-circuit capa-

citors in multi-level inverters), the state-space averaging

procedure can be applied to reference vector orbits for all

possible common-mode components. A symmetrical si-

nusoidal three-phase system with constant amplitude and

frequency is represented by a vector that describes

a

circle

parallel to the zy-plane. Since the common-mode compo-

nent will move it along the z-direction,

a

cylinder paral-

lel to the z-axis is obtained

for

all common-mode values.

Intersection

of

this cylinder with the interpolated (state-

space averaged) inverter-states function cube results in

the inverter behavior

as a

function of the output voltage

phase angle and common-mode component. An example

of this method will be given in the next section.

VII. NEUTRAL-POINT

OLTAGE OF

NPC-INVERTER

In a neutral-points-clamped (NPC) inverter, the neu-

tral-points voltages are usually not fixed from the s u p

ply side. An active control method

is

needed to stabilize

these voltage levels [2,

10, 14,

151. In some operating

points large oscillations of t he voltages can be observed.

To

understand these phenomena and to be able to design

a

stabilization controller, we will investigate the behavior

of the neutral-point voltage of a three-level NPC-inverter

using the method described in the previous sections.

The derivative

of

the neutral-point voltage at the in-

verter switching states is proportional to the tota l current

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2

1

a 0

-1

-2

1 '

- 0

-1

-2 -1 0 1

2

2

2 1

-2

-1

0

1

2

X

2

1

N O

-1

-2

1 '

- 0

-1

-2

2

-1

0 1 2

Y

Fig. 10. Neutra l-poin t voltage derivative of a three-level NPC-

inverter

as a

function of time and common-mode component. m =

0.8, cos(4) = 0.8. Three-dimensional view and th e projectio ns on

the xy- z- and yz-planes respectively.

draw from it:

T h i s

function will be interpolated and intersected

with

the output voltage cylinder of interest. Fig. 10 shows the

result for

a

modulation index m = 0.8 and

a

load-current

angle cos(q5)

=

0.8.

Red zones mean

a

positive and blue

zones a negative neutral-point voltage derivative. Th e

curved boarders of the cylinder originate from the tilted

states-cube faces.

The cylinder surface can be flattened to a two-dimen-

sional graph, which shows the voltage derivative as a func-

tion of the output voltage phase angle and common-mode

component. Possible common-mode paths can be drawn

on top of it. To find the resulting neutral-point voltage,

the derivative must be integrated along

a

chosen common-

mode path. Some examples of voltage derivatives and

common-mode paths

for

different operating points are

given in Fig. 11, 12 and 13. As can be clearly seen,

the possibilities to select the common-mode component

are reduced for increasing output voltage. Especially,

a

non-zero common-mode component is needed for

a

mod-

ulation index m

>

1. The cylinder surface vanishes for

m

>

2 1.15, which indicates that pulse-width modu-

lation is no longer possible.

It is interesting to see that the voltage derivative is very

i

I I

= 0 .3

I

,

os(+) = 0.6

iP

I

I

-0.5

I

* 0

1

Fig.

11.

inverter as a function of time and common-mode component.

Neutral-point voltage derivative of

a

three-level NPC-

m

= 0.8

1

+

0

- 1

0

1

'2 0

-1

1

0 i7T ;7r

x x ; x 2 r

w

Fig. 12.

inverter as

a

function of time and common-mode component.

Neutral-point voltage derivative of

a

threelevel NPC-

1

= 1.1

0.5

. , . . . . . . .

L

k 4 )

=

0.6

'2 0

1

1

2

0

1

0

0.5

0 x $ x

x

4 gx 2 r

w

Fig. 13.

inverter as a function of time an d common-mode component.

Neutral-point voltage derivative of a three-level NPC-

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small along the indicated common-mode paths if the out-

put current is in phase with the output voltage (cos(+) =

l ,

which means little oscillations in the neutral-point

voltage as well. However, the voltage derivative (and

thus the voltage itself) increasingly oscillates with the

third harmonic frequency if the output-current phase an-

gle increases (cos(4) 0) . For some operating points a

common-mode path for zero neutral-point voltage deriva-

tions can be found, for others voltage oscillations are

unavoidable. By integrating the neutral-point voltage

derivative along a chosen common-mode path, the am-

plitude of the oscillations can be calculated.

VIII. CONCLUSION

In this paper

a

PWM-strategy for all types

of

multi-

level voltage-source inverters was presented. It wa s

shown to behave like a three-dimensional analog-to-digital

(A/D)

converter.

A

carrier signal improves the output

quality of the low-resolution A/D-converter and generates

the well-known PWM-signals. Using this description, the

state-space averaging procedure becomes very straight-

forward and fundamental inverter behavior can be easily

modeled and analyzed. The method was demonstrated on

the neutral-point voltage variations of a three-level NPC-

inverter. Operating point dependent oscillatory phenom-

ena can be easily understood.

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PWM-Control of Multi-Level Voltage-Source Inverters

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