PSpice Applications for Power Electronics
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Transcript of PSpice Applications for Power Electronics
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Power System Analysis Using PSpice
Power System Division / ONYX Technologies, Inc.
PSpice Applications for Power Electronics
PSpice Applications for Power Electronics
TEL: 031-908-7577FAX: 031-908-7579
Mobile: 011-237-3846
mailto:[email protected]:[email protected] -
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Power System Analysis Using PSpice
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Magnetic Core Modeling
Magnetic Core Modeling
The parameters in the model library(magnetics.lib) were derived from the data sheetsfor each core.
Model parameters for ferrite material (Philips 3C8) were obtained by trial simulations,
using the B-H curves from the manufacturer's catalog.Then, the library was compiled from the data sheets for each core geometry.
Notice that only the geometric values change once a material is characterized.
The Jiles-Atherton magnetics model is described in:
Theory of Ferromagnetic Hysteresis, by D C Jiles and D L Atherton,
Journal of Magnetism and Magnetic Materials, vol 61 (1986) pp 48-60
The Jiles-Atherton magnetics model is described in:
Theory of Ferromagnetic Hysteresis, by D C Jiles and D L Atherton,
Journal of Magnetism and Magnetic Materials, vol 61 (1986) pp 48-60
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Power System Analysis Using PSpice
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Magnetic Core Modeling
Magnetic Core Modeling
Notes:
1) Using a K device (formerly only for mutual coupling) with a model
reference changes the meaning of the L device: the inductance value
becomes the number of turns for the winding.
2) K devices can "get away" with specifying only one inductor, as in the
example above, to simulate power inductors.
Demonstration of power inductor B-H curve To view results with Probe (B-Hcurve):
1) Add Trace for B(K1)
2) set X-axis variable to H(K1)
Probe x-axis unit is Oersted
Probe y-axis unit is Gauss
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Power System Analysis Using PSpice
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Magnetic Core ModelingMagnetic Core Modeling
Name Meaning Unit Default
AREA Mean magnetic cross section cm2 0.1
PATH Mean magnetic path length cm 1.0
GAP Effective air-gap length cm 0
PACK Pack(stacking) 1.0
MS Magnetic saturation A/m 1E+6
ALPHA Mean field parameter 1E-3
A Shape parameter 1E+3
C Domain wall-flexing constant 0.2
K Domain wall-pinning constant 500
1. K=0 : Anhysteric Curve Setup
2. Bmax : Bmax=MS*0.012573. A : Get a Curve4. K : Create Hysteresis5. C : Initial Permeability
1. K=0 : Anhysteric Curve Setup2. Bmax : Bmax=MS*0.012573. A : Get a Curve4. K : Create Hysteresis5. C : Initial Permeability
Method I
1. MS ; Bmax/0.01257
2. 100A/m=1.25 oersted
3. MS, A, C, K B-H Loop 4. Core Size Area Path
1. MS ; Bmax/0.012572. 100A/m=1.25 oersted
3. MS, A, C, K B-H Loop 4. Core Size Area Path
Method II
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Magnetic Core ModelingMagnetic Core Modeling
* 3C81_LSW CORE model
* updated using Model Editor release 9.2.2 on 11/15/01 at 11:16
* The Model Editor is a PSpice product.
.MODEL 3C81_LSW CORE
+ GAP=0
+ MS=384.61E3
+ A=27.747+ C=.2418
+ K=18.396
+ AREA=2.7900
+ PATH=14.400
*$
Ferroxcube 3C81 Core: www.Ferroxcube.com
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Magnetic Core ModelingMagnetic Core Modeling
Example(Ferroxcube )33C81C81
H(Oersted) B(Gauss)
0 1100
0.176 0
3.125 4250
0.625 2560
0.625 3400
FIG. 1.
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Magnetic Core ModelingMagnetic Core Modeling
Example(FerroxcubeExample(Ferroxcube ))H(Oersted) B(Gauss)
0 1100
0.176 0
3.125 4250
0.625 2560
0.625 3400
ValueName
18.396
0.2418
27.747
384610MS
A
K
C
Active ParametersInitial Perm : 2700
FIG. 2.
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Magnetic Core ModelingMagnetic Core Modeling
H( K1)
- 3. 0 - 2. 0 - 1. 0 - 0. 0 1. 0 2. 0 3. 0
B( K1)
- 5 . 0K
0
5 . 0 K H( K2)
- 3. 0 - 2. 0 - 1. 0 - 0. 0 1. 0 2. 0 3. 0B( K2)
- 5 . 0K
0
5 . 0 K
SEL>>
3C81_LSW
EC70_3C81
BB--H CurveH Curve
1. 3C81_LSW1. 3C81_LSW2. EC70_3C812. EC70_3C81
FIG. 3
I1IOFF = 0
FREQ = 10kIAMPL = 0.5
TD = 1usec
0
L2
100
1
2
K
COUPLING=
K1
13C81_LSW
R1
0.1
K
COUPLING=
K2
1EC70_3C81
L1
100
1
2
R3
0.1
R2
0.1 FIG. 4
FIG. 5
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Magnetic Core ModelingMagnetic Core Modeling
BB--H CurveH Curve
H( K1) @1
- 8 0 0m - 4 0 0m 0 4 0 0m 80 0mB( K1)
- 5 . 0K
0
5 . 0 K
50T
100T
200T
0
PARAMETERS:L1 = 50
L1
{L1}
1
2
R1
0.1
K
COUPLING=
K1
13C81_LSW
I1
IOFF = 0
FREQ = 1kIAMPL = 0.02
TD = 1msec
I3
IOFF = 0
FREQ = 1kIAMPL = 0.1
TD = 3msec
I2
IOFF = 0
FREQ = 1kIAMPL = 0.05
TD = 2msec
FIG. 6
FIG. 7.
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Modeling of TransformerModeling of Transformer
Equivalent Circuit : ABM1. K_Linear2. PSpice Template Properties
Equivalent Circuit : ABM1. K_Linear2. PSpice Template Properties
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Whats ABM(Analog Behavioral Modeling)?Whats ABM(Analog Behavioral Modeling)?
Behavioral Modeling is the process of developing a model for adevice or system component from the viewpoint of externallyobserved behavior rather than from a microscopic description
Two important application of Behavioral Modeling in the domainof analog simulation are : modeling new device types : andblock-box modeling of complex systems.
ApplicationsAveraged-PWM Switch, Transformer, PWM IC
F1
F
Current-Controlled Voltage Source
Current-Controlled Current Source
+
-
G1
G
+-
H1
H
Voltage-Controlled Voltage Source
Voltage-Controlled Current Source
-+
+
-
E1
E
G2
V(%IN+, %IN-)GVALUE
OUT+OUT-
IN+IN-
E2
V(%IN+, %IN-)EVALUE
OUT+OUT-
IN+IN-
E1
V(%IN+, %IN-)EVALUE
G3
V(%IN+, %IN-)GTABLE
OUT+OUT-
IN+IN-
E3
V(%IN+, %IN-)ETABLE
OUT+OUT-
IN+IN-
G1
V(%IN+, %IN-)GVALUE
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Transformer Equivalent CircuitTransformer Equivalent Circuit 1. : ABM 2. : R, L C
4
3
3
0.269m
L1
6
2.51
Rs
0.0311
R2
-+
+
-
E1
ENOM
F1
FNOM
4
10R1
4
5
65.578HLm
R5
1Meg
3
5
V1
6
0.0269124
L
73kRm
Ideal Transformer
FIG. 9
FIG. 8
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K_LinearK_Linear
H( K1)
- 10 - 5 0 5 10B( K1)
-5 .0K
0
5. 0K
R1
0.1
0
V1
FREQ = 1kVAMPL = 10VOFF = 0 R3
{Ro}
R2
1meg
PARAMETERS:Ro = 1
L1
1
1
2
L2
1
1
2
K
COUPLING=
K1
13C81_K_LINEAR_LSW
FIG. 10
FIG. 11
P S t A l i U i PS i
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XFRM_LINEAR or XFRM_NONLINEAR Editing Transformer Template PropertiesXFRM_LINEAR or XFRM_NONLINEAR Editing Transformer Template Properties
K^@REFDES L1^@REFDES L2^@REFDES@COUPLING\nL1^@REFDES %1 %2
@L1_VALUE\nL2^@REFDES %3 %4 @L2_VALUE
TX4
L1_VALUE = 10uH L2_VALUE = 10uH
XFRM_LINEAR
XFRM_NONLINEAR
K^@REFDES L1^@REFDES L2^@REFDES @COUPLING
@MODEL\nL1^@REFDES %1 %2 @L1_TURNS
\nL2^@REFDES %3 %4 @L2_TURNS
TX23C81-HCM
L1_TURNS = 2 L2_TURNS = 1
K^@REFDES L1^@REFDES L2^@REFDES L3^@REFDES@COUPLING @MODEL\nL1^@REFDES %1 %2 @L1_TURNS
\nL2^@REFDES %3 %4 @L2_TURNS \nL3^@REFDES %5 %6
@L3_TURNS
TX33C81-HCM
L1_TURNS = 5
L2_TURNS = 1
L3_TURNS = 1
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Waveforms with Nonlinear Transformer
TX1
kbreak
L1_TURNS = 10 L2_TURNS = 1
R51meg
R2
10
0
R1
0.1
V1
FREQ = 100kVAMPL = 10VOFF = 0
Ti me
0s 5us 10us 15us 20usV( R1 : 2 ) V( TX1 : 3 )
-10V
- 5V
0V
5V
10V
Secondary
Pri mar y
FIG. 12 0
V2
FREQ = 100kVAMPL = 10VOFF = 0
R6 1meg
R3
10
TX23C81_LSW
L1_TURNS = 10 L2_TURNS = 1
R4
0.1
FIG. 14
Ti me
0s 5us 10us 15us 20usV( R4: 1 ) V( R3 : 1)
-12V
- 8V
- 4V
0V
4V
8V
12V
Secondary
Pri mar y
FIG. 15FIG. 13
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Ti me
0s 5us 10us 15us 20usV( R7: 2) V(TX3: 3) V(TX3 : 5 )
-12V
- 8V
- 4V
0V
4V
8V
12V
Secondar y2
Secondar y1
Pr i mar y
XFRM_Nonlinear
Template
R11 1meg
TX33C81_LSW
L1_TURNS = 5
L2_TURNS = 2
L3_TURNS = 1
V3
FREQ = 100kVAMPL = 10
VOFF = 0
R9
10
R7
0.1R8
10
0
FIG. 16
FIG. 17
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Power System Analysis Using PSpice
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Switching Mode Power Supply
Isolation Type Non-Isolation Type
Flyback
Forward
Half Bridge
Full Bridge
Push Pull
Buck (Step Down)
Boost (Step Up)
Buck-Boost
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Switching Mode Power Supply
Type Inductor Capacitor
Cuk
Sepic
Zeta
Buck (Step Down)
Boost (Step Up)
Buck-Boost
Flyback
Forward
Half Bridge
Full BridgePush Pull
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y y g p
Power System Division / ONYX Technologies, Inc.
Buck ConverterBuck Converter
Ti me
0s 2. 0ms 4. 0ms 6. 0ms
V( R3: 1) I ( L1)
- 4 . 0
0
4. 0
8. 0
I n du c t o r Cu r r e n t
Out put
C1
200uIC = 0
R4
0.1
R3
10
V6
TD = 1n
TF = 1nPW = 4uPER = 10u
V1 = 0
TR = 1n
V2 = 10
V70Vac
TRAN =
12VdcSG
R6
1meg
R2
0.001
L1
150uH
G
R5
10
R1
0.1
0
M1IRF150
D1
MBR360
S
FIG. 19
Ti me
4. 560ms 4. 580ms 4. 600msV( R3: 1) I ( L1)
400m
500m
345m
567m
FIG. 18
FIG. 20
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y y g p
Power System Division / ONYX Technologies, Inc.
vL
(Vi-Vo)
iL,peak
iL
(-Vo)
DTs Ts t
ILB=Io,min
iL
FIG. 21
Design of Buck ConverterDesign of Buck ConverterInput Voltage : 12V
Output Voltage : 4.8V
Output Current : 0.1 ~ 3A
Frequency : 100kHz
)1(dt
diLvL=
)2()1()( SoSoi TDVDTVV =
4.0)3(
===>=
DDVV ino
)7(1 cLccccco RiRiRidtiC
v =+=
)8(8
)1(2
LC
DT
V
v S
o
o =
)5()(22
1min,ooi
SLLB IVV
LDTiI ===
)4(Soin
onoin
L DTL
VVT
L
VVi
=
=
)9(
8
)1(2
o
oS
v
V
L
DTC
=
)6(2
)1(
min,o
So
I
TDVL
=
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Power System Division / ONYX Technologies, Inc.
Simulation WaveformsSimulation WaveformsFIG. 22
Ti me
4. 5 400ms 4. 5 420ms 4. 5 440ms 4. 5460ms 4. 5480ms 4. 5500ms 4. 5520ms 4. 5540ms1 V(L1:1)- V(L1:2) 2 I ( L1)
-5 .00
0
5.00
7.851
400mA
500mA
324mA
589mA2
>>
( 4. 5500m, 359. 327m)
( 4. 5441m, 7. 2568)
( 4. 5541m, 556.37
(4. 5400m, -4. 9904)
On time : 4.551ms-4.54ms=4.1us
Off time : 10us-4.1us=5.9us
iL : 556.3mA-359.2mA=197.1mA
(Vi-Vo) : 7.26
(-Vo) : 4.99
Inductor Voltage(1)
Inductor Current(2)
Ti me
4. 428ms 4. 432ms 4. 436ms 4. 440ms 4. 444ms 4. 448ms1 I ( L1) 2 I ( C1) 3 V( C1: 1 )
30 0mA
40 0mA
50 0mA
60 0mA1
>>- 400mA
0A
40 0mA2
4 . 576V
4 . 580V
4 . 584V3
I n d u c t o r Cu r r e n t Ca p a c i t o r Vo l t a g e
Ca pa c i t o r Cu r r e n t
FIG. 23
Inductor Current(1)
Capacitor Current(2)
Capacitor Voltage(3)
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Ti me
0s 5ms 10ms
V( OUT) I ( L1)
- 1 00
0
100
200
I n du ct o r Cu r r e n t
Ou t pu t Vo l t age
FIG. 25
Boost ConverterBoost Converter
in
0
R5
100k
R1
0.1
R3
10R4
10
L1
50uH
V2
TD = 1n
TF = 1nPW = 3uPER = 10u
V1 = 0
TR = 1n
V2 = 10
C1
470u
switch out
D1
MBR1045
R2
0.01
M1
IRF540
V1
48Vdc
Ti me
8. 880ms 8. 920ms8. 854ms 8. 959msV( OUT) I ( L1)
8 . 0 0
1 0 . 0 0
6 . 9 9
1 1 . 6 5
FIG. 24
FIG. 26
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Power System Division / ONYX Technologies, Inc.
Design of Boost ConverterDesign of Boost ConverterInput Voltage : 12VOutput Voltage : 4.8V
Output Current : 0.1 ~ 3A
Frequency : 100kHz
vL
-(Vi-Vo)
iL,peak
iL
Vi
DTs Ts t
ILB=Io,min
iL
FIG. 27
)10(dtdiLvL =
)11()1( SoSi TDVDTV =
33.0
)12(1
1
===>
=
D
VD
V ino
)17(1
cLccccco RiRiRidtiC
v =+=
)14(22
1i
SLLB V
L
DTiI ==
)13(Soin
onoin
L DTL
VVT
L
VVi
=
=
)18(C
DT
R
Vo
C
DTI
C
Qv SSoo ==
=
)19(o
oS
v
V
R
DTC =
)16(2 min,
2
o
So
I
TDDVL
=
)15(22
)1(
min,
2
oSo
Si
LBSLB
T
DT LBOB
ITDDL
VTDD
L
V
DITDIdtII
S
S
===
===
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Boost ConverterBoost ConverterFIG. 28
Ti me
9. 970ms 9. 975ms 9. 980ms 9. 985ms 9. 990ms 9. 995ms 10. 000ms1 V( IN,L1:2) 2 I( L1)
-50V
0V
50V1
8A
9A
10A
11A
12A2
>>
( 9. 983m, 11. 010)
(9 . 980m, 8.2463)
(9 . 973m, -19. 963)
V( IN,L1:2)
On time : 4.551ms-4.54ms=4.1us
Off time : 10us-4.1us=5.9us
iL : 556.3mA-359.2mA=197.1mA
(Vi-Vo) : 7.26
(-Vo) : 4.99
Inductor Voltage(1)
Inductor Current(2)
Ti me
9. 970ms 9. 975ms 9. 980ms 9. 985ms 9. 990ms 9. 995ms 10. 000ms1 I ( R2) 2 I ( L1) 3 V( R2: 2 )
-10A
- 5A
0A
5A1
>>8A
9A
10A
11A
12A2
66.40V
66.42V
66.44V
66.46V3
Induc tor Curr entCapaci t or Cur r ent Capaci t or Vol t age
FIG. 29
Inductor Current(2)
Capacitor Current(1)Capacitor Voltage(3)
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Ti me
0s 5ms 10msV( R3: 1 ) I D( M2)
- 10
0
10
20
Swi t c h Cu r r e n t
Ou t p u t Vo l t a g e
FIG. 31
Flyback ConverterFlyback Converter
FIG. 30
R2
0.001
0
R4
10
M2
IRF840
TX1
3C81_LSW
50 10
V2
TD = 1n
TF = 1nPW = 3uPER = 10u
V1 = 0
TR = 1n
V2 = 10
C1
47u
D1
MBR1035
R5
100kR7
100k
R1
0.1
V3
0.1VacTRAN =
48Vdc
R3
100
Ti me
8. 5400ms 8. 5600ms8. 5287ms 8. 5743msV( R3 : 1) I D( M2)
0
250m
- 9 3 m
478m
FIG. 32
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Forward ConverterForward Converter
Ti me
0s 2ms 4ms 6ms 8ms 10ms1 V( M4 : d ) 2 I ( L1 ) 3 V( OUT)
- 5 0 V
0V
50 V
100V1
>>0A
5 . 0 A
1 0 . 0 A2
- 5 . 0 V
0V
5 . 0 V3
Ou t p u t Vo l t a g e
VdsSwi t ch Curr ent
Ti me
9. 2600ms 9. 2800ms 9. 3000ms 9. 3200ms9. 2432ms 9. 3378ms1 V( M4 : d ) 2 I ( L 1) 3 V( OUT)
7 0 . 0 V
7 2 . 0 V
6 8 . 4 V
7 2 . 6 V1
>>7 . 9 0 0 A
8 . 0 0 0 A
8 . 1 0 0 A
8 . 1 7 4 A2
2 . 9 0 0 V
3 . 0 0 0 V
3 . 1 0 0 V
3 . 1 7 4 V3
R7
50
R2
0.1
R3
0.01
R6
100k
V1
48Vdc
V2
TD = 1n
TF = 1nPW = 3u
PER = 10u
V1 = 0
TR = 1n
V2 = 10
R4
10
TX1
COUPLING = 0.93C81_LSW
30 5
30
C1
47u
R9
1
0
R5
10Meg
D2
MBR1045
D3
MBR1045
out
M4
IRF840
R1
1
L1
500uH
D15
MBR1045
FIG. 34
FIG. 33
FIG. 35
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Buck ConverterBuck Converter
1:D
DIO
DVin
IO
Vin VO
A C
P P
A C
P
FIG. 37FIG. 36
Duty
D
R1
1Meg
2
1
+-
H2
H
Vout
Vout=Vin*D
R3
1Meg
2
1
P
Vin0
G2
V(Io)*V(D)GVALUE
OUT+OUT-
IN+IN-Iin
Io
C
AE2
V(Vin)*V(D)EVALUE
OUT+OUT-
IN+IN-Iin=Iout*D
R6
1Meg
0
Averaged PWM Switch
R4
1Meg
2
1
FIG. 39
+-
H1
H
V(Out,Diode)=V(In,Diode)*DDuty_Cycle
D
In
Out
Averaged PWM-Switch
Diode
E1
EMULT
IN1+IN1-
IN2+IN2-
OUT+
OUT-I(In)=I(Out)*D
G1
GMULT
IN1+IN1-
IN2+IN2-
OUT+
OUT-
FIG. 38
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Boost ConverterBoost Converter
A
0
0
Iin=Io/(1-D)
E1
V(Vin)/(1-V(D))EVALUE
OUT+OUT-
IN+IN-
D
+ - H1
H
C
Vo
C
G1
V(Io)/(1-V(D))GVALUE
OUT+OUT-
IN+IN-
Io
R1
1Meg
0
P
P
D
Vin
R2 1k
A
A
Vo=Vin/(1-D)
FIG. 40
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Power System Division / ONYX Technologies, Inc.
Average PWM Buck ConverterAverage PWM Buck Converter
Ti me
0s 5ms 10msV( R14: 2) I ( L3)
- 4 . 0
0
4. 0
8. 0
I nductor Curr ent
Out put Vol t age
V( R14: 2) I ( L3)
V10
AC = 0VacTRAN =
DC = 12Vdc
R15
0.01
2
1
L3
{L3}
1 2R14
0.1
21
S2_1
AVG_PWM2
A
PDuty
C
R16
10
2
1C6
47u
1
2V12
1Vac
0.4Vdc
0
PARAMETERS:L3 = 150u
FIG. 41
FIG. 42
Frequency
1. 0Hz 100Hz 10KHz 1. 0MHz 100MHzVDB(R14: 2 ) VP(R14: 2 )
-200
-100
0
100
Phase Cur ve
Gai n Cur ve
Frequency
1. 0Hz 100Hz 10KHz 1. 0MHz 100MHzVDB( R14: 2) VP( R14: 2)
-200
-100
0
100
Frequency
1. 0Hz 100Hz 10KHz 1. 0MHz 100MHzVDB( R14: 2) VP( R14: 2)
-200
-100
0
100
FIG. 43 FIG. 44 FIG. 45
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Power System Division / ONYX Technologies, Inc.
Average PWM Boost ConverterAverage PWM Boost Converter
R1
0.1
L1
200uH
V2
0.1Vac0.3Vdc
S1
Boost_PWM
PC
A D
V10Vac
TRAN =
48Vdc
0
R3
20
C1
470u
R2
0.01
FIG. 46
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Power System Division / ONYX Technologies, Inc.
CompensationCompensationCompensation
Type I.
F r equency
1. 0Hz 100Hz 10KHz 1. 0MHzVDB( C1 : 2 ) VP( C1 : 2 ) - 1 80
- 1 0 0
0
10 0
Phas e
Gai n)20(2
1
RCfC =
C1
1n
IC = 0
1 2
VCC+
0
U1A
TL082
3
2
8
4
1
+
-
V+
V-
OUT
V3
5Vdc
R1
10k
21
VCC-
VCC+
V11Vac
1Vdc
VCC-
V2
0Vdc
V4
-5Vdc
0
FIG. 47
FIG. 49
R4
10k
21
V7
2.5Vdc
-+
+
-
E1
E
0
V81Vac
2.5Vdc
C2
1n
IC = 0
1 2
0
R5
10Meg
2
1
+
-
G1
G
FIG. 48
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Power System Division / ONYX Technologies, Inc.
Type II.
)21(
)(1)(
)1(
2
21
21121
21
+++
+=
RCC
CCsRCCs
RsC
v
v
o
c
)22(2
1
21
RCfZ
=
)23()(2
1
221
22221
21 CCRCRCC
CCfP >>
+= Q
)24(1
21
R
RAV =
F r e q u e nc y
1. 0Hz 100Hz 10KHz 1. 0MHzVDB( C1 : 2 ) VP( C1 : 2 ) - 1 8 0
- 1 0 0
0
10 0
Phase
Gai n
R2
10k
21
C2
1n
IC = 0
1 2
V11Vac
2.5Vdc
C1
100nIC = 0
1 2
VCC+
0
VCC-
V2
2.5Vdc
R1
1k
21
U1A
TL082
3
2
8
4
1
+
-
V+
V-
OUT
FIG. 51
FIG. 50
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Power System Division / ONYX Technologies, Inc.
F r equency
1. 0Hz 100Hz 10KHz 1. 0MHzVDB( C2 : 2 ) VP( C2: 2 ) - 1 80
- 1 0 0
- 50
0
50
Phase
Gai n
C2
100nIC = 0
1 2
R2
10k
21
V2
2.5Vdc
V11Vac
2.5Vdc
U1A
TL082
3
2
8
4
1
+
-
V+
V-
OUTR150k
21
0
VCC+
C1
5n
IC = 0
1 2
VCC-
R3
100k
21
FIG. 52
FIG. 53
Type III.
)25()1(
)1)(1(
2112
3211
RsCRsC
RsCRsC
v
v
o
c
+
++=
)26(2
1
11
1RC
fZ
=
)27(2
1
322 RCfZ =
)28(2
1
21RCfP
=
)29(21
31
RRRAV+
=
)30(2
32
R
RAV =
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Power System Division / ONYX Technologies, Inc.
Type IV.
)31(
1)1()(
)}(1){1(
21
221
33121
31321
+
+++
+++=
CC
RCCsRsCRCCs
RRsCRsC
v
v
o
c
)32(2
1
21
1RC
fZ
=
)34(2
1
33
1RC
fP
=
)33(2
1
)(2
1
133132 RCRRCfZ +=
)36(1
21
R
RAV =
)37()(
3
2
31
3122
R
R
RR
RRRAV
+=
)35()(2
12
21
22221
211 CC
RCRCCCCfP >>+= Q
Frequency
1. 0Hz 100Hz 10KHz 1. 0MHzVDB( C1 : 2 ) VP( C1: 2 ) - 1 80
-100
- 50
0
50
100
Phase
Gai n
FIG. 54
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Power System Division / ONYX Technologies, Inc.
C3
10p
1 2R9
5k
R11Meg
2
1
R15
1meg
R7
0.1
2
1
R10
5k
R13
10
f c=1/ {2*3. 14*sqr t ( LC)}
R14
1Meg
R11
{R11}
R5
1Meg
EA
Io
A
Vout=Vin*D
D
V5
2.5Vdc
0
G2
V(Io)*V(D)GVALUE
OUT+OUT-
IN+IN-
V21Vac
0.31Vdc
EA_out
C1
{C1}
1
2
0
Vin L1
{L1}
1 2
+-
H2
H
E3
V(EA_out)*0.5EVALUE
OUT+OUT-
IN+IN-
R3
1Meg
2
1
C
R8
1
2
1
V4
5Vac0Vdc
R2
0.1
21
0
E4
if(V(EA)>10, 1, V(EA))EVALUE
OUT+OUT-
IN+IN-
C2
100nIC = 0
12
R4
1meg
PARAMETERS:C1 = 400uFL1 = 150uHR11 = 1k
-+
+-
E1
E
+
-G1
G
R61Meg
Iin=Iout*D
P
V10Vac
16Vdc
R12
100k
VoutE2
V(Vin)*V(D)EVALUE
OUT+OUT-
IN+IN-
R16
1meg
D
F r equency
1. 0Hz 100Hz 10KHz 1. 0MHzVDB( L1: 2 ) VP( L1: 2 ) - 180
- 2 0 0
- 1 0 0
0
10 0
Phase
Gai n_R11=100k
Gai n_R11=10k
FIG. 56FIG. 55
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Power System Division / ONYX Technologies, Inc.
PF / THDPF / THD
Power FactorPower Factor What Is It and Why Must It Be Corrected?
INL ILjV )( =
)( INR RIV =VIN
IIN
L
R
VL
222 LRIV ININ +=
R
L=tan
INL ILV =
cosININ IRV =
Apparent Power
Reactive Power
True PowerFIG. 57 FIG. 58
Apparent Power = VINIIN
Actual Power = VINIINcos
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PF / THDPF / THD
PF avg v t i t
Vrms Irms= =
Average Power
Apparent Power
[ ( ) * ( )]
*
If v(t) has form of sine wave, power factor can be expressed as following.
PF Vrms Irms
Vrms Irms
Irms
IrmsKd K= = =
* ( ) *cos
*
( )cos *
1 1
THD Irms DIST
Irms=
( )
( )*
1100
THD
I rms I rms
Irms=
2 2 1
1 100
( )
( ) *
Irms DIST I rms I rms( ) ( )= 2 2 1Where,
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PF / THDPF / THD
THD Irms
Irms= (
( )) *
11 1002
THDK d
= 1 1 1002 *
KdTHD
=
+
1
1100
2( )
PF Irms
IrmsKd K Kd= = =
( )cos *
1
=
+
PFTHD
1
1100
2( )
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Relationship Between PF and THDRelationship Between PF and THD
Kd
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Equipment ClassificationEquipment Classification
Balancedthree-phaseequipment?
Portabletool?
Lightingequipment?
Equipmenthaving the
specialwave shape?
Motordriven?
Class
D
Class
A
ClassC
Class
B
No
No
No
No
Yes
Yes
Yes
Yes
Yes
No
/3 /3 /3
/2 0
0.35
1pki
i
M
t
Class D Wave Shape DefinitionFIG. 61
FIG. 60
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Power System Division / ONYX Technologies, Inc.
IEC 555-2 Absolute LimitsIEC 555-2 Absolute Limits
10
5
21
0.5
0.2
0.1
0.05
0.02
0.01
Amplitude
1 2 3 5 10 20 30 50 100
CLASS B
CLASS A
CLASS D
CLASS C
Harmonic Number (n)
Arms
FIG. 62
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IEC 555-2 Class D SpecificationIEC 555-2 Class D Specification
Harmonic Orde r mA/W Maximum Pe rmis s ible
Harmonic Current
3
57
9
1 1
13 and on
3 .4
1 .91 .0
0 .5
0.35
Linear Extrapolation
3.85/n
2.30
1.140.77
0.40
0.33
S e e Limits for Class
A Equipment
Notes:
1. Class-D specifications apply to equipment operating from a single-phase 220V ac line
with a waveshape such as that exhibited by the input current to a rectifier with a
apacitive input filter.
2. Current IEC documentation suggests that the above Class D limits will be applicable
from 1st January 1995 to all equipment having an input power from 75W to 600W.
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Power System Division / ONYX Technologies, Inc.
PFC Specification InformationPFC Specification Information
Power System Analysis Using PSpice
C i
Comparison
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ComparisonComparison
FIG. 63 FIG. 64
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Power System Division / ONYX Technologies, Inc.
Single Phase PFC TopologiesSingle Phase PFC Topologies
Single-Phase
PFC
Boost PFC
Buck+Boost
PFC
Flyback PFC
Isolated Boost
PFC
Shower PFC
Resonant
PFC
PWM Phase
Shift PFC
Dither PFC
BIFRED PFC
BIBRED PFC
VPEC
Circuits
Two Cascade
StagesSingle-Stage 1 Single-Stage 2
Parallel Power
Processing
Power System Analysis Using PSpice
B i T l & C t l M th d
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Basic Topology & Control MethodBasic Topology & Control Method
Vmo=K*Vm1*(Vm2-Vref)iL*Rcs
Vout
Vdet
4.Feed-back
AC
F/FR
SQ
+
_
X
+
_
3.Turn-ON
2.Turn-OFF
1.Boundary Vref
FIG. 65 FIG. 66
Power Factor :
Target : Ballast, High Efficiency SMPS
Switch turns on when iL reduces to zeroSwitch turns off when the switch current exceeds K*IViI*Vc
1
,,1
,1,1cos..
rmsTrms
rmsrms
rmsrms IV
IV
IV
P
S
PFP ===
1
,
,1cos
rmsT
rms
I
I=
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Experimental ResultsExperimental Results
- 250
- 200
- 150
- 100
- 50
0
50
100
150
200
250
0 100 200 300 400 500
- 250
- 200
- 150
- 100
- 50
0
50
100
150
200
250
0 100 200 300 400 500
Output Power = 60W Output Power = 125WFIG. 67 FIG. 68
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Experimental ResultsExperimental Results
- 250
- 200
- 150
- 100
- 50
0
50
100
150
200
250
0 100 200 300 400 500
0. 9
0. 91
0. 92
0. 93
0. 94
0. 95
0. 96
0. 97
0. 98
0. 99
1
80 100 120 140 160 180 200 220 240
I nput Vol t age
Power
Factor
Ro=1. 5k
Ro=1k
Ro=500
Output Power = 250WFIG. 69
Power Factor Versus the Input Voltage Variation
FIG. 70
Power System Analysis Using PSpice
Two Stage Topology
Two Stage Topology
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Two Stage TopologyTwo Stage Topology
PWM IC
L1
ViC1
Q1
D1 Q2
Q3
Q4
R1
C2
R2
CCFL
C3
T1
N1
N2
N3
N4
FIG. 71
Buck + Royer Inverter
Low System Efficiency
Self Oscillation
High Cost
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Simulation Circuit of Buck + Royer TopologySimulation Circuit of Buck + Royer Topology
C4
1u
0
L4
0.88uH
1
2
V
0
Q2
Q2N6473
V
C3
2u
0
L2
8uH
1
2
R7
10meg
0
C1 22p
DbreakD1
R6
10meg
0
R3
0.21kV1
TD = 0
TF = 1n
PW = 10uPER = 20u
V1 = 7
TR = 1n
V2 = 15
C2 22p
0
R2120k
V2
15Vdc
Q1Q2N6473
L5
0.206H
1
2
K K1
COUPLING = 1
K_Linear
0
R5
0.2k
R1
120k
M1IRFU9010
L3
8uH
1
2
0
L1
60uH
1 2
FIG. 72
Power System Analysis Using PSpice
Si l ti R lt
Simulation Result
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Simulation ResultSimulation Result
Ti me
0s 200us 400us 500usV( Q1: c ) V( Q2: c )
-10V
0V
10V
20V
30V
40V
FIG. 73
Ti me
0s 200us 400us 500usV( C1: 2) V( R2: 1)
- 400V
- 200V
0V
200V
400V
FIG. 74
Power System Analysis Using PSpice
Single Stage Topology
Single Stage Topology
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Single Stage TopologySingle Stage Topology
Vi
Q1
Q2
C2
C1
L1
C3
R1
T1
N1 N2
C4
CCFLR2
CONTROL IC
FIG. 75
Half Bridge Converter
High System Efficiency
PWM / PFM Control Method
Low Cost
Power System Analysis Using PSpice
Freq Characteristic of Po er Stage
Freq Characteristic of Power Stage
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Freq. Characteristic of Power StageFreq. Characteristic of Power Stage
R8 VR1
D4
D3
LAMP
T1C4
C5
L1S1
S2
Vin 8 -
20Vdc
Feedback
AC 1V
V PROBE
fr
2kV
Vin=8V
Vin=20V
Dimming Max
Dimming Min
f.min f.max
Operating Area
Pulse Frequency Modulation
High Side Gate Drive
Charge Pump Technique
(NMOS) High System Efficiency
Class D Type CCFL Inverter
Low Cost
FIG. 76
Power System Analysis Using PSpice
Power Stage AC Simulation
Power Stage AC Simulation
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Power Stage AC SimulationPower Stage AC Simulation
FIG. 77
Power System Analysis Using PSpice
AC Simulation Result
AC Simulation Result
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AC Simulation ResultC S u at o esu t
0
50
100
150
200
250
0 50000 100000 150000 200000 250000
Fr equency
Voltage
V( R68K)
V( R150K)
FIG. 78
Power System Analysis Using PSpice
C S C
AC Si l ti th t C id A t l P t
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AC Simulation that Consider Actual ParametersAC Simulation that Consider Actual Parameters
FIG. 79
Power System Analysis Using PSpice
Simulation Results(Ideal / Actual Case)
Simulation Results(Ideal / Actual Case)
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Simulation Results(Ideal / Actual Case)Simulation Results(Ideal / Actual Case)
0
200
400
600
800
1000
1200
1400
0 50000 100000 150000 200000Fr equency
Voltage
V( out 1)
V( out 2)
Ideal
Actual
FIG. 80
Power System Analysis Using PSpice
Power Stage Design Guideline
Power Stage Design Guideline
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40.0
60.0
80.0
100.0
120.0
140.0
1.00 1.20 1.40 1.60 1.80 2.00
Q
N[turnsratio]
Frequency response of output voltage
0
400
800
1200
1600
1E+3 10E+3 100E+3 1E+6
frequency f [Hz]
outputvoltag
e[V]
Parameter Description Typical Value UnitsVLrms Nominal Lamp Operating Voltage at full brightness 420 V
ILrms Nominal Lamp Operating Current at full brightness 5 mA
fo Minimum Operating Locked Frequency 53 kHz
Lm Primary side Magnetizing Inductance 143 H
Cout Output Ballasting Capacitor 100pF
Vin Power circuit DC voltage 7 V
Cs Input DC Decoupling Capacitor 0.8 H
N Turns ratio of Transformer 74 none
1. The vertual resistance of the lamp at the operating point Rout = 84.0 k
2. The RMS value of the equivalent sinewave source voltage Vrms = 3.15 V
3. The input impedance Rs = 4.73
4. The impedance of the converted secondary capacitance Xcop = 48.5
5. The parallel equivalent load resistance Rop = 17.4 6. The total parallel net capacitance Xctot = 10.6
7. The net value of the required series inductor XLs = 11.5
8. The impedance of the primary side magnetizing inductance XLm = 47.6
9. The actual capacitive impedance that must be used Xcp = 10.6
10. The parallel capacitor value Cp = 284 nF
11. The series inductance value Ls = 34.5 H
KA7523
Vi
Q1
Q2
C2
C1
L1
C3
R1
T1
N1 N2
CCFL
1 : 74
234nF
34.5uH
0.3uF
Program of Des ign guide line
Control IC FIG. 81
FIG. 82 FIG. 83
Power System Analysis Using PSpice
Mi d Di i C t l M th d
Mixed Dimming Control Method
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Mixed Dimming Control MethodMixed Dimming Control Method
+
R223k
Vdim:1.5VIdim:66.7uA(Vref:1.31V)
E/A
Q26
-
R161.2k
Burst DimmingOSC(COMP2)
R210.5k
-
BurstCt
Vref:1.253.65V
1.5V
150Hz
DIM(Vdim:05V)
C5
PWMComparator
Iref
Q22
R180.3k
IS
+
S/S
Q24
Feedback
R190.5k
Vdim:5.0VIdim:2.4mA(Vref:3.65V)
Q25
Idim
R170.3k
Q23
R2030k
+
0.1V
Idim
5V
R231kQ27
Burst Ct Frequency=150Hz
E/AOutp
Switching Frequency=100kHz
OutputDrive
Burst OSC Ct
Main Switching Frequency=100kHz
Analog Dimmi ng Mode
Main Switch Operating Period
MainCt
MainOSCCt
BurstOSC Ct
Burst Dimming Mode
Vdim
1.5V
Analog Dimming Area
Burst Dimming Area
5.0V
Vdim
1.4V
Burst OSCCt
Analog + BurstDimming Area
Operating Area by the Dimming Voltage
FIG. 85
FIG. 86
Timing Waveforms of the Control Circuit
Functional Block Diagram of Mixed Dimming Method
FIG. 84
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Experimental Results
Experimental Results
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Experimental ResultsExperimental Results
Soft Start
Lamp Current
Vin: 8V
Lamp Current
Vin: 20V
FIG. 87 FIG. 88
Power System Analysis Using PSpice
E i t l R lt
Experimental Results
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Experimental ResultsExperimental Results
Burst Dimming Function
Lamp Voltage
Output Drive
Css
COMP
FIG. 89
Power System Analysis Using PSpice
Experimental Results
Experimental Results
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Power System Division / ONYX Technologies, Inc.
Experimental ResultsExperimental Results
Open Lamp Regulation
Lamp Voltage
Output Drive
SDP
FIG. 90