Processor Innovation for Intelligent Networks Printed in the USA 525 BGA • Wired and Wireless...

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Custom CPU Core Optimized for Networking cnMIPS™ CPU core (MIPS64/32 compatible) Available in 300MHz to 500MHz versions Enhanced MIPS64 integer (Release2) instruction set Dual-issue, five-stage pipeline, optimized latencies Auto instruction pre-fetching and advanced data pre- fetching features to minimize memory stalls High Performance Coherent Memory Subsystem 64KB – 128KB ECC protected L2 cache with locking, partitioning features for optimal performance Integrated mainstream 16 – 32b DDR2 memory controller with ECC, up to DDR2-533 Integrated Coprocessors for Application Acceleration Packet I/O processing, QoS, TCP Acceleration Support for IPsec, SSL, SRTP, WLAN security (includes DES, 3DES, AES, SHA1, SHA-2 up to SHA-512, RSA, DH) Integrated High-Performance Networking Interfaces Up to 3 Configurable Ethernet I/Os - 3x FE/GE MACs (RGMII/MII) or 1x RGMII/MII + 1x GMII Integrated 32bit, 66MHz PCI host or slave TDM interface for glueless VoIP support USB 2.0 host with integrated PHY Low Power Consumption: 2W - 4W Small Footprint Package: 525 HSBGA (CN3010), 350 PBGA (CN3005) Market Leading Performance Up to 1 Billion instructions per second 100Mbps to 1Gbps application performance Up to 1Gbps 64B IP forwarding Up to 1Gbps for TCP, IPsec, SSL Support for Voice, Video and Data with integrated Hardware Queuing, scheduling Very low latency for real-time traffic Reduced BOM Cost with Essential Interfaces for Next Generation Networking Equipment Glueless support for switching, WLAN, voice and video High-speed USB2.0 enables printer, storage connectivity Flexible Architecture allows Host and Co-processor Implementations Industry-Standard Programming Model without any Need for Proprietary Tools or Micro-coding Fully Software Compatible with OCTEON CN38XX, CN36XX, CN31XX to deliver 1- 16 CPU scalability Processor Innovation for Intelligent Networks 805 East Middlefield Road Mountain View, CA 94043 T 650.623.7000 F 650.625.9751 E [email protected] www.caviumnetworks.com OCTEON CN30XX MIPS64-Based Secure Communication Processors Product Brief CN3010 Block Diagram FEATURES BENEFITS TM CN3005 Block Diagram 64KB Shared L2 Cache 64KB Shared L2 Cache Hyper Access Memory Controller Hyper Access Memory Controller Coherent Bus DDR II 16 bit wide I/O Bus Sched/ Synch/ Order Sched/ Synch/ Order 1 cnMIPS core Security MIPS64 r2 Integer Packet 16K Icache 8K Dcache 2K Write Buffer Security MIPS64 r2 Integer MIPS64 r2 Integer Packet 16K Icache 8K Dcache 2K Write Buffer Packet Input Packet Input Packet Input Packet Input Packet Output Packet Output I/O Bridge I/O Bridge Boot/flash GPIO 2xUART 32-bit, 66MHz Packet Interface Packet Interface Misc I/O Misc I/O RNG RNG PCI PCI TCP Unit TCP Unit 2x RGMII/MII or 1x GMII USB USB USB 2.0 Host w/ PHY The OCTEON CN30XX family of MIPS64 processors targets intelligent broadband networking, control plane, storage, and wireless applications in next-generation equipment from 100 Mbps to 1Gbps. This family consists of 4 different software-compatible processors, with a cnMIPS64 core and integrated next-generation I/Os including Fast Ethernet, Gigabit Ethernet, TDM/PCM, and USB 2.0, along with the most advanced security, packet processing and QoS features. CN30XX processors are the industry’s first products to deliver the performance of 64-bit computing and integrated L2 cache starting at sub-$20 price points. Supported by industry-standard software toolchains and operating systems, the CN30XX is ideal for 802.11a/b/g/n, VDSL2, PON, triple-play, UTM, SOHO/SMB NAS, and VoIP applications. OVERVIEW Multi-Core MIPS64 Processors R 128KB Shared L2 Cache 128KB Shared L2 Cache Hyper Access Memory Controller Hyper Access Memory Controller Coherent Bus DDR II 36 bit wide I/O Bus Sched/ Synch/ Order S che d/ Synch/ Order 1 cnMIPS core Security MIPS64 r2 Integer Packet 16K Icache 8K Dcache 2K Write Buffer Security MIPS64 r2 Integer MIPS64 r2 Integer Packet 16K Icache 8K Dcache 2K Write Buffer Packe t Input Packet Input Packe t Input Packet Input Packe t Output Packet Output I/O Bridge I/O Bridge Boot/flash GPIO 2xUART 32-bit, 66MHz Packet Interface Packet Interface Misc I/O Misc I/O RNG RNG PCI PCI TCP Unit TCP Unit 3x RGMII/MII or 1x RGMII/MII + 1x GMII USB USB USB 2.0 Host w/ PHY TDM/PCM TDM/PCM TDM/PCM

Transcript of Processor Innovation for Intelligent Networks Printed in the USA 525 BGA • Wired and Wireless...

Custom CPU Core Optimized for Networking• cnMIPS™ CPU core (MIPS64/32 compatible)• Available in 300MHz to 500MHz versions• Enhanced MIPS64 integer (Release2) instruction set• Dual-issue, �ve-stage pipeline, optimized latencies• Auto instruction pre-fetching and advanced data pre- fetching

features to minimize memory stalls

High Performance Coherent Memory Subsystem• 64KB – 128KB ECC protected L2 cache with locking, partitioning

features for optimal performance• Integrated mainstream 16 – 32b DDR2 memory controller with

ECC, up to DDR2-533

Integrated Coprocessors for Application Acceleration• Packet I/O processing, QoS, TCP Acceleration• Support for IPsec, SSL, SRTP, WLAN security (includes DES, 3DES,

AES, SHA1, SHA-2 up to SHA-512, RSA, DH)

Integrated High-Performance Networking Interfaces• Up to 3 Con�gurable Ethernet I/Os - 3x FE/GE MACs (RGMII/MII) or

1x RGMII/MII + 1x GMII• Integrated 32bit, 66MHz PCI host or slave• TDM interface for glueless VoIP support• USB 2.0 host with integrated PHY

Low Power Consumption: • 2W - 4W

Small Footprint Package: • 525 HSBGA (CN3010), 350 PBGA (CN3005)

Market Leading Performance • Up to 1 Billion instructions per second• 100Mbps to 1Gbps application performance • Up to 1Gbps 64B IP forwarding • Up to 1Gbps for TCP, IPsec, SSL

Support for Voice, Video and Data with integratedHardware • Queuing, scheduling• Very low latency for real-time tra�c

Reduced BOM Cost with Essential Interfaces for NextGeneration Networking Equipment• Glueless support for switching, WLAN, voice and video• High-speed USB2.0 enables printer, storage connectivity

Flexible Architecture allows Host and Co-processorImplementations

Industry-Standard Programming Model without anyNeed for Proprietary Tools or Micro-coding

Fully Software Compatible with OCTEON CN38XX, CN36XX, CN31XX to deliver 1- 16 CPU scalability

Processor Innovation for Intelligent Networks

805 East Middle�eld Road

Mountain View, CA 94043

T 650.623.7000

F 650.625.9751

E [email protected]

www.caviumnetworks.com

OCTEON CN30XX MIPS64-Based Secure Communication ProcessorsProduct Brief

CN3010 Block Diagram

FEATURES BENEFITS

TM

CN3005 Block Diagram

64KB Shared

L2 Cache

64KB Shared

L2 Cache

HyperAccessMemory

Controller

Hyper

AccessMemoryController

Coherent Bus

DDR II16 bit wide

I/OBus

Sched/Synch/

Order

Sched/Synch/Order

1

cnMIPS

core

Security

MIPS64 r2Integer

Packet

16K Icache

8K Dcache

2K Write Buffer

Security

MIPS64 r2IntegerMIPS64 r2Integer

Packet

16K Icache

8K Dcache

2K Write Buffer

Packet

Input

PacketInputPacket

Input

PacketInput

PacketOutput

PacketOutput

I/OBridge

I/OBridge

Boot/flashGPIO

2xUART

32-bit,

66MHz

Packet

Interface

Packet

Interface

Misc I/OMisc I/O

RNGRNG

PCIPCI

TCP UnitTCP Unit

2x RGMII/MIIor

1x GMII

USBUSBUSB 2.0

Host w/ PHY

The OCTEON CN30XX family of MIPS64 processors targets intelligent broadband networking, control plane, storage, and wireless applications in next-generation equipment from 100 Mbps to 1Gbps. This family consists of 4 di�erent software-compatible processors, with a cnMIPS64 core and integrated next-generation I/Os including Fast Ethernet, Gigabit Ethernet, TDM/PCM, and USB 2.0, along with the most advancedsecurity, packet processing and QoS features. CN30XX processors are the industry’s �rst products to deliverthe performance of 64-bit computing and integrated L2 cache starting at sub-$20 price points. Supported by industry-standard software toolchains and operating systems, the CN30XX is ideal for 802.11a/b/g/n, VDSL2, PON, triple-play, UTM, SOHO/SMB NAS, and VoIP applications.

OVERVIEW

Multi-Core MIPS64 ProcessorsR

128KB Shared

L2 Cache

128KB Shared

L2 Cache

Hyper

Access

Memory

Controller

Hyper

Access

Memory

Controller

Coherent Bus

DDR II

36 bit wide

I/OBus

Sched/

Synch/

Order

Sched/

Synch/

Order

1

cnMIPS

core

Security

MIPS64 r2Integer

Packet

16K Icache

8K Dcache

2K Write Buffer

Security

MIPS64 r2IntegerMIPS64 r2Integer

Packet

16K Icache

8K Dcache

2K Write Buffer

Packet

Input

Packet

InputPacket

Input

Packet

Input

Packet

Output

Packet

Output

I/O

Bridge

I/O

Bridge

Boot/flash

GPIO2xUART

32-bit,

66MHz

Packet

Interface

Packet

Interface

Misc I/OMisc I/O

RNGRNG

PCIPCI

TCP UnitTCP Unit

3x RGMII/MIIor

1x RGMII/MII +1x GMII

USBUSBUSB 2.0

Host w/ PHY

TDM/PCMTDM/PCMTDM/PCM

CN30XX-PB-1.0 Printed in the USA

525 BGA

• Wired and Wireless Broadband Gateway with security and packet processing

Processor Innovation for Intelligent Networks

805 East Middle�eld Road

Mountain View, CA 94043

T 650.623.7000

F 650.625.9751

E [email protected]

www.caviumnetworks.com

OCTEON 30XX Applications OCTEON Software Support

• Cavium Networks SDK includes: • LINUX support • Cavium Simple Executive for data plane apps • Complete GNU tool-chain, GDB, DDD and viewzilla for tuning • Optimized C libraries for security, regular expression, de/compression processing o�oad • Support for run-to-completion or pipelined software models

• Complete production quality development toolkits for IP, IPsec, SSL, TCP, SSL-VPN available

• Comprehensive Ecosystem support • Popular third party Operating systems and toolchains, including MontaVista Linux, WindRiver VxWorks, ENEA OSE • Broad range of third-party application software vendors, including 6Wind, Intoto, D2 Technologies

• MIPS64/32 support enables thousands of MIPS and other C/C++ applications to be easily ported to OCTEON

*

• Uni�ed Threat Management (UTM) security appliances with Firewall, VPN (IPsec, SSL), IDS, IPS and Anti-virus scanning

• Triple-play voice, video and data wired and wireless gateways

• Integrated management and route processor cards

• Network acceleration cards for security, TCP, content processing, compression

• Switch/router line card and services card control and datapath processing

• Intelligent PCI NIC cards and motherboards

Part Number

400M

1.0G

800M

2.0G

Option

PackageDeviceMemory

I/OPCI

Interfaces

L2

Cache

cnMIPS

cores

1

1DDR2-533

32/36 bit

16bitDDR2-533

32bit/

66MHz

Ethernet

3xRGMII/Mll or

1xRGMll/Mll+1xGMll

TDMUSB

2.0

X

X X

64KB

128KB

SCP CP

CN3005

CN3010

2xRGMII/Mll or

1xGMll350 BGA

Performance

OCTEON CN30xx

Wireless Secure Broadband Gateway with VoIP

CN3005-XXXBG350-

Option Code

Max. Available

Instructions

Per Second

Max.

Available

Compute

Cycles

x x

x xCN3120-XXXBG525-

Option Code

* (Part Number Options):

XXX = Device Speed Grade (300 = 300MHz, 400 = 400MHz, 500 = 500MHz)

Option Code = Device Family (listed below):

EXP

SCP

NSP = Network Services Processor Includes: encryption, reg-ex acceleration, de/compression, networking, TCP acceleration

= Extreme Processor Includes: reg-ex acceleration, de/compression, networking, TCP acceleration

= Secure Communications Processor Includes: encryption, networking, TCP acceleration

2006 Cavium Networks. All Rights reserved. NITROX and OCTEON are trademarks of Cavium Networks. All other brands and product names are trademarks of their respective owners.

CP = Communication Processor Includes: high performance packet processing, TCP acceleration, Queuing, Scheduling and QoS

OCTEON CN30XX MIPS64-Based Secure Communication ProcessorsProduct Brief

TM

Multi-Core MIPS64 ProcessorsR