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Problem Weight Score 1 25 2 25 3 25 4 25 Total...
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EE 200 Midterm Exam 22 October 2013 Last Name (Print): First Name (Print): ID number (Last 4 digits): Section: DO NOT TURN THIS PAGE UNTIL YOU ARE TOLD TO DO SO Problem Weight Score 1 25 2 25 3 25 4 25 Total 100 INSTRUCTIONS 1. You have 2 hours to complete this exam. 2. This is a closed book exam. You may use one 8.5”× 11” note sheet. 3. Calculators are allowed. 4. Solve each part of the problem in the space following the question. If you need more space, continue your solution on the reverse side labeling the page with the question number; for example, Problem 1.2 Continued. NO credit will be given to solutions that do not meet this requirement. 5. DO NOT REMOVE ANY PAGES FROM THIS EXAM. Loose papers will not be accepted and a grade of ZERO will be assigned. 6. The quality of your analysis and evaluation is as important as your answers. Your reasoning must be precise and clear; your complete English sentences should convey what you are doing. To receive credit, you must show your work. 1
Transcript of Problem Weight Score 1 25 2 25 3 25 4 25 Total...
EE 200 Midterm Exam 22 October 2013
Last Name (Print):
First Name (Print):
ID number (Last 4 digits):
Section:
DO NOT TURN THIS PAGE UNTIL YOU ARE TOLD TO DO SO
Problem Weight Score
1 25
2 25
3 25
4 25
Total 100
INSTRUCTIONS
1. You have 2 hours to complete this exam.
2. This is a closed book exam. You may use one 8.5”× 11” note sheet.
3. Calculators are allowed.
4. Solve each part of the problem in the space following the question. If you need more space, continue your solutionon the reverse side labeling the page with the question number; for example, Problem 1.2 Continued. NO
credit will be given to solutions that do not meet this requirement.
5. DO NOT REMOVE ANY PAGES FROM THIS EXAM. Loose papers will not be accepted and agrade of ZERO will be assigned.
6. The quality of your analysis and evaluation is as important as your answers. Your reasoning must be preciseand clear; your complete English sentences should convey what you are doing. To receive credit, you must
show your work.
1
Problem 1: (25 Points)
1. (16 points) Table 1 shows the state diagram for a Moore finite state machine that has two inputs x and y, oneoutput z, and four states. The first three columns assign sates in terms of the D-type flip-flop outputs QAandQB. The notation xy indicates that the input x is in a logic low-state while the input y is in a logic high-state.
Present State Next State Output
Symbol QA QB xy xy xy xy zS0 0 0 S0 S3 S1 S0 0
S1 0 1 S1 S0 S2 S1 1S2 1 0 S2 S1 S3 S2 0
S3 1 1 S3 S2 S0 S3 1
Table 1: State table for a Moore finite state machine.
(a) (8 points) Draw the state diagram corresponding to the state table in Table 1.
2
(b) (8 points) Using the four-variable Karnaugh map in Figure 1, determine the excitation equation for theinput DAto the D-type flip-flop whose output is QA. To receive credit, mark all the minterms with eithera 1 or 0 in the Karnaugh map.
Figure 1: Four-variable Karnaugh map
3
2. (9 points) Consider the logic function
w = F (x, y, z) = Σ(0, 2, 6, 7).
(a) (5 points) Simplify the Boolean function using the tree-variable Karnaugh map in Figure 2. To receivecredit, mark the minterms of F with 1s in the Karnaugh map.
Figure 2: Three-variable Karnaugh map
4
(b) (5 points) Using your simplified expression, realize the logic output w using two-input NAND gates.
5
Problem 2: (25 Points)
1. (10 points) Figure 3 shows the SPICE model for a Multisim component. Draw a schematic representation ofthe component. To receive credit:
• Specify the numeric value of each component.
• Label each node using the designations (1), (2), (3), and (4).
.SUBCKT NonIdealCap 1 4
RR1 1 2 5m
LL1 2 3 5n
CC1 3 4 10p
RR2 3 4 1MEG
.ENDS NonIdealCap
Figure 3: SPICE model for a Multisim component.
6
2. (15 points) Figure 4 shows a schematic representation of non-ideal inductor that accounts for the inductorself-resistance as well as stray capacitance.
Figure 4: Representation of a non-ideal inductor.
(a) (8 points) Determine the impedance Z(ω) looking into the terminals of the non-ideal inductor, and expressyour answer in the standard form
Z(ω) =b1(ω) + b0
(ω)2 + a1(ω) + a0
by expressing the coefficients bi and ai in terms of the components R, L, and C.
7
(b) (7 points) Figure 5 on page 9 shows the magnitude and phase of the impedance Z(ω), in units of Ohmsand degrees, respectively, as a function of frequency in units of rad/sec. Observe that both the magnitudeand frequency axes use logarithmic scales.
i. (2 points) At what frequencies does the impedance looking into the inductor appear purely real? Toreceive partial credit, you must justify your answer using one or two short sentences.
ii. (2 points) What is the real part of the impedance looking into the inductor at the frequencies reportedin part (i)?
iii. (3 points) At a frequency of 108 rad/sec, does the non-ideal inductor behave as an inductor, a resistor,or a capacitor? To receive partial credit, you must justify your answer using one or two short sentences.
8
10−2
100
102
104
106
108
1010
10−1
101
103
105
107
109
1011
|Z| [Ω
]
10−2
100
102
104
106
108
1010
−90
0
90
∠ Z
[deg]
freq [rad/sec]
Figure 5: Impedance magnitude and phase.
9
Problem 3: (25 Points)
1. (8 points) For the LabVIEW block diagram appearing in Figure 6:
• (3 point) Specify if the output indicator displays a scalar, a 1D array, or a 2D array, as well as its datatype, for example, a 32-bit signed integer.
• (5 points) Determine the value(s) displayed by the indicator. If the output is a 1D array, you must expressyour answer as a row or column vector with the correct dimension. If the output is a 2D array, you mustshow the correct number of rows and columns. Show work for partial credit.
Figure 6: Block diagram for Problem 3 Part 1.
10
2. (8 points) For the LabVIEW block diagram appearing in Figure 7:
• (3 point) Specify if the output indicator displays a scalar, a 1D array, or a 2D array, as well as its datatype, for example, a 8-bit unsigned integer.
• (5 points) Determine the value(s) displayed by the indicator. If the output is a 1D array, you must expressyour answer as a row or column vector with the correct dimension. If the output is a 2D array, you mustshow the correct number of rows and columns. Show work for partial credit.
Figure 7: Block diagram for Problem 3 Part 2.
11
3. (9 points) Figure 9 on page 13 shows a LabVIEW finite state machine for measuring voltage and displayingthe result using the myDAQ data acquisition device.
(a) (5 points) Suppose that the myDAQ observes a voltage of 3.146 V. After the subdiagram for the stateDisplay Voltage executes, what string will the indicator labeled output display? Indicate blank spacesbetween letters using the notation in Figure 8.
Figure 8: Notation for indicating blank spaces.
(b) (4 points) If the NI ELVISmx Digital Multimeter VI detects an error, will the user be asked to disconnectthe myDAQ? If not, what is the next case structure subdiagram will execute?
12
Figure 9: Block diagram for Problem 3 Part 3.
13
Problem 4: (25 Points)
1. (15 points) Figure 10 shows the state diagram for a Moore finite state machine with three states S0, S1, andS2, two inputs x and y, and one output z.
Figure 10: State diagram for a Moore finite state machine.
(a) (5 points) Using the state diagram in Figure 10, complete the state table in Table 2. The first two columnsassign sates in terms of the D-type flip-flop outputs QAand QB. The notation xy indicates that the inputx is in a logic low-state while the input y is in a logic high-state. Express the next state in terms of thesymbols Si.
Present State Next State OutputSymbol QA QB xy xy xy xy z
S0 0 0S1 0 1S2 1 0
Table 2: State table for a Moore finite state machine.
(b) (10 points) Using the CUPL state machine syntax, complete the data flow code in Figure 11 for imple-menting the finite-state machine using the ATMEL 750CL programmable logic device.
14
/* *************** INPUT PINS *********************/
PIN 1 = CLK; /* clock input */
PIN 2 = x; /* input x */
PIN 3 = y; /* input y */
/* *************** OUTPUT PINS ********************/
PIN 23 = z; /* output z */
PIN 22 = QA; /* diagnostic output */
PIN 21 = QB; /* diagnostic output */
/* *************** DEFINE STATES FOR FSM **********/
FIELD state_n = [QA,QB];
$define S0
$define S1
$define S2
/* *************** FLIP-FLOP CONTROL SIGNALS ******/
[QA, QB].SP = ’b’0;
[QA, QB].AR = ’b’0;
[QA, QB].OE = ’b’1;
[QA, QB].CK = CLK;
/* *************** IMPLEMENT FSM ******************/
SEQUENCED state_n
/* *************** OUTPUT LOGIC EQUATIONS *********/
Figure 11: WinCUPL code for implementing a Moore finite state machine.
15
2. (10 points) Laboratory 2 provides an analysis of a CMOS NAND gate ring oscillator that generates a square-wave clock signal. A schematic of a ring oscillator appears in Figure 12 on page 17 . A student attempts torealize this circuit using the single layer printed circuit board layout in Figure 13.
(a) (5 points) Is the printed circuit board layout consistent with the circuit diagram in Figure 13? If not,state the differences.
(b) (5 points) Regardless of whether or not the circuit layout is consistent with the circuit diagram, the studentrequests that you critique their layout in Figure 13 with respect to how they routed traces. What changeswould you suggest to the student? To help the student, assign each of your suggestions a number, and inFigure 13, circle the affected region and label the circle with the corresponding suggestion number.
16
Figure 12: Circuit diagram of a CMOS NAND gate ring oscillator.
Figure 13: Realization of the ring oscillator using a single copper layer on top of the printed circuit board.
17
EE 200 Midterm Exam 22 October 2013
Last Name (Print):
First Name (Print):
ID number (Last 4 digits):
Section:
DO NOT TURN THIS PAGE UNTIL YOU ARE TOLD TO DO SO
Problem Weight Score
1 25
2 25
3 25
4 25
Total 100
INSTRUCTIONS
1. You have 2 hours to complete this exam.
2. This is a closed book exam. You may use one 8.5”× 11” note sheet.
3. Calculators are allowed.
4. Solve each part of the problem in the space following the question. If you need more space, continue your solutionon the reverse side labeling the page with the question number; for example, Problem 1.2 Continued. NO
credit will be given to solutions that do not meet this requirement.
5. DO NOT REMOVE ANY PAGES FROM THIS EXAM. Loose papers will not be accepted and agrade of ZERO will be assigned.
6. The quality of your analysis and evaluation is as important as your answers. Your reasoning must be preciseand clear; your complete English sentences should convey what you are doing. To receive credit, you must
show your work.
1
Problem 1: (25 Points)
1. (16 points) Table 1 shows the state diagram for a Moore finite state machine that has two inputs x and y, oneoutput z, and four states. The first three columns assign sates in terms of the D-type flip-flop outputs QAandQB. The notation xy indicates that the input x is in a logic low-state while the input y is in a logic high-state.
Present State Next State Output
Symbol QA QB xy xy xy xy zS0 0 0 S0 S3 S1 S0 0
S1 0 1 S1 S0 S2 S1 1S2 1 0 S2 S1 S3 S2 0
S3 1 1 S3 S2 S0 S3 1
Table 1: State table for a Moore finite state machine.
(a) (8 points) Draw the state diagram corresponding to the state table in Table 1.
2
(b) (8 points) Using the four-variable Karnaugh map in Figure 1, determine the excitation equation for theinput DAto the D-type flip-flop whose output is QA. To receive credit, mark all the minterms with eithera 1 or 0 in the Karnaugh map.
Figure 1: Four-variable Karnaugh map
3
2. (9 points) Consider the logic function
w = F (x, y, z) = Σ(0, 2, 6, 7).
(a) (5 points) Simplify the Boolean function using the tree-variable Karnaugh map in Figure 2. To receivecredit, mark the minterms of F with 1s in the Karnaugh map.
Figure 2: Three-variable Karnaugh map
4
(b) (5 points) Using your simplified expression, realize the logic output w using two-input NAND gates.
5
Problem 2: (25 Points)
1. (10 points) Figure 3 shows the SPICE model for a Multisim component. Draw a schematic representation ofthe component. To receive credit:
• Specify the numeric value of each component.
• Label each node using the designations (1), (2), (3), and (4).
.SUBCKT NonIdealCap 1 4
RR1 1 2 5m
LL1 2 3 5n
CC1 3 4 10p
RR2 3 4 1MEG
.ENDS NonIdealCap
Figure 3: SPICE model for a Multisim component.
6
2. (15 points) Figure 4 shows a schematic representation of non-ideal inductor that accounts for the inductorself-resistance as well as stray capacitance.
Figure 4: Representation of a non-ideal inductor.
(a) (8 points) Determine the impedance Z(ω) looking into the terminals of the non-ideal inductor, and expressyour answer in the standard form
Z(ω) =b1(ω) + b0
(ω)2 + a1(ω) + a0
by expressing the coefficients bi and ai in terms of the components R, L, and C.
7
(b) (7 points) Figure 5 on page 9 shows the magnitude and phase of the impedance Z(ω), in units of Ohmsand degrees, respectively, as a function of frequency in units of rad/sec. Observe that both the magnitudeand frequency axes use logarithmic scales.
i. (2 points) At what frequencies does the impedance looking into the inductor appear purely real? Toreceive partial credit, you must justify your answer using one or two short sentences.
ii. (2 points) What is the real part of the impedance looking into the inductor at the frequencies reportedin part (i)?
iii. (3 points) At a frequency of 108 rad/sec, does the non-ideal inductor behave as an inductor, a resistor,or a capacitor? To receive partial credit, you must justify your answer using one or two short sentences.
8
10−2
100
102
104
106
108
1010
10−1
101
103
105
107
109
1011
|Z| [Ω
]
10−2
100
102
104
106
108
1010
−90
0
90
∠ Z
[deg]
freq [rad/sec]
Figure 5: Impedance magnitude and phase.
9
Problem 3: (25 Points)
1. (8 points) For the LabVIEW block diagram appearing in Figure 6:
• (3 point) Specify if the output indicator displays a scalar, a 1D array, or a 2D array, as well as its datatype, for example, a 32-bit signed integer.
• (5 points) Determine the value(s) displayed by the indicator. If the output is a 1D array, you must expressyour answer as a row or column vector with the correct dimension. If the output is a 2D array, you mustshow the correct number of rows and columns. Show work for partial credit.
Figure 6: Block diagram for Problem 3 Part 1.
10
2. (8 points) For the LabVIEW block diagram appearing in Figure 7:
• (3 point) Specify if the output indicator displays a scalar, a 1D array, or a 2D array, as well as its datatype, for example, a 8-bit unsigned integer.
• (5 points) Determine the value(s) displayed by the indicator. If the output is a 1D array, you must expressyour answer as a row or column vector with the correct dimension. If the output is a 2D array, you mustshow the correct number of rows and columns. Show work for partial credit.
Figure 7: Block diagram for Problem 3 Part 2.
11
3. (9 points) Figure 9 on page 13 shows a LabVIEW finite state machine for measuring voltage and displayingthe result using the myDAQ data acquisition device.
(a) (5 points) Suppose that the myDAQ observes a voltage of 3.146 V. After the subdiagram for the stateDisplay Voltage executes, what string will the indicator labeled output display? Indicate blank spacesbetween letters using the notation in Figure 8.
Figure 8: Notation for indicating blank spaces.
(b) (4 points) If the NI ELVISmx Digital Multimeter VI detects an error, will the user be asked to disconnectthe myDAQ? If not, what is the next case structure subdiagram will execute?
12
Figure 9: Block diagram for Problem 3 Part 3.
13
Problem 4: (25 Points)
1. (15 points) Figure 10 shows the state diagram for a Moore finite state machine with three states S0, S1, andS2, two inputs x and y, and one output z.
Figure 10: State diagram for a Moore finite state machine.
(a) (5 points) Using the state diagram in Figure 10, complete the state table in Table 2. The first two columnsassign sates in terms of the D-type flip-flop outputs QAand QB. The notation xy indicates that the inputx is in a logic low-state while the input y is in a logic high-state. Express the next state in terms of thesymbols Si.
Present State Next State OutputSymbol QA QB xy xy xy xy z
S0 0 0S1 0 1S2 1 0
Table 2: State table for a Moore finite state machine.
(b) (10 points) Using the CUPL state machine syntax, complete the data flow code in Figure 11 for imple-menting the finite-state machine using the ATMEL 750CL programmable logic device.
14
/* *************** INPUT PINS *********************/
PIN 1 = CLK; /* clock input */
PIN 2 = x; /* input x */
PIN 3 = y; /* input y */
/* *************** OUTPUT PINS ********************/
PIN 23 = z; /* output z */
PIN 22 = QA; /* diagnostic output */
PIN 21 = QB; /* diagnostic output */
/* *************** DEFINE STATES FOR FSM **********/
FIELD state_n = [QA,QB];
$define S0
$define S1
$define S2
/* *************** FLIP-FLOP CONTROL SIGNALS ******/
[QA, QB].SP = ’b’0;
[QA, QB].AR = ’b’0;
[QA, QB].OE = ’b’1;
[QA, QB].CK = CLK;
/* *************** IMPLEMENT FSM ******************/
SEQUENCED state_n
/* *************** OUTPUT LOGIC EQUATIONS *********/
Figure 11: WinCUPL code for implementing a Moore finite state machine.
15
2. (10 points) Laboratory 2 provides an analysis of a CMOS NAND gate ring oscillator that generates a square-wave clock signal. A schematic of a ring oscillator appears in Figure 12 on page 17 . A student attempts torealize this circuit using the single layer printed circuit board layout in Figure 13.
(a) (5 points) Is the printed circuit board layout consistent with the circuit diagram in Figure 13? If not,state the differences.
(b) (5 points) Regardless of whether or not the circuit layout is consistent with the circuit diagram, the studentrequests that you critique their layout in Figure 13 with respect to how they routed traces. What changeswould you suggest to the student? To help the student, assign each of your suggestions a number, and inFigure 13, circle the affected region and label the circle with the corresponding suggestion number.
16
Figure 12: Circuit diagram of a CMOS NAND gate ring oscillator.
Figure 13: Realization of the ring oscillator using a single copper layer on top of the printed circuit board.
17
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