Fabrication

PRESENTATION ONFABRICATION PROCESSESFABRICATION PROCESSESPresentation on FABRICATION PROCESSES

Presented by Shahadat Hussain Parvez (2010338004)Jubair Hossain Jitu (2010338006)Rezwan Matin (2010338015)Gurucharan Mahato (2010338037)Course no : EEE 453Course by : Mohiuddin MunnaBefore Starting the Fabrication

It starts with making siliconBefore Starting the FabricationIngots get cut into wafers, which are 1-2mm thick, and upto 12 in diameterEntire wafers are processed, and then cut into chips when needed

Fabrication ProcessesSix main process steps

OxidationDiffusionIon implantationLithographyThin film depositionEpitaxyOxidationthe first step in semiconductor device fabrication involves the oxidation of the wafer surface in order to grow a thin layer of silicon dioxide (SiO2). This oxide is used to provide insulating and barrier to diffusion layers.

The most common method of oxidation is thermal, and can be classified as either "dry" or "wet" oxidation. Wafers are loaded into quartz boats and slid into a furnace heated to approximately 1200C.

OxidationIn dry oxidation, thin oxide layers are grown in an environment containing oxygen and hydrogen chloride near atmospheric pressure

OxidationThicker oxide layers require higher pressures and the use of steam (wet oxidation). Wet oxidation is performed by exposing the wafer to a mixture of oxygen and hydrogen in the furnace chamber. Water vapor is formed when the hydrogen and oxygen react

Oxidation Process (Schematic)

Oxidation ProcessStandard oxidation temperature 800-1200 CHeat is produced by resistance heatingCoil like heating elements are arranged in 3 controlled zone Outer zones operates at higher power to compensate heat lossSimply Oxygen is fed for dry oxidationCarrier gas like Ar on N2 is used in wet oxidation along with heated water or burning O2 and H2 at input of tubeRequired time in furnace depends on temperature and desired thicknessWhole system is automated Oxidation Process

Fig: Typical Thickness Vs Oxidation time for 100 crystal compared for dry and wet oxidationDiffusion processProcess of doping Si wafer is exposed to solid, liquid or gaseous source containing desired impurityA reaction at wafer surface establishes a supply of dopant atoms immediately adjacent to Si crystalAt elevated temperature atoms difuse in the region Si is not protected by oxideSurface doping concentration is up to 1021 / cm3Diffusion in SiO2 is relatively lowSiO2 protects Si for a limited time depending on oxide thickness ,temperature and background doping.

Diffusion process

Diffusion process (Schematic)

Ion ImplantationIts an alternative process of introducing dopantsDopant ion is accelerated in high energy range from 5 keV to 1MeV then shooted into semiconductorIons displace Si atoms along their path into crystalfollow-up heating binds ions with crystel But before that automatic scanning is performed automatically to determine total number of ions / cm3Si wafer can be masked using thin flims of SiO2 ,Si3N4 and photoresist .

Ion Implantation (schematic)

Advantage of Ion ImplantationLower temperature processImplantation is performed in room temperature Follow-up heating is done in 600 CGives precise control over impurityIdeally suited for a number of modern device structures requiring extremely shallow junctionsdamage from implantation can be annealed by heating the wafer in a furnace to T > 900 C.

Doping by Ion ImplantationDose = ion beam ux (# cm-2 s-1) x time for implant ... units # cm-2

Doping by Ion ImplantationSiO2 lm masks the implant by preventing ions from reaching the underlying silicon (assuming its thick enough)after implantation, the phosphorus ions are conned to a damaged region near the silicon surface

Doping by Ion ImplantationAnnealing heals damage and also redistributes the ions (they diffuse further into the silicon crystal)

Doping by Ion Implantation

Fig: Computed phosphorus Implantation profile assuming a constant dose of 1014 /cmLithography Process of selectively removing SiO2 and other masking material covering wafer surface. Transfers circuit diagram on wafer

Lithography Process At first Si wafer is coated with UV light sensitive photoresist in a thin uniform coating.Wafer is pre baked at 80-100 CExposing wafer to UV light through a maskMask here is carefully prepared with glass or quartz photo pale containing a copy of pattern to be transferred to SiO2 Exposed photoresist parts undergo chemical changes depending on photo resistIn negative photo resist exposed parts form polymer like structures and unexposed parts dissolves after developing

Lithography

Fig: majos steps in lithographyApply resistExpose resist through maskAfter developingAfter oxide etching and resist removal

Thin Film depositionThree different Techniques

EvaporationSputteringChemical Vapor depositionThin Film deposition(Evaporation)

Thin Film deposition(Sputtering)

Chemical Vapor Deposition(CVD)

1.Atmospheric Pressure CVD2.Low Pressure CVD3.Plasma Enhanced CVDEpitaxyEpitaxy is a special type of thin layer deposition.

Whereas deposition described in the previous yields either amorphous or polycrystalline layer, it yield a crystalline layerEND