Prague, Marcel Trimpl, Bonn University DEPFET-Readout Concept for TESLA based on Current Mode Signal Processing Markus Schumacher on behalf of Marcel Trimpl Bonn University ECFA/DESY - WorkshopPrague, November 2002 Bonn University / MPI Munich (HLL) L.Andricek, G.Lutz, P.Lechner, R.H.Richter, L.Strder, J.Treis, P.Fischer, I.Peric, M.Schumacher, M.Trimpl, J.Ulrici, N.Wermes Prague, Marcel Trimpl, Bonn University DEPFET-Performance single-pixel spectra: ENC = 4.8 +/- 0.1 e K low power consumption (< 1W for whole TESLA vtx-sensor) (row-wise operation) spatial resolution: ~ 9m (with 50x50 m 2 pixel) ~ 3.2 mm Matrix-picture with 55 Fe: [J.Ulrici, Bonn] fast and low noise readout needed !! excellent energy resolution (low noise needed for thinned detector) thinnable (50m proposed for TESLA) small pixelsize possible (25x25m 2 ) good spatial resolution (charge sharing) Prague, Marcel Trimpl, Bonn University Overview: Vertexdetector LayerModulsizeModuls I13 x 100 mm1 x 8 II22 x 125 mm2 x 8 III22 x 125 mm2 x 12 IV22 x 125 mm2 x 16 V22 x 125 mm2 x 20 Total 500 MPixel (with 25x25 m pixels) (read out in 40 s) Options: CCD MAPS HAPS DEPFET Prague, Marcel Trimpl, Bonn University Proposed concept for TESLA thin detector-area down to 50m frame for mechanical stability carries readout- and steering-chips first thinned samples: [L.Andricek, MPI Munich] matrix is read out row-wise Prague, Marcel Trimpl, Bonn University continue with next row... Collected charge in internal gate ~ (Difference of both currents) Reset one row and measure pedestal currents Select one row via external Gates and measure Pedestal + Signal current Matrixoperation Readout-scheme:Matrix-scheme: Advantages of readout: pedestals need not to be stored 1/f noise is reduced (CDS) But: complete reset (clear) needed Prague, Marcel Trimpl, Bonn University Readout Architecture V1.0 Regulated Cascode keeps drain potential constant (Signal+Pedestal) are stored in fast current memory cell (20ns, inverting) Pedestal-Current after Reset is subtracted automatically Hit-Identification with fast current comparator Hit-Information + analog value are stored in mixed-signal FIFO FIFO is emptied row by row Fast digital scanner identifies hits in a row (up to 2 hits per cycle) and multiplexes the corresponding analog currents to the outputs (no external trigger) DEPFET provides current + fast readout needed current readout Prague, Marcel Trimpl, Bonn University First prototype-chip TSMC 0.25 m process with radiation-tolerant layout contains all basic parts of proposed design (various memory-cells, fast hit-finder, current comparator structures) 1.5mm 4 mm Prague, Marcel Trimpl, Bonn University Testsetup for Memory Cells Memory Cell steering U2I I2U U2I ADC input I2U Prague, Marcel Trimpl, Bonn University Linearity of current-memory-cell 0.1% accurancy 25MHz !! dynamic range depends on bias-current of memory cell (range vs. power) (10A for DEPFET-readout needed) 2 memory cells with regulated cascode input (like in readout architecture ) Prague, Marcel Trimpl, Bonn University noise performance low noise expected (< 30 electrons) difficult to measure with simple testsetup cascade of sampling stages on chip corresponds to calculation !! Prague, Marcel Trimpl, Bonn University Summary of performance analog part (memory cell): speed: 25MHz accurancy : 0.1 % noise : < 30 electrons digital part: fast hit-finder and current-comparator-block work with desired speed (50MHz) Prague, Marcel Trimpl, Bonn University next step.... full 128 channel readout-chip working with DEPFET-Matrix at 50MHz Internal ADC optional Timing at TESLA : 1ms Trainbunch 200ms Trainpause Hits are stored in RAM during train and read out in pause TESLA prototype-system: Prague, Marcel Trimpl, Bonn University Summary / Outlook Fast current mode readout for DEPFET-Pixel presented First prototype-chip shows encouraging results (25MHz, 0.1% accurancy, < 30 e - noise) Speed has to be improved : 50MHz possible with next generation TESLA-prototype-system with DEPFET-Matrix expected within 2003