Ppt on Micro - Copy

8/9/2019 Ppt on Micro - Copy

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S U B M I T T E D B Y:

R A C H I T S H A R M A

E I / 0 8 / 8 5 3 2



The embedded system is a combination of

computer hardware, software additional

electrical & mechanical parts

A computer is used in such devices primarily asa means to simplify the system design and to

provide flexibility.

Embedded systems employ the use of aRTOS

(Real-Time Operating System).

INTRODUCTION TO

EMBEDDED SYSTEM



Consumer electronics

Telecommunication

Automobile

Medical instrumentation

Industrial control equipment

Defense

Communication satellite

Data communication

Internet appliances

APPLICATONS OF

EMBEDDED SYSTEMS



A microcontroller is a computer-on-a-chip.

Micro suggests that the device is small, and

controller tells you that the device might be

used to control objects, processes, or events.

Another term to describe a microcontroller is

embedded controller, because the

microcontroller and its support circuits areoften built into, or embedded in, the devices

they control.

INTRODUCTION

TO MICROCONTROLLER



Complete, highly-integrated microcomputer

± CPU, RAM, ROM, IO

Port 0 ± 8-bit bidirectional I/O port OR

± multiplexed low-order address and data bus bytes

Port 1

± 8-bit bidirectional I/O port

Port 2 ±

8-bit bidirectional I/O port OR ± high-order address byte

Port 3

± 8-bit bidirectional I/O port OR

± various special-function signals

8051

MICROCONTROLLER



8051 MICROCONTROLLER

Interface Signals

PO/AD[7-0]

P1

P2 / A[15-8]

P3.2 /INT0*

P3.3 /INT1*

P3.4 / T0P3.5 / T1

P3.6 / WR *P3.7 / RD*

WriteRead

Timer 1Timer 0

Interrupt 1

Interrupt 0

Port 0 or Lo Addr/Data

Port 1

Port 2 or Hi Addr

Port 3/Special Functions:

8

8

8

P3.0 /RXDP3.1 /TXD

Serial Input PortSerial Output Port

PSENALE /PROG*Addr Latch Ena/Pr ogram

Pr ogram Store Enable[Bus Timing]

[Int]

[I/O]



8 bit CPU with registers A and B

16 bit pr ogram counter(PC) and data pointer(DPTR)

8 bit pr ogram status word(PSW)

8 bit stack pointer

Internal ROM of 0(8031) to 4K (8051)

Internal R AM of 128 Bytes

4 register banks 00-1f

16 bytes(bit addressable) 20-2f

80 bytes of general purpose data memory 30-7f

32I/O pins arranged as f

our 8 bit p

orts (

P0 ±

P3)

2 16-bit timer/counters: T0 and T1

Full duplex serial data receiver/transmitter: SBUF

Contr ol registers: TCON, TMOD, SCON, PCON, IP and IE

2 external and 3 internal interrupt sources

Oscillator and clock circuits

8051 ARCHITECTURE



INTERNAL R AM



Accumulator

´Rµ registers

B register Data Pointer (DPTR) ² 16-bit

register

Program Counter (PC) ² 16-bitregister

Stack Pointer (SP)

BASIC REGISTERS



Simply stated, the MOV instruction co pies data fr om one

location to another .

It has the f ollowing f ormat

MOV destination, source This instruction tells the CPU to move (co py) the source o perand

to the destination o perand, without changing the content of the

source o perand.

Examples:

MOV A,#55h ; load 55h into register A MOV R0,A ; copy contents of A into R0

MOV R3, #95h ; load value 95h into R3

MOV A,R3 ;copy content of R3 into A

MOV INSTRUCTION



TheADD instruction has the f ollowing

f ormat:

ADD A, source ; Add the sourceo perand to A

This tells the CPU to add the source

byte to regA and put the result in reg A

ADD INSTRUCTION



An "addressing mode" refers to how you areaddressing a given memory location.

In summary, the addressing modes are as follows, withan example of each:

Immediate Addressing MOV A,#20h

Direct Addressing MOV A,30h

Indirect Addressing MOV A,@R0

External Direct MOVX A,@DPTR

Code Indirect MOVC A,@A+DPTR

Each of these addressing modes provides importantflexibility.

ADDRESSING MODES



Immediate addressing is so-named because the valueto be stored in memory immediately follows theoperation code in memory. That is to say, theinstruction itself dictates what value will be stored in

memory.MOV A,#20h

This instruction uses Immediate Addressing because theAccumulator will be loaded with the value thatimmediately follows; in this case 20 (hexadecimal).

Immediate addressing is very fast since the value tobe loaded is included in the instruction. However, sincethe value to be loaded is fixed at compile-time it isnot very flexible.

IMMEDIATE ADDRESSING



Direct addressing is so-named because the value to be stored inmemory is obtained by directly retrieving it from another memorylocation. For example:

MOV A,30h

This instruction will read the data out of Internal RAM address 30(hexadecimal) and store it in the Accumulator.

Direct addressing is generally fast since, although the value to beloaded isn't included in the instruction, it is quickly accessible sinceit is stored in the 8051s Internal RAM.

It is also much more flexible than Immediate Addressing since thevalue to be loaded is whatever is found at the given address--

which may be variable. Also, it is important to note that when using direct addressing any

instruction which refers to an address between 00h and 7Fh isreferring to Internal Memory. Any instruction which refers to anaddress between 80h and FFh is referring to the SFR controlregisters that control the 8051 microcontroller itself.

DIRECT ADDRESSING



Indirect addressing is a very powerfuladdressing mode which in many casesprovides an exceptional level of flexibility.

MOV A,@R0

This instruction causes the 8051 to analyze thevalue of the R0 register. The 8051 will thenload the accumulator with the value fromInternal RAM which is found at the address

indicated by R0. Indirect addressing always refers to Internal

RAM; it never refers to an SFR.

INDIRECT

A

DDRESSING



External memory can also be accessed using a form ofindirect addressing.

This form of addressing is usually only used inrelatively small projects that have a very small amount

of external RAM. An example of this addressing modeis:

MOVX @R0,A

Once again, the value of R0 is first read and the value

of the Accumulator is written to that address inExternal RAM. Since the value of @R0 can only be00h through FFh the project would effectively belimited to 256 bytes of External RAM.

EXTERNAL INDIRECT

ADDRESSING



Consists of a series of assembly

language instructions.

Instruction consists of four fields:[label1:] mnemonic [operands]

[;comment]

Label field allows the program to referto a line by name.

Comment field must begin with a

semicolon

STRUCTURE OF

ASSEMBLY LA NGUAGE



The DB directive is the most widely used data directivein assembler.

Used to define the 8-bit data.

When DB is used, the numbers can be decimal, binary,

hex or ASCII formats. The only directive that can be used to define ASCII

strings larger than two characters.

ORG 500H

DATA1: DB 39HDATA2: DB ´2591µ ;ASCII NUMBERS

ORG 518H

DATA3: DB ́Computer Engineeringµ

DB



ORG: Used to indicate the beginning

of the address.

EQU

:U

sed to define a constantwithout occupying a memory

location.

e.g. Count

EQU 25

END: Indicates the end of the source

file.

ASSEMBLER DIRECTIVES



Addresses D0h, Bit-Addressable

The Program Status Word is used to store a number of importantbits that are set and cleared by 8051 instructions.

The PSW SFR contains the carry flag, the auxiliary carry flag,the overflow flag, and the parity flag.

Additionally, the PSW register contains the register bank selectflags which are used to select which of the "R" register banks

are currently selected.

PSW

(Pr ogram Status Word)



Section of RAM used by the CPU to

store information temporarily.

Information can be data or anaddress.

The CPU needs this storage area

since there are only a limitednumber of registers.

STACK S



The register used to access the stack is called the SP (stack pointer) and is 8-bits wide (00h-ffh).

When the 8051 is powered up the SP contains thevalue 07.

± This means that RAM location 08 is the first locationused for the stack.

± Final location is 1F (20h -> used for bit-addressable memory)

Storing of a CPU register in the stack is called aPUSH.

Loading the contents of the stack back into a CPU register is called a POP.

ACCESSING STACK S



Ram locations 08 ² 1F used for thestack.

If more than 24 bytes of stackrequired, then the SP must be changedto point to RAM locations 30h-7Fhusing the instruction

MOV SP,#xx Also may need to shift SP if a given

program needs register bank1,2 or 3.

UPPER LIMIT



When an 8051 is first initialized, it resets the PC to0000h.

The 8051 then begins to execute instructionssequentially in memory unless a program instruction

causes the PC to be otherwise altered. There are various instructions that can modify the

value of the PC; specifically, conditional branchinginstructions, direct jumps and calls, and "returns" fromsubroutines.

Additionally, interrupts, when enabled, can cause theprogram flow to deviate from its otherwise sequentialscheme.

PROGR AM FLOW



Repeating a sequence of instructions a certainnumber of times is called a loop.

The loop action is performed by the instruction

DJNZ

reg,label In this instruction, the register is decremented;

if it is not zero, it jumps to the target addressreferred to by the label.

Prior to the start of the loop the register is

loaded with the counter for the number ofrepetitions.

LOOP & JUMP

INSTRUCTIONS



All conditional jumps are short jumps,

meaning that the address of the target

must be within -128 and +127 bytes of

the contents of the program counter (PC).

Unconditional jump instructions are:

± LJMP (Long jump) ² 3 byte instruction

±SJMP (Short jump) ² 2 byte instruction

UNCONDITIONAL JUMP INSTRUCTIONS



CALL instruction is used to call a subroutine

LCALL (long call) ² 3 byte instruction

ACALL (absolute call) ² 2 byte instruction

± When a subroutine is called, control is

transferred to that subroutine.

± After finishing execution of the subroutine,

the instruction RET (return) transfers controlback to the caller.

CALL

INSTRUCTIONS



A delay subroutine consists of two parts:

(a) setting a counter

(b) a loop

Most of the time delay is performed by the body ofthe loop.

Very often we calculate the time delay based on theinstructions inside the loop and ignore the clock cyclesassociated with the instructions outside the loop.

Largest value of a register can hold is 255;

therefore, one way to increase the delay is to use theNOP command.

NOP, which stands for ´No Operationµ simply wastestime.

DELAY CALCULATION



This project is designed to demonstrate the

technology used in the now a day·s driver less

metro train.

These trains are equipped with the CPU, whichcontrols the train.

The train is programmed for the specific path.

Every station on the path is defined; stoppagetiming of the train and distance between the

two stations is predefined.

INTRODUCTION TO

METRO TR AIN PROTOTYPE

USING 8051



The motion of the train is controlled by the stepper

motor.

For displaying message in the train we use intelligent

LC

D display of two lines. Before stopping at station the train blows the buzzer.

It also includes an emergency brake system due to

which the train stops as soon as the brakes are

applied and resumes journey when the emergency

situation is over.

This project is implemented using the VPL-ET kit.

METRO TR AIN PROTOTYPE

USING 8051

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