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iii
Power Management ICs:
A Top-Down Design Approach
Short Course Slides
1st Edition
By
Gabriel Alfonso Rincón-Mora, Ph.D.
Analog & Power IC Design Research Laboratory School of Electrical and Computer Engineering
Georgia Institute of Technology
http://www.rincon-mora.com
Copyright © 2005 by Gabriel Alfonso Rincón-Mora
vii
Table of Contents
About the Material ix
Intended Audience Objectives Motivation
About the Author xi 4-Day Daily Course Schedule xiii 1. The System 2
Market Demand Requirements Basic Components Design Approaches Brief Circuit Design & Feedback Review The Future System Design for this Course
2. Choosing a DC-DC Converter 17
Topologies Power Feedback Control Summary Converter Topology and Features for this Course
3. Designing the Converter 59
Introduction Review Accuracy Transient Response Current Sensing Frequency Features Integrated Circuit (IC) PCB Summary Converter Design for this Course
4. Designing the Linear Regulator 105
Introduction Operation Specifications AC Design
viii
IC Design Summary LDO Design for this Course
5. Designing the Reference 151
Introduction References Error Sources The Output Characterization Summary BG Design for this Course
6. Designing the Battery Charger 192
Introduction Stability Efficiency Summary Charger Design for this Course
7. Designing the PA Supply 201
The Problem Boosting Efficiency Adaptive PA Supply Summary PA Supply Design for this Course
8. The Future, revisited… 220
The System, revisited… Energy Management Integration Summary Final Words
ix
About the Material
I. Intended Audience
Integrated Circuit (IC) Design, System Design, Product, and Market Engineers, managers, and analog graduate students engaged and/or interested in expanding their knowledge on how to design, evaluate, specify, develop, and test integrated power management circuits and systems. II. Objectives
This short-course introduces and discusses the emergence of high performance power management integrated circuits (ICs) into the marketplace while highlighting state-of-the-art design techniques, considerations, constraints, and practical realizations, from the system down to their solid-state realizations, adopting a top-down design approach, much like in an industry setting but mixed with an educational component. The course starts with the system and its performance requirements, given demand trends, environmental and loading constraints, and technological roadmaps, especially within the context of portable, wireless applications, which establishes the course’s system design example. These requirements are then gauged against existing DC-DC converter topologies, highlighting key issues and identifying a suitable topology to pursue for the foregoing design example. This discussion then leads into the design of the power supply itself, from its block-level development down to its implied integrated circuit. Linear regulators, voltage references, and adaptive power supply circuits for power amplifier (PA) applications are then discussed in the same light, complementing and completing the power supply system. The circuit design places emphasis on low voltage, low quiescent current, high power efficiency, and reliability, not to mention integration, which fall within the boundaries of next generation ICs. Supportive, state-of-the-art research is included and evaluated throughout the course. III. Motivation
Supplying power is the most fundamental and intrinsic function of any electrical system, be it analog, digital, or mixed-signal in nature. Voltage regulators provide such a function, to convert unpredictable and noisy supplies to stable, constant, accurate, and load-independent voltages. The input supplies are derived, for the most part, from batteries, generators, and other off-line ac or dc sources, which usually exhibit significant voltage variations. Most integrated circuits (ICs), in particular, draw power from already available dc supplies, like batteries, ac-dc converters, or dc-dc converters. The load, on the other hand, is composed of state-of-the-art microprocessors, digital-signal processing (DSP) circuits, and custom power-intensive applications, to name a few, which demand these power supplies to be quick, accurate, and capable of delivering high currents. Additionally,
x
portable battery-powered applications like laptop computers, cellular phones, and palm pilots require high power efficiency to maximally extend battery life. Portable electronics also demand these power regulators to be integrated onto one die, with other circuits, like power amplifiers and the like, which present additional challenges, forcing designers to be knowledgeable in both system and integrated circuit design issues.
xi
About the Author
Prof. Gabriel A. Rincón-Mora, Ph.D. Dr. Rincón-Mora received his B.S.E.E. from Florida International
University (High Honors) in 1992 and M.S.E.E. and Ph.D. from Georgia Tech (Outstanding Ph.D. Graduate) in 1994 and 1996, respectively. He worked for Texas Instruments from 1994 to 2003, as Senior Integrated Circuits Designer, Design Team Leader, and Member of Group Technical Staff, and from 2003 to 2005 as technical consultant. His work at TI led to the release of over 26 IC products in the field of integrated power management circuits in applications like cellular phones, pagers, laptop and desktop computers, etc. In 1999, he was appointed Adjunct Professor for Georgia Tech and in 2001 he became a full-time faculty member of the School of Electrical and Computer Engineering at Georgia Tech. From 2002 to 2004, he was the Director of the Georgia Tech Analog Consortium. In April of 2005, he founded and is now the administrator of the Analog Undergraduate Outreach Program. He was the Vice-Chairman for the Atlanta IEEE Solid-State Circuit Society-Circuits and Systems (SSCS-CAS) Chapter for 2004 and is currently its Chairman.
Dr. Rincón-Mora is the inventor of 25 Patents and the author of over 65
publications. He has authored three books, one of which is a textbook titled Voltage References – From Diodes to Precision High-Order Bandgap Circuits. He received the "National Hispanic in Technology Award" from the Society of Professional Hispanic Engineers, the "Charles E. Perry Visionary Award" from Florida International University, and a “Commendation Certificate” from the Lieutenant Governor of California. He was inducted into the "Council of Outstanding Young Engineering Alumni" by Georgia Tech and featured on the cover of Hispanic Business Magazine as one of “The 100 Most Influential Hispanics,” La Fuente (Dallas Morning News publication), and three times on Nuevo Impacto (Atlanta-based magazine). Dr. Rincón-Mora is a Senior Member of IEEE and a life member of the Society of Hispanic Professional Engineers.
xiii
4-Day Daily Course Schedule
First Morning Session (1.25 hrs) 9:00 a.m. 10:15 a.m.
Morning Break (15 min.) 10:15 a.m. 10:30 a.m.
Second Morning Session (1.25 hrs) 10:30 a.m. 11:45 a.m.
Lunch (1.30 hrs) 11:45 a.m. 1:15 p.m.
First Afternoon Session (1 hrs) 1:15 p.m. 2:15 p.m.
First Afternoon Break (10 min.) 2:15 p.m. 2:25 p.m.
Second Afternoon Session (1 hr) 2:25 p.m. 3:25 p.m.
Second Afternoon Break (10 min.) 3:25 p.m. 3:35 p.m.
Third Afternoon Session (1 hr) 3:35 p.m. 4:35 p.m.
Total Hours per Day: 5.5 hrs.
Last day will not include the last two afternoon sessions.
Total Hours for 4 Days: 20 hrs.
Power Management IC Power Management IC –– A TopA Top--Down Design ApproachDown Design Approach
© by G.A. Rincón-Mora Page Page 1616
Slide 31
Design for this Course…
The System
Slide 32
The System – Sample System DesignPower Management for Mobile Apps.
Specifications:
1. High Accuracy
(Fast & Accurate)
2. High Power
Efficiency (long
battery life)
3. Low Voltage Ckts
4. Maximum Die
Integration
Features: Distributed POL Supplies
Dynamically Adaptive
Battery-Operated
Dynamically, AdaptiveDC/DC Buck Converter
LinearReg.
LinearReg.
LinearReg.
Reference
Li-I
onB
atte
ry
tt
t
Dynamically, AdaptiveDC/DC Buck Converter
PA
t
Bat
tery
Cha
rger
Power Management IC Power Management IC –– A TopA Top--Down Design ApproachDown Design Approach
© by G.A. Rincón-Mora Page Page 3434
Slide 67
Choosing a DC-DC Converter - Feedback
LC21
ooπ
EA’s BW = ↑
PWM’s BW = ↑
P(CB) = ↑
P(Rfb1,2) = ↑
Stability: 2 Ps @ & 1 Z @ CR21
oESRπ
UGF << τ-1, for PWM’s t-ave model to work
VrefVout
Vin
I Load
PWMFilter
Co
RESR
Lo
BWamp
Vfb
BWPWMffb
CB
Rfb1,2
V
[dB
]fb
freq [Hz]
Buck Converter Stability:
Slide 68
Choosing a DC-DC Converter - Feedback
LC21
effoπ* Complex Conj. pair @ , Z @ , & ↑ freq. P @
Boost Converter Stability:
* VIN = ↓ Z point
Inductor’s energy is only transferred during toff (toff = [1-d]τ)
What value L would have delivered toff fraction of IL?
PInductor = IL2LS ≡ (Idelivered)2LeffS = (IL [1-d])2LeffS Leff = L/(1-d)2 = L(toff/τ)2
During toff, circuit looks like a buck converter with Leff
CR21
oESRπ CR21
BESRπ
Co
RESR
Lo CBvout
VIN
ton/off Co
Leff CB
Co
vout
RESR
* ac w/in L eff
toff
Power Management IC Power Management IC –– A TopA Top--Down Design ApproachDown Design Approach
© by G.A. Rincón-Mora Page Page 9090
Slide 179
Designing the Converter
IC
Slide 180
Designing the Converter – ICHysteretic Comparator: Inverting Schmitt Trigger
RRRVRVVR
RRVVV
21
2ref1ddref1
21
refddfb +
+=+
+−
=+
RRRVRVVR
RRVVV
21
1ss2refss2
21
ssreffb +
+=+
+−
=−
Vhys = Vfb+ - Vfb- = (Vdd - Vss) R1 / (R1 + R2)
→ Vref-eff & Vhys = f(Vdd, Vss) ∴ Accuracy = f(supplies)
IC: Vref = I-loaded → reference must supply current
Vripple = sensitive to noise in Vdd & Vss
Vripple ≠ easily programmable
Vref
Vfb
Vdd
Vss
Vcmp-out
R1 R2
Power Management IC Power Management IC –– A TopA Top--Down Design ApproachDown Design Approach
© by G.A. Rincón-Mora Page Page 136136
Slide 271
Genres: Externally Compensated
Designing the Linear Reg. – IC
mp12mp11
mn13
min1
mtailmnb13
min2
mn21
mnb21
mpo
R1
R2
Vreference
I Loa
d
CB
Co
RES
R
Vout
(0-1
00m
A)
* ppout = dominant
ppar = 2nd dominant (@ UGF)
pbuf = 3rd dominant (UGF + dec.)
zESR_high w/in -1 decade of UGF
zESR_low @ UGF
pothers > UGF + 1 decade
Notes:
* Cout > a specified value higher power regulators.
* Cout moderate-large bulk capacitor ↑ or ↓ ESR (↑ or ↓ RC)
* Normally, ∆Vtran_ext. < ∆Vtran_int (Co_ext > Co_int)
Slide 272
Designing the Linear Reg. – ICGenres: Self Referenced
* Reference = integrated into the regulating loop.
Temperature Compensation = VPTAT + Vbe
(VPTAT ↑ & Vbe ↓ w/ increasing temp.)
Vout = VPTAT + Vbe = IPTATR2 + Vbe(R1 + R2)/R1
NMOS, R2, & NPN Negative feedback loop
dominant pole @ gate of NMOS C.
* For low voltage, NMOS should be natural (↓ VT device)
* Vref > typical Vbg (≈ 1.2 V) because Vbe component = ↑.
* Trim IPTAT.
* Topology = simple.
Vout
R1
R2
IPTAT
Power Management IC Power Management IC –– A TopA Top--Down Design ApproachDown Design Approach
© by G.A. Rincón-Mora Page Page 151151
Slide 301
Designing the Reference
Power Management ICs -A Top-Down Design Approach
Slide 302
Designing the Voltage Reference – Outline
The Output
Error Sources
References
Introduction
Summary
BG Design for this Course
Characterization
Power Management IC Power Management IC –– A TopA Top--Down Design ApproachDown Design Approach
© by G.A. Rincón-Mora Page Page 194194
Slide 387
Designing the Battery Charger: Intro…Requirements:Accurate VTarget (Max. Capacity)
Stable ThroughoutSmooth TransitionsHigh Efficiency (No Heat Sinks &
Less Energy Wasted when Charging from another Battery(E.g.: Charge phone w/ laptop’s USB port)
Slide 388
Designing the Battery Charger: Intro…
I-Loop
I-V Loop
V-Loop
IEnd Detect
MP
IC = VC /RCV C
V Ref
R C
+-
+-
MEn d
+ -
-+
V En d
I
V
V D D
G mi
A V
C en d
D S W
V Bat
RBat
R o
RD
Rd s_ en d
R A V
Power Management IC Power Management IC –– A TopA Top--Down Design ApproachDown Design Approach
© by G.A. Rincón-Mora Page Page 208208
Slide 415
Adaptive Supply Voltage:
Envelop Follower
Condition: Match Delays & High BW Supply - BWSupply ≥ 2*BWEnvelop
(Follow high peak-to-average ratio events)
RF input
Envelope detector
DC-DC converter
RF outputDirectional
coupler RF PADelay line
-> Delay Mismatch & Poor Supply but Better PA Power Efficiency
…PA Supply: Boosting Efficiency
Slide 416
Adaptive Supply Voltage:
Power Tracker: Track power control or Vrms
(WCDMA: 1dB/666µs & CDMA 1.25ms/666µs)
* Some clipping occurs but w/ acceptable bit-error rates (BER)and error-vector magnitude (EVM)
Condition: Low BW Supply - tracks power control bandwidth-> Good Supply and Even Better PA Power Efficiency
RF input
Control signal generator
DC-DC converter
RF outputDirectional coupler RF PA
…PA Supply: Boosting Efficiency
Power Management IC Power Management IC –– A TopA Top--Down Design ApproachDown Design Approach
© by G.A. Rincón-Mora Page Page 230230
Slide 459
The Future, revisited
Integration
Slide 460
Components:
* MEMS Thermoelectric/Vibration Generators
* Planar Copper Inductors
* FC Stack
* Thin-Film Li-Ion Battery
* CMOS Inductor/Capacitor Multipliers
* CMOS Switching/Linear Regulators/References
* System Mode Manager
Fuel In
++
p+
2 2
FOXgnd
p+p+p+ n+n+n+p+FOX FOX FOXFOX FOX FOX
gnd
Oxide & Passivation
Hot Surface
N-type SiP-type Si
Plastic Package
Cold Surface
200-
400
mµ
…The Future: Integration