PLC Hardware and Programming

KARMAVEER BHAURAO PATIL POLYTECHNIC,

SATARA

Rayat Shikshan Sanstha’s

Department Of Electronics And Telecommunication Engineering

PLC Hardware & Programming

Control System and PLC

Amit NevaseLecturer,

Department of Electronics & Telecommunication Engineering, Karmaveer Bhaurao Patil Polytechnic, Satara

EJ5G Subject Code: 17536 Third Year Entc

05/01/2023 Amit Nevase 3

Objectives

The student will be able to:

Understand classifications of control system.

Understand Steady state, time response, and frequency

response analysis.

Analyze the Stability of control system using RH criteria.

Understand the fundamentals and diff. Hardware parts of

PLC.

Draw ladder diagrams to program PLC


Teaching & Examination Scheme

Two tests each of 25 marks to be conducted as per the schedule given by MSBTE.

Total of tests marks for all theory subjects are to be converted out of 50 and to be entered in mark sheet under the head Sessional Work (SW).

Teaching Scheme Examination Scheme

TH TU PR PAPERHRS TH PR OR TW TOTAL

03 -- 02 03 100 50# --- 25@ 175


Module I – Introduction to Control System Introduction to Control systems (4 Marks)

Control System – Definition and Practical Examples Classification of Control System : Open Loop and Closed Loop Systems –

Definitions, Block diagrams, practical examples, and Comparison, Linear and Non-linear Control System, Time Varying and Time In-varying Systems

Servo System : Definition, Block Diagram, Classification (AC and DC Servo System), Block diagram of DC Servo System.

Laplace Transform and Transfer Function (4 Marks) Laplace Transform : Signifiance in Control System Transfer Function : Definition, Derivation of transfer functions for Closed loop

Control System and Open Loop Control System, Differential Equations and transfer functions of RC and RLC Circuit

Block Diagram Algebra (8 Marks) Order of a System : Definition, 0,1,2 order system Standard equation, Practical

Examples Block Diagram Reduction Technique: Need, Reduction Rules, Problems


Module II – Time Response Analysis Time Domain Analysis (4 Marks)

Transient and Steady State Response Standard Test Inputs : Step, Ramp, Parabolic and Impulse, Need, Significance

and corresponding Laplace Representation Poles and Zeros : Definition, S-plane representation

First and Second order Control System (8 Marks) First Order Control System : Analysis for step Input, Concept of Time Constant Second Order Control System : Analysis for step input, Concept, Definition and

effect of damping Time Response Specifications (8 Marks)

Time Response Specifications ( no derivations ) Tp, Ts, Tr, Td, Mp, ess – problems on time response specifications Steady State Analysis – Type 0, 1, 2 system, steady state error constants,

problems


Module III – Stability

Introduction to Stability (4 Marks)Definition of Stability, Analysis of stable, unstable, critically stable

and conditionally stable Relative StabilityRoot locations in S-plane for stable and unstable system

Routh’s Stability Criterion (8 Marks) Routh’s Stability Criterion : Different cases and conditionsStatement MethodNumericals Problems


Module IV – Control Actions

Process Control System (4 Marks)Process Control System – Block diagram, explanation of each block

Control Actions (8 Marks) Discontinuous Mode : On-Off Controller, Equation, Neutral Zone Continuous modes: Proportional Controller (offset, proportional

band), Integral Controllers, Derivative Controllers – output equations, corresponding Laplace transforms, Response of P, I, D controllers

Composite Controllers : PI, PD, PID Controllers – output equations, response, comparison


Module V – PLC Fundamentals Introduction (4 Marks)

Evolution of PLC in automation, need and benefits of PLC in automation

Block Diagram of PLC (12 Marks) Block diagram and description of different parts of PLC - CPU Function, Scanning cycle, speed of execution, Power supply

function, Memory – function , organization of ROM and RAM Input modules – function, different input devices used with PLC

and their usesOutput modules – function, different output devices used with

PLC and their uses Fixed and Modular PLCs


Module VI – PLC Hardware and Programming

PLC Hardware (8 Marks) Discrete Input Modules – Block diagram, typical wiring details, Specifications of

AC input modules and DC input modules. Sinking and sourcing concept in DC input modules

Discrete Output Modules – Block diagram, typical wiring details, Specifications of AC output modules and DC output modules.

Analog Input and output modules : Block diagram, typical wiring details and specifications

PLC Programming (16 Marks) I/O Addressing in PLC PLC Instruction Set : Relay instructions, timer instructions, counter instructions,

data handling instructions, logical and comparison instructions PLC programming examples based on above instruction using Ladder

programming

Module-VIPLC Hardware & Programming


Specific Objectives

Explain the details of diff. I/O modules of PLC.

Get familiar with the instruction set of PLC

system.

Develop PLC programming skills.



PLC Hardware (8 Marks) Discrete Input Modules – Block diagram, typical wiring details, Specifications

of AC input modules and DC input modules. Sinking and sourcing concept in DC input modules





programming

Input Modules

Input modules serve as the link between field devices and the

PLC’s CPU.

Each input module has a terminal block for attaching input

wiring from each individual field input device.

Typically input modules have either 8, 16 or 32 input terminals.

The main function of an input module is to take the field device

input signal, convert it to a signal level that the CPU can work

with, electrically isolate it, and send the signal, by the way of the

backplane board, to the CPU.


Discrete Input Modules

The discrete input module is the most common input

interface used with programmable controllers.

Discrete input signals from field devices can be either

AC or DC.


Discrete Input Modules

The most common types are listed below:

AC Input Modules DC Input Modules

24 VAC 24 V dc

48 VAC 48 V dc

120 VAC 10-60 V dc

240 VAC 120 V dc

120 Volts Isolated 230 V dc

240 Volts Isolated Sink/Source 5-50 V dc

24 VAC/DC 5/12 V dc TTL


Typical Wiring Details


Input Module

Input Module

24 Volts

230 Volts

120 Volts

Common

Common Common

Common

Block diagram of AC input module


Bridge Rectifier

Noise & Debounce

Filter

Threshold Detector

OpticalIsolation Logic CPU

LED

InputStatusTable

InputSignal

AC Input Module Specifications

Voltage: This is the operating voltage at 47 to 63 Hertz

for the module.

Inputs: This indicates the number of inputs the module

has.


Points per common: This is the number of input points

that share the same common connection. As an

example, one 16 point input module could have all

input points sharing one common, and a different 16

point input module might have two groups of 8 input

points. Each group of 8 would have its own separate

common.



Backplane Current Draw: Each module takes power

from the PLCs power supply to operate the electronics

on the module. This specification will be used when

calculating power supply loading.

Maximum signal delay: Signal delay is the time it takes

for the PLC to pick up the field input signal, digitize it,

and store it in the memory. This specification is usually

listed for signal turning on and for a signal turning off.



Nominal input current: this is the current drawn by an

input point at nominal input voltage.

Maximum Inrush Current: this is the maximum inrush

current the module can handle.

Maximum off state current: this is the maximum

amount of current, typically from leakage from a solid

state input device, that a module can accept while

remaining in an OFF state.



Block diagram of DC input module


PowerConversion

Noise & Debounce

Filter

Threshold Detector

OpticalIsolation Logic CPU

LED

InputStatusTable

InputSignal

+

-

DC Input Module Specifications

Maximum Off state current: This is the maximum

amount of leakage current allowed in an input circuit

from an input device that will keep the input circuit in

an OFF state.


Sinking/Sourcing


InputDevice

+

-

Input Module

InputDevice

+

-

Input Module

(a) (b)

Sinking/Sourcing


OutputLoad

Output Module

Output Module

- +

OutputLoad

(c) (d)









programming

Output Modules

Output modules serve as the link between the PLC’s

microprocessor and hardware field devices.

Each output module has a terminal block for attaching output

wiring to go to each individual field output device.

Typical output modules have either 8, 16 or 32 output terminals.

The output signal once received from the CPU, must be stored

before being sent to each output module’s output screw

terminals.

The storage area for output signals is called the output status file.


Discrete Output Modules

Much like discrete inputs, discrete outputs are the

most commonly used type.

Discrete output modules simply act as switches to

control output field devices.

They fall into two classifications: solid state switching

and relay output switching.


Common Discrete Output Modules

Discrete Output Modules

Solid State Outputs Relay Outputs

AC output Modules DC output Modules Relay Output modules

12, 24, 48 VAC TTL Level Relay Output

120 VAC 12, 24, 48 V dc Isolated relay output

230 VAC 120 V dc Relay output

230 V dc

24 V dc, sink

24 V dc, source 05/01/2023 Amit Nevase 30

Typical Wiring Details of Output Module


120 VAC

Load

User suppliedPower for

Field devices

Output 2

Output 3

Output 4

Output 5

COM

OutputModule

Signal FromCPU operates switch

Block diagram of AC output Module


Latch Logic

Circuit

TriacSwitching

Circuit

OpticalIsolation

FilterControlled

Device

FuseSignalFromCPU

LED

Block diagram of AC output Module


Solid State Output Switching

In solid state AC output module, a triac is used to

switch the AC high voltage and current controlling the

ON or OFF state of the field hardware device. A triac is

a solid state device used to switch AC.


Relay Output Switching

Relay output modules are also known as contact or dry

contact outputs.

Even though relay output modules are used to switch AC or

DC loads, usually relay outputs are used to switch small

currents at low voltages, to multiplex analog signals, and to

interface control signals to variable speed drives.

Relay output modules use actual mechanical relays, one for

each output point, to switch the output signal from the

output status file. 05/01/2023 Amit Nevase 35

Relay Output Switching


Fuse

ON or OFFSignal from

Output statustable

OutputModule

RelaySwitching

Device

L-1 L-2Common to other points

Block diagram of DC output module


Latch Logic

Circuit

PowerTransistorSwitching

Circuit

OpticalIsolation

FilterControlled

Device

FuseSignalFromCPU

LED

Specifications of DC output module

Sourcing Output Module Specifications

Operating Voltage 10/50 V dc

Number of Outputs 16

Output points per common 16

Backplane Current draw 0.280 amp at 5 V dc

Maximum Signal Delay ON= 0.1 msOFF= 1.0 ms

Maximum OFF state leakage 1 mA

Minimum Load Current 1 mA

ON state voltage Drop 1.2 Volts at 10 amps










programming

Analog Input Module


+

+

UserConnection

UserConnection

COM

A/DConverter

OptoIsolation

MicroProcessor

BackplaneInterface

VLSICPU

InputStatusTable









programming

I/O Addressing

The PLC has to be able to identify each particular input

and output. It does this by allocating addresses to each

input and output.

With a small PLC this is likely to be just a number,

prefixed by a letter to indicate whether it is an input or

an output.


I/O Addressing

With larger PLCs that have several racks of input and

output channels, the racks are numbered.

With the Allen-Bradley PLC-5, the rack containing the

processor is given the number 0 and the addresses of

the other racks are numbered 1, 2, 3, and so on,

according to how setup switches are set.

Each rack can have a number of modules, and each

one deals with a number of inputs and/or outputs.05/01/2023 Amit Nevase 43

I/O Addressing


X :X X X / X X

ModuleNumber

TerminalNumber

RackNumber

I=InputO=Output









programming


Programming Languages

Ladder Diagram (LD):a graphical depiction of a process

with rungs of logic, similar to the relay ladder logic

schemes that were replaced by PLCs.

Sequential Function Charts (SFC): a graphical depiction

of interconnecting steps, actions, and transitions.

Instruction List (IL): assembler type, text based

language for building small applications or optimizing

complex systems.


Programming Languages

Function Block Diagram (FBD): a graphical depiction of

process flow using simple and complex interconnecting

blocks.

Structured Text (ST): a high-level, text-based language

such as BASIC, C, or PASCAL specifically developed for

industrial control applications.

PLC Ladder Programming

A very commonly used method of programming PLCs is

based on the use of ladder diagrams.

Writing a program is then equivalent to drawing a

switching circuit.

The ladder diagram consists of two vertical lines

representing the power rails.

Circuits are connected as horizontal lines, that is, the

rungs of the ladder, between these two verticals.05/01/2023 Amit Nevase 48

In drawing a ladder diagram, certain conventions are adopted

The vertical lines of the diagram represent the power rails between which circuits are connected. The power flow is taken to be from the left-hand vertical across a rung.

Each rung on the ladder defines one operation in the control process


A ladder diagram is read from left to right and from top to bottom.

The top rung is read from left to right. Then the second rung down is read from left to right and so

on. When the PLC is in its run mode, it goes through the entire

ladder program to the end, the end rung of the program being clearly denoted, and then promptly resumes at the start



END

LeftPower

Rail

RightPower

Rail

Power Flow

Rung 1

Rung 2

Rung 3

Rung 4

End Rung


Scanning Ladder Diagram

END

LeftPower

Rail

RightPower

RailPower Flow

Rung 1

Rung 2

Rung 3

Rung 4

End Rung

Read the status of all the inputs & store

memory

Read the inputs from memory & implement the program, storing

in the outputs in memory

Update all the outputs

Each rung must start with an input or inputs and must

end with at least one output. The term input is used for

a control action, such as closing the contacts of a

switch. The term output is used for a device connected

to the output of a PLC, such as a motor. As the program

is scanned, the outputs are not updated instantly, but

the results stored in memory and all the outputs are

updated simultaneously at the end of the program scan



Electrical devices are shown in their normal condition.

Thus a switch that is normally open until some object

closes it is shown as open on the ladder diagram. A

switch that is normally closed is shown closed.



A particular device can appear in more than one rung

of a ladder. For example, we might have a relay that

switches on one or more devices. The same letters

and/or numbers are used to label the device in each

situation.



The inputs and outputs are all identified by their

addresses; the notation used depends on the PLC

manufacturer. This is the address of the input or

output in the memory of the PLC









PLC Programming (16 Marks) I/O Addressing in PLC PLC Instruction Set : Relay instructions, timer instructions, counter

instructions, data handling instructions, logical and comparison instructions PLC programming examples based on above instruction using Ladder

programming


Relay Type Instructions

Sr. No. Instruction Description

1 XIC Examine if closed

2 XIO Examine if open

3 OTE Output Energize

4 OTL Output Latch

5 OTU Output Unlatch


Representation of Contacts and Coils

The ladder diagram language is basically a symbolic set

of instructions used to create the controller program.

These ladder instruction symbols are arranged to

obtain the desired control logic that is to be entered

into the memory of the PLC.

Because the instruction set is composed of contact

symbols, ladder diagram language is also referred to as

contact symbology.


Representation of Contacts and Coils

Representations of contacts and coils are the basic symbols of

the logic ladder diagram instruction set.

The three fundamental symbols that are used to translate

relay control logic to contact symbolic logic are

- Examine If Closed (XIC),

- Examine If Open (XIO),

- Output Energize (OTE).

Each of these instructions relates to a single bit of PLC

memory that is specified by the instruction’s address.


Fundamental Symbols

Figure : Relay Contact Figure : Relay Contact

Figure : Relay Coil

Examine If Closed (XIC) Examine If Open (XIO)

Output Energize (OTE)


Examine If Closed (XIC) Instruction

101234567891011121314151617

I:012

I:012

04Instruction is TRUE

001234567891011121314151617

I:012

I:012

04Instruction is FALSE


Examine If Closed (XIC) Instruction


Examine If Open (XIO) Instructions

001234567891011121314151617

I:012

I:012

04Instruction is TRUE

101234567891011121314151617

I:012

I:012

04Instruction is FALSE


Examine If Open (XIO) Instructions


Output Energize (OTE) Instruction

Figure : Output Energize (OTE) instruction - TRUE

101234567891011121314151617

O:013

1 101234567891011121314151617

I:012

I:012

01

I:012

04

O:013

01



Figure : Output Energize (OTE) instruction - FALSE

001234567891011121314151617

O:013

0 101234567891011121314151617

I:012

I:012

01

I:012

04

O:013

01


OTL and OTU Instructions

Instruction Name Symbol Description

OTL Output Latch

OTL sets the bit to "1" when the rung becomes true and retains its state when the rung loses continuity or a power cycle occurs.

OTU OutputUnlatch

OTU resets the bit to "0" when the rung becomes true and retains it.

L

U







PLC Programming (16 Marks) I/O Addressing in PLC PLC Instruction Set : Relay instructions, Timer instructions, counter


programming


Timer Instructions

Sr. No. Instruction Name Description

1 TON On Delay Timer Counts time-based intervals when the instruction is true.

2 TOF Off Delay Timer Counts time-based intervals when the instruction is false.

3 RTO Retentive Timer

Counts time-based intervals when the instruction is true and retains the accumulated value when the instruction goes false or when power cycle occurs.

4 RES Reset Resets a retentive timer’s accumulated value to zero.


On Delay Timer SequenceInput Timer

Rung Condition

Time Period

Timed Output Bit

False

True

On DelayTimed

DurationTrue

FalseOn (Logic 1)

Off (Logic 0)

Preset Value= Accumulated Value


TON – On Delay Timer Instruction

TON

EN

DN

TIMER ON DELAYTimerTime BasePresetAccumulated

T4:01:015

0

The On delay timer operates such that when the rung

containing timer is true, the timer timed out period

commences.

At the end of the timer time out period, an output is made

active.


Timer number —This number must come from the timer file. In the example

shown, the timer number is T4:0, which represents timer file 4, timer 0 in

that file. The timer address must be unique for this timer and may not be

used for any other timer.

Time base —The time base (which is always expressed in seconds) may be

either 1.0 s or 0.01 s. In the example shown, the time base is 1.0 s.

Preset value —In the example shown, the preset value is 15. The timer

preset value can range from 0 through 32,767.

Accumulated value —In the example shown, the accumulated value is 0.

The timer’s accumulated value normally is entered as 0, although it is

possible to enter a value from 0 through 32,767. Regardless of the value that

is preloaded, the timer value will become 0 whenever the timer is reset.

TON – On Delay Timer Instruction


TON Instruction – Control Word

0123456789101112131415

0

1

2

Timer ElementWord

Internal Use

Preset Value PRE

Accumulated Value ACC

EN DNTT


Enable (EN) bit —The enable bit is true (has a status of 1) whenever the

timer instruction is true. When the timer instruction is false, the enable bit is

false (has a status of 0).

Timer-timing (TT) bit —The timer-timing bit is true whenever the

accumulated value of the timer is changing, which means the timer is timing.

When the timer is not timing, the accumulated value is not changing, so the

timer-timing bit is false.

Done (DN) bit —The done bit changes state whenever the accumulated

value reaches the preset value. Its state depends on the type of timer being

used.

TON Instruction – Control Word


Off Delay Timer SequenceInput Timer

Rung Condition

Timed Period

Timed Output Bit

False

True

Off DelayTimed

DurationTrue

FalseOn (Logic 1)

Off (Logic 0)

Preset Value= Accumulated Value


TOF – Off Delay Timer Instruction

TOF

EN

DN

TIMER OFF DELAYTimerTime BasePresetAccumulated

T4:01:015

0

The Off delay timer operation will keep the output

energized for a time period after the rung containing

the timer has gone false.


Timer number —This number must come from the timer file. In the example

shown, the timer number is T4:0, which represents timer file 4, timer 0 in

that file. The timer address must be unique for this timer and may not be

used for any other timer.

Time base —The time base (which is always expressed in seconds) may be

either 1.0 s or 0.01 s. In the example shown, the time base is 1.0 s.

Preset value —In the example shown, the preset value is 15. The timer

preset value can range from 0 through 32,767.

Accumulated value —In the example shown, the accumulated value is 0.

The timer’s accumulated value normally is entered as 0, although it is

possible to enter a value from 0 through 32,767. Regardless of the value that

is preloaded, the timer value will become 0 whenever the timer is reset.

TOF – Off Delay Timer Instruction


TOF Instruction – Control Word

0123456789101112131415

0

1

2

Timer ElementWord

Internal Use

Preset Value PRE

Accumulated Value ACC

EN DNTT


Enable (EN) bit —The enable bit is true (has a status of 1) whenever the

timer instruction is true. When the timer instruction is false, the enable bit is

false (has a status of 0).

Timer-timing (TT) bit —The timer-timing bit is true whenever the

accumulated value of the timer is changing, which means the timer is timing.

When the timer is not timing, the accumulated value is not changing, so the

timer-timing bit is false.

Done (DN) bit —The done bit changes state whenever the accumulated

value reaches the preset value. Its state depends on the type of timer being

used.

TOF Instruction – Control Word


RTO – Retentive Timer

A retentive timer accumulates time whenever the device

receives power, and it maintains the current time should

power be removed from the device.

Once the device accumulates time equal to its preset

value, the contacts of the device change state.

RTO

EN

DN

RETENTIVE TIMER ONTimerTime BasePresetAccumulated

T4:01:015

0


RTO – Timer Programmed Logic

RTO

EN

DN

RETENTIVE TIMER ONTimerTime BasePresetAccumulated

T4:01:0

70

PB1

T4:2 PL

DN


RTO – Timer Sequence

------------------------------------------------------------------------------------

------------------------------------------------------------------------------------

------------------------------------------------------------------------------------

------------------------------------------------------------------------------------

------------------------------------------------------------------------------------

01

23

45

67

Time Input

Timer T4:2Enable Bit

Accumulated Value

Accumulated Value retainedWhen rung condition goes false

Acc Value = Pre Value

Timer T4:2Done Bit

PL Output

False

True

OnOff

OnOff

OnOff


RES – Reset Instruction

Because the retentive timer does not reset to 0 when the timer

is de-energized, the reset instruction RES must be used to reset

the timer.

The RES instruction given the same address (T4:2) as the RTO.

When reset pushbutton closes, RES resets the accumulated time

to 0 and DN bit to 0, turning output off.

Reset

RES

T4:2







PLC Programming (16 Marks) I/O Addressing in PLC PLC Instruction Set : Relay instructions, timer instructions, Counter


programming


Counter Instructions


1 CTU Up counterIncrements the accumulated value at each false-to-true transition and retains the accumulated value when an off/on power cycle occurs.

2 CTD Down counterDecrements the accumulated value at each false-to-true transition and retains the accumulated value when an on/off power cycle occurs.

3 HSC High Speed Counter Counts high-speed pulses from a high-speed input.

4 RES Reset Resets a counter’s accumulated value to zero.


UP Counter Counting Sequence

Limit Switch Counter UP

Counter Value

+4

Accumulated Value= preset = outputOFF

ON


CTU – Up Counter InstructionCTU

CU

DN

COUNT – UP COUNTERCounterPresetAccumulated

C5:070

RES

C5:0/CU

C5:0/DN

C5:0/OV

C5:0

Counter Enable Bit

Counter Done Bit

Overflow Status Bit

Counter Reset Instruction


CTU – Up Counter Sequence

------------------------------------------------------------------------------------

------------------------------------------------------------------------------------

------------------------------------------------------------------------------------

------------------------------------------------------------------------------------

Count Up Input

DN Bit of Counter

Reset

Accumulated Value

12

34

56

7

PRE Value =7

1 2 3 4 5 6 7TRUE

FALSE


CTU – UP Counter Instruction

Counter Number —This number must come from the counter fi le.

In the example shown, the counter number is C5:0, which

represents counter file 5, counter 0 in that file. The address for this

counter should not be used for any other count-up counter.

Preset Value —The preset value can range from 232,768 to 132,767.

In the example shown, the preset value is 10.

Accumulated Value —The accumulated value can also range from

232,768 through 132,767. Typically, as in this example, the value

entered in the accumulated word is 0. Regardless of what value is

entered, the reset instruction will reset the accumulated value to 0.


CTU – UP Counter Instruction Control Word

C5:N Bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

C5:N:0 Word0 CU CD DN OV UN UA INTERNAL USE (not addressable)

C5:N:1 Word1 PRESET VALUE

C5:N:2 Word2 ACCUMULATED VALUE


Count-Up (CU) Enable Bit —The count-up enable bit is

used with the count-up counter and is true whenever

the count-up counter instruction is true. If the count-up

counter instruction is false, the CU bit is false.

Done (DN) Bit —The done bit is true whenever the

accumulated value is equal to or greater than the

preset value of the counter, for either the count-up or

the count-down counter.



Overflow (OV) Bit —The overflow bit is true whenever the

counter counts past its maximum value, which is 32,767. On the

next count, the counter will wrap around to 32,768 and will

continue counting from there toward 0 on successive false-to-

true transitions of the count-up counter.

Update Accumulator (UA) Bit —The update accumulator bit is

used only in conjunction with an external HSC (high-speed

counter).



DOWN Counter Counting Sequence

Proximity Switch Counter Down

Counter Value

-5

Accumulated Value= Preset = outputOFF

ON


CTD – Down Counter InstructionCTD

CD

DN

COUNT – DOWN COUNTERCounterPresetAccumulated

C5:07

0

RES

C5:0/CD

C5:0/DN

C5:0/UN

C5:0

Counter Enable Bit

Counter Done Bit

Underflow Status Bit

Counter Reset Instruction


CTD – Down Counter Sequence

------------------------------------------------------------------------------------

------------------------------------------------------------------------------------

------------------------------------------------------------------------------------

------------------------------------------------------------------------------------

Count Down Input

DN Bit of Counter

Reset

Accumulated Value

12

34

56

7

PRE Value

1 2 3 4 5 6 7TRUE

FALSE


CTD – Down Counter Instruction

Counter Number —This number must come from the counter fi le.

In the example shown, the counter number is C5:0, which

represents counter file 5, counter 0 in that file. The address for this

counter should not be used for any other count-up counter.

Preset Value —The preset value can range from 232,768 to 132,767.

In the example shown, the preset value is 10.

Accumulated Value —The accumulated value can also range from

232,768 through 132,767. Typically, as in this example, the value

entered in the accumulated word is 0. Regardless of what value is

entered, the reset instruction will reset the accumulated value to 0.


CTD – Down Counter Instruction Control Word

C5:N Bit 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

C5:N:0 Word0 CU CD DN OV UN UA INTERNAL USE (not addressable)

C5:N:1 Word1 PRESET VALUE

C5:N:2 Word2 ACCUMULATED VALUE


Count-Down (CD) Enable Bit —The count-down enable bit

is used with the count-down counter and is true whenever

the count-down counter instruction is true. If the count-

down counter instruction is false, the CD bit is false.

Done (DN) Bit —The done bit is true whenever the

accumulated value is equal to or greater than the preset

value of the counter, for either the count-up or the count-

down counter.


05/01/2023 Amit Nevase 100

Underflow (UN) Bit —The underflow bit will go true

when the counter counts below 32,768. The counter

will wrap around to 132,767 and continue counting

down toward 0 on successive false-to-true rung

transitions of the count-down counter.

Update Accumulator (UA) Bit —The update

accumulator bit is used only in conjunction with an

external HSC (high-speed counter).


05/01/2023 Amit Nevase 101







Data handling instructions, logical and comparison instructions PLC programming examples based on above instruction using Ladder

programming

05/01/2023 Amit Nevase 102

Data Handling Instructions


1 MOV Move Moves the source value to the destination.

2 MVM Masked MoveMoves data from a source location to a selected portion of the destination.

05/01/2023 Amit Nevase 103

MOV Instruction

The MOV instruction is used to copy data from source

word to destination word.

MOVMOVE

Source

Destination

N7:30

N7:20

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MOV Instruction

When the rung is true, input switch A closed, the value stored at the

source address, N7:30, is copied into the destination address, N7:20.

When the rung goes false, input switch A opened, the destination

address will retain the value unless it is changed elsewhere in the

program.

The source value remains unchanged and no data conversion occurs.

MOVMOVE

Source

Destination

N7:30

N7:20

PB1 N7:30

N7:20

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MVM Instruction

The move with mask (MVM) instruction differs slightly

from the MOV instruction because a mask word is

involved in the move.

The data being moved must pass through the mask to

get to their destination address.

Masking refers to the action of hiding a portion of a

binary word before transferring it to the destination

address.

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MVM Instruction

The pattern of characters in the mask determines which source bits will be passed through to the destination address.

The bits in the mask that are set to zero (0) do not pass data. Only the bits in the mask that are set to one (1) will pass the

source data through to the destination. Bits in the destination are not affected when the corresponding

bits in the mask are zero. The MVM instruction is used to copy the desired part of a 16-bit

word by masking the rest of the value.

MVMMASKED MOVE

Source

Destination

B3:0

B3:4

1010101010101010Mask B3:1

FF0F

1010101011001010

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MVM InstructionMVM

MASKED MOVESource

Destination

B3:0

B3:4

1010101010101010Mask B3:1

FF0F

1010101011001010

PB1

1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1

1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0

1 0 1 0 1 0 1 0 1 1 0 0 1 0 1 0

Source B3:0

Mask FF0F

Destination B3:4 before instruction went true

Destination B3:4 after instruction went true

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data handling instructions, Logical and comparison instructions PLC programming examples based on above instruction using Ladder

programming

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Logical Instructions


1 AND Logical AND Perform Bitwise AND operation

2 OR Logical OR Perform Bitwise OR operation

3 XOR Logical XOR Perform Bitwise XOR operation

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Logical Instructions


4 NOT Inversion Perform inversion of given source

5 CLR Clear Clear destination

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AND – Logical AND Instruction

The AND command is used to perform the logic AND instruction on each bit of the value in source A with each bit of the value of source B, storing the output logic in the destination.

ANDBITWISE AND

Source A

Destination

B3:0

B3:2

B3:1Source B

0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0

0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0

B3:0

B3:2

B3:1

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OR – Logical OR Instruction

The OR command is used to perform the logic OR instruction on each bit of the value in source A with each bit of the value of source B, storing the output logic in the destination.

ORBITWISE INCLUSIVE OR

Source A

Destination

B3:0

B3:2

B3:1Source B

0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0

B3:0

B3:2

B3:1

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XOR – Logical XOR Instruction

The XOR command is used to perform the logic XOR instruction on each bit of the value in source A with each bit of the value of source B, storing the output logic in the destination.

XORBITWISE EXCLUSIVE OR

Source A

Destination

B3:0

B3:2

B3:1Source B

0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0

0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0

0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0

B3:0

B3:2

B3:1

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NOT – Inversion Instruction

The NOT instruction is used to perform the NOT logic on the value in the source, bit by bit. The output logic value returned in the destination is the one's complement or opposite of the value in the source.

NOTNOT

Source

Destination

B3:0

B3:1

0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0

1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1

B3:0

B3:1

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CLR – Clear Instruction

The CLR instruction is used to set the destination value of a word to zero.

CLR

CLEAR

Destination B3:1

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0B3:1

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data handling instructions, logical and Comparison instructions PLC programming examples based on above instruction using Ladder

programming

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Data Compare Instructions


1 EQU Equal Tests whether two values are equal.

2 NEQ Not Equal Tests whether one value is not equal to a second value.

3 LES Less Than Tests whether one value is less than a second value.

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Data Compare Instructions


4 GRT Greater Than Tests whether one value isgreater than a second value.

5 LEQ Less Than or EqualTests whether one value is less than or equal to a second value.

6 GEQ Greater Than or Equal

Tests whether one value is greater than or equal to a second value.

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EQU – Equal Instruction

The equal (EQU) instruction is an input instruction that

compares source A to source B: when source A is equal

to source B, the instruction is logically true; otherwise

it is logically false.

EQUEQUAL

Source A

Source B

T4:0.ACC

N7:40

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NEQ – Not Equal Instruction

The not equal (NEQ) instruction is an input instruction

that compares source A to source B: when source A is

not equal to source B, the instruction is logically true;

otherwise it is logically false.

NEQNOT EQUAL

Source A

Source B

N7:5

25

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GRT – Greater Than Instruction

The greater than (GRT) instruction is an input

instruction that compares source A to source B: when

source A is greater than source B, the instruction is

logically true; otherwise it is logically false.

GRTGREATER THAN

Source A

Source B

T4:0.ACC

200

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LES – Less Than Instruction

The less than (LES) instruction is an input instruction

that compares source A to source B: when source A is

less than source B, the instruction is logically true;

otherwise it is logically false.

LESLESS THAN

Source A

Source B

C5:10.ACC

350

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GEQ – Greater Than or Equal Instruction

The greater than or equal (GEQ) instruction is an input


source A is greater than or equal to source B, the

instruction is logically true; otherwise it is logically

false.

GEQGREATER THAN OR EQUAL

Source A

Source B

N7:55

N7:12

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LEQ – Less Than or Equal Instruction

The less than or equal (LEQ) instruction is an input


source A is less than or equal to source B, the

instruction is logically true; otherwise it is logically

false.

LEQLESS THAN OR EQUAL

Source A

Source B

C5:1.ACC

457

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programming

Ladder Diagram for AND Gate

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Applied Voltage

Input A

Input B

Output

Input A

Input B

Output

(a)

(b)(c)

Ladder Diagram for OR Gate

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B

Applied Voltage

Input A

Input B

OutputInput

A

Input B

Output

Input A

Input B

Output

(a)

(b)

(c)

(d)

Ladder Diagram for NOT Gate

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A

Applied Voltage

Input A Output

Input A

Output

(a)

(b)(c)

Ladder Diagram for NAND Gate

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Input A

Input B

Output Input A

Input B

Output

(a) (b)

Ladder Diagram for NOR Gate

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Input A Input B Output

Input A

Input B

Output

(a) (b)

Ladder Diagram for Ex-OR Gate

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Input A

Input B

OutputInput A Input B

(a)(b)

Ladder Diagram for Ex-NOR Gate

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Input A

Input B

OutputInput A Input B

(a)(b)

Ladder diagram with Multiple Outputs

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Input Output A

OutputA

Output B

Input

OutputB

Ladder diagram with Multiple Inputs and Outputs

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Input A Output A

Input A

OutputA

Input B

Output B

Input B

OutputB

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Example 1

Draw Ladder diagram for given logic diagram

A

B CY

A C Y

B

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Example 2

Draw Ladder diagram for given logic diagramAB

C

Y

A C Y

B

D

D

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Example 3


A

B CY

A B Y

C

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Example 4

Draw Ladder diagram for given logic diagramAB

Y

A B Y

C

CD

D

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Example 5


AB Y

A B Y

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Example 6


A

B

C

Y

A C Y

B

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Example 7

Draw Ladder diagram for given Boolean Expression

A B Y

Y ABC D

C

D

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Example 8


C D Y

( )Y A B CD

A

B

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Example 9


A B Y

Y AB C

C

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Example 10


A C Y

( )Y A B CD

D

B

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Example 11


A B Y

( ) ( )Y ABC DEF

C

D E F

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Example 12


A B Y

( ) ( )Y A B A B C

C

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Example 13


A B Y

( ) ( ) ( )Y ABC AB ABC

C

A B

A B C

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Example 14


B A Y

( ) ( )Y A B C B A C

A B

C

C

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Example 15

Draw Ladder diagram for given Logic Table SW Lamp

1 1

0 0

SW Lamp

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Example 16

Draw Ladder diagram for given Logic Table SW Lamp

0 1

1 0

SW Lamp

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Example 17

Draw Ladder diagram for given Logic Table SW1 SW2 Lamp1 Lamp2

0 0 1 0

0 1 0 0

1 0 0 0

1 1 0 1SW1 Lamp 1

SW1 Lamp 2

SW2

SW2

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Example 18


0 0 0 0

0 1 1 0

1 0 0 1

1 1 0 0SW1 Lamp 1

SW1 Lamp 2

SW2

SW2

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Example 19


0 0 0 0

0 1 1 1

1 0 1 1

1 1 0 0SW1 Lamp 1

Lamp 2

SW2

SW1 SW2

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Example 20

Draw Ladder diagram for given Logic TableSW1 SW2 Lamp

1Lamp

2Lamp

3Lamp

4

0 0 1 0 0 0

0 1 0 1 0 0

1 0 0 0 1 0

1 1 0 0 0 1

SW1 Lamp 1

Lamp 2

SW2

SW1 SW2

SW1 Lamp 3

Lamp 4

SW2

SW1 SW2

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Example 21

Draw Ladder diagram to switch off three motors sequentially at 5 seconds interval

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EN

DN

TIMER OFF DELAY

TimerTime Base

PresetAccumulated

T4:1

1:0

50

TOF

EN

DN

TIMER OFF DELAY

TimerTime Base

PresetAccumulated

T4:2

1:0

100

TOF

EN

DN

TIMER OFF DELAY

TimerTime Base

PresetAccumulated

T4:3

1:0

150

TOF

SW

T4:1/DN

T4:2/DN

T4:3/DN

M1

M2

M3

Example 21

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Example 22

Draw Ladder diagram for 2 motor operations for

following conditions

1. Start push button starts motors M1 and M2

2. Stop push button stop motors M1 first and after 10 sec

motor M2

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EN

DN

TIMER OFF DELAYTimerTime BasePresetAccumulated

T4:11:010

0

TOF

Start

T4:1/DN M2

Example 22

M1

I:0/0

Stop

I:0/1 O:0/0

O:0/0

O:0/1

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Example 23

Draw Ladder diagram for parking space counter.

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CU

DN

COUNT UP COUNTER

CounterPresetAccumulated

C5:1150

0

CTU

C5:1/DNLot Full Light

Example 23

I:0/0

O:0/0

Enter SW

CD

DN

COUNT DOWN COUNTER

CounterPresetAccumulated

C5:2150

0

CTD

I:0/1

Exit SW

Reset C5:1

RES

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Example 24

Draw Ladder diagram for,

Three motors can be started automatically in sequence

with 20 sec time delay between each motor startup

when push button is starts. Stops all motors when push

button is stops.

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EN

DN


T4:11:020

0

TON

Start

T4:1/DNM2Example 24

M1

I:0/0

Stop

I:0/1O:0/0

O:0/0

O:0/1

EN

DN

TIMER ON DELAYTimerTime BasePreset

T4:21:020

TON

T4:2/DN M3Accumulated 0

T4:1/DN

O:0/2

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Example 25

Draw Ladder diagram for 2 motors operation,

a. When start button is pushed motor M1 and M2 starts

b. After 10 seconds motor M1 stops

c. Motor M2 stops 15 seconds after motor M1 has

stopped

d. Both M1 and M2 will stop when push button is

pressed.

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EN

DN


T4:11:010

0

TON

Start

T4:2/DN M2

Example 25

M1

I:0/0

Stop

I:0/1O:0/0

O:0/0

EN

DN


T4:21:015

TON

Accumulated 0

T4:1/DN

T4:1/DN

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Example 26

Draw Ladder diagram for 2 motors system,

a. Start switch starts Motor M1.

b. 10 seconds later Motor 2 Starts.

c. Stop switch stops Motor M1.

d. 15 seconds later Motor 2 Stops.

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EN

DN


T4:11:010

0

TON

Start

T4:1/DNM2

Example 26

M1

I:0/0

Stop

I:0/1O:0/0

O:0/0

O:0/1

EN

DN

TIMER OFF DELAYTimerTime BasePreset

T4:21:015

TOF

O:0/0Accumulated 0

T4:2/DN

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Example 27

Draw Ladder diagram for 3 motors operation,

a. Start push button starts Motor M1.

b. When motor M1 is ON after 5 min M2 is ON and M1

is OFF.

c. When M2 is ON after 10 min M3 is ON and M2 is OFF.

d. When stop push button is pressed M3 is OFF.

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EN

DN


T4:11:0300

0

TON

Start

T4:1/DNM2

Example 27

M1

I:0/0

T4:1/DN

I:0/1O:0/0

O:0/0

O:0/1

EN

DN


T4:21:0600

TON

O:0/1

T4:2/DN M3Accumulated 0

O:0/2

T4:2/DN

Stop

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References

Programmable Logic

Controllers – F. D. Petruzella

Introduction to

Programmable Logic

Controllers – Gary Dunning

Programmable Logic

Controllers – Jhon Hackworth,

Federic Hackworth

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Online Tutorials

https://

www.courses.psu.edu/e

_met/e_met430_jar14/c

group.html

https://www.courses.psu.edu/e_met/e_met430_jar14/cgroup.html




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Thank You

Amit Nevase

PLC Hardware and Programming

Engineering

Transcript of PLC Hardware and Programming