Platform-Based Design of Heterogeneous Embedded Systemsingo/presentations/slides_RTiS2009.pdf ·...
Transcript of Platform-Based Design of Heterogeneous Embedded Systemsingo/presentations/slides_RTiS2009.pdf ·...
Platform-Based Design of Heterogeneous
Embedded Systems
Ingo Sander
Royal Institute of TechnologyStockholm, Sweden
Real-Time in Sweden (RTiS 2009)August 19, 2009
Lund, Sweden
Ingo Sander (KTH) Platform-Based Design RTiS 2009 - August 19, 2009 1 / 30
Embedded systems are everywhere. . .
... and control vital functions in our daily life!
Designers have large responsibility!
Between 1985-87 several deaths and serious injuries of cancer patientswere due to overdoses of radiation resulting from a race conditionbetween concurrent tasks in the Therac-25 software (1985-87).
Ingo Sander (KTH) Platform-Based Design RTiS 2009 - August 19, 2009 2 / 30
Embedded systems are everywhere. . .
... and control vital functions in our daily life!
Designers have large responsibility!
Between 1985-87 several deaths and serious injuries of cancer patientswere due to overdoses of radiation resulting from a race conditionbetween concurrent tasks in the Therac-25 software (1985-87).
Ingo Sander (KTH) Platform-Based Design RTiS 2009 - August 19, 2009 2 / 30
Characteristics of Embedded Systems
An embedded system
is usually designed for one single task. Its functionality will neverchange.
is often a mass product. Design cost is critical.
is often safety-critical systems and has to fulfill hard real-timerequirements.
is often a hand-held device. Power-efficiency is critical.
is often a consumer products. Time-to-market is critical.
To be fast is not enough!
The system has to react to a heterogeneous environment at the righttime instance, otherwise there can be fatal consequences.
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Design process for embedded systems is very
different from general purpose programming!Embedded systems can be highly optimized
All unneeded features are a disadvantage (cost, power)
Design process must
be cost-efficientensure the correct functionality and timing of the implementationbe fast to ensure a short time-to-market
Embedded systems have a complex architecture consisting of many
heterogeneous components
Analog and digital hardware, general-purpose and specializedprocessors, real-time operating system and other software components
A disciplined design methodology is needed to design future embedded systems!
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Full-custom design methodologyA top-down full custom design
methodology will use all levels
of abstraction during the
design process.
Maximal flexibility, alldetails can be fine-tuned.Maximal performancecan theoretically beachieved.
Design-time and thus time-to-market can be very large!
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Platform-Based Design
Trade-Off: Design Space vs. Time-to-Market
A platform limits the design choices.The designer needs only to analyze the alternatives that areimplemented by the platform.The platform can itself be configured to a certain degree.
SW and HWLayers
FunctionalLayers
Initial Model
Possible Implementations
Design Space
(a) Full-Custom Design Methodology
SW and HWLayers
FunctionalLayers
Initial Model
Possible Implementations
Design Space
Platform
(b) Platform-Based Design
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An industrial platform: OMAPThe Open Multimedia Application Platform (OMAP) is developed by TexasInstruments. Many mobile phones are using this platform.
The OMAP 4 platform has been designed to drive smart phones and mobileinternet devices (MIDs).
OMAP Hardware Platform Instance
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An industrial platform: OMAPOMAP is not only a hardware platform, but provides several layers of software,which together comprise the OMAP software platform.
OMAP Software Platform
Designer can work at a high-level of abstraction!
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Platform Benefits
In addition to a shorter time-to-market the platform concept givesmore benefits:
The platform can be highly optimized since the developmentcosts are shared by several designs.
Library of software or IP-blocksTool support in form of compilers, verification tools, simulatorsFull custom design of critical platform components
Other platforms can be developed on top of a platform.
Design entry can be moved to higher levels of abstractionDevelopment of synthesis tools to automatically refine a designfrom an abstract level to a more detailed level
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Mapping of Function to Platform
In order to map a function onto a platform
functional requirements needs to be a implementednon-functional requirements need to be fulfilled (cost, power,timing, . . . )
Accurate estimates must be provided by the platform!Ingo Sander (KTH) Platform-Based Design RTiS 2009 - August 19, 2009 10 / 30
Current Industrial Design Practice
It is very difficult to accurately estimate the performance of anembedded system.
There is a huge difference between average and worst caseexecution time
As a consequence industry bases new designs rather on oldexperiences than on performance analysis and introduces sufficientsafety margins in form of more powerful components and extracommunication bandwidth
Surely, there must be a better way to design systems. . .
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A Dream: Correct-by-Construction Refinement
New platforms can be basedon existing platforms
Platform must export accurateperformance figures
Mapping from platform to
platform must either be
based on previouslyverified transformationsaccompanied with averification method thatcan prove correctness
Platform - Level x
Platform - Level 0
Platform - Level 1
Platform - Level y-1
Platform - Level y
SoftwarePlatforms
Function Platforms
HardwarePlatforms
Platfo
rm p
rovid
es a
ccura
te p
erfo
rma
nce
figu
res
Base platform needs to be predictable
Tra
nsf
orm
ati
on
ru
les
an
d c
on
stra
int
pro
pa
ga
tio
n
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Towards a predictable platformIf the base platform lacks predictability, it is very difficult to build a predictableplatform on top of it
Digital hardware is very predictable due to a simple mechanism:synchronization by a clock signal
Advanced processors are difficult to predict due to mechanisms, that are
aimed for improvement of average performance.
Cache memory: The access time difference between a cache hit andmiss can be easily a factor of 10.
Multicore architectures share main memory and communication channel
Execution time of a program running on one processor depends on theother processors, even if there is no communication in between them.
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Focus on predictable architectures is needed!At present the focus is on average performance. But for embedded systemspredictable is often much more important. Some suggestions:
Use tightly-coupled on-chip memories instead of caches.
Possible to predict at design time, if data is on-chip or off-chip
Give guaranteed access to buses or communication links (round-robin)
Possible to predict, when processor can access the bus
Use languages that are based on a simpler communication scheme for
concurrent programs
Synchronous languages (Esterel, Lustre, Signal, . . . ) use an implicitsynchronous clock and have been shown very successful forsafety-critical applications
Formal Methods
Formal methods can help a lot, but require a simple and formal model of theunderlying platform. Then they can be employed at all levels of abstraction.
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The SYSMODEL project
The Artemis project ’SYSMODEL’ (System Level ModelingEnvironment for SMEs) addresses the design process ofheterogeneous embedded systems.
Industrial Partners: Technoconsult, SIB Development(Denmark), Sting Networks, Catena, Solidux (Sweden),DA-Design, Finnelpro (Finland), Novelda (Norway)
Academic Partners: Technical University of Denmark, RoyalInstitute of Technology (Sweden), Tampere University ofTechnology (Finland)
The projected has started in January 2009 and has a durationof three years.
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SYSMODEL: Objectives
The SYSMODEL project follows the platform-based design approach.There are the following main objectives:
Development of modeling and simulation framework for analysisand design of embedded systems and systems-on-chip.
System Functionality FrameworkPlatform Architecture FrameworkDesign Space Exploration: Analysis, Mapping and TestabilityVerification of models
The results of the project shall increase productivity in industry.
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Models and Languages
To provide a base for formal methods, the system functionalityframework is based on the ForSyDe modeling framework.
To allow for industrial exploitation SystemC is used as the mainmodeling language both for the system functionality frameworkand the platform architecture framework.
Already today several dialects for different models ofcomputation exist. However, they often lack a formal semantics.Other languages, such as VHDL for hardware models orC/C++ for algorithms shall be integrated in the framework.
An industrial ’refinement-by-replacement’ approach shall besupported. Parts of the system functionality models shall bereplaced by executable platform models and then co-simulatedwith the system functionality models.
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ForSyDe
ForSyDe (Formal System Design) is a design methodology forsystems-on-chip, which allows to model heterogeneous systems.
ForSyDe is implemented as domain specific language in Haskell.
Several libraries for different models of computation exist andcan be simulated as integrated model.
ForSyDe processes are formally defined.
ForSyDe supports modeling at different levels of abstraction.
There exists a back-end for hardware design and synthesis(VHDL).
High-level and synthesizable models can be co-simulated givingaccess to powerful test benches.
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ForSyDe System Model
A system is modeled as hierarchical concurrent process model
Processes of different models of computation communicate viadomain interfaces
Supported MoCs: Synchronous, Untimed (Synchronous DataFlow), Continuous Time
AB
AB
P1
P3
P2 P4
P5
MoC B
MoC A
Systems containing analog, digital and software parts can be modeledat different levels of abstraction!
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ForSyDe Process
A process takes m input signals as argument and produces n outputsignals. ForSyDe processes are deterministic.
A process is always designed by means of a process constructor
The process constructor defines the communication interface ofthe process
The process constructor takes side-effect-free functions andvariables as arguments and returns a process
f g
v
mooreSY
=
Process
v
Variables
+
Functions
+
Process Constructor
f g
mooreSY
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Process Constructor - Benefits
The concept of process constructor
separates communication from computation
process constructor: communication and interfacefunction: computation
forces the designer to develop a structured formal model thatallows for formal analysis
transformational refinementimplementation mappingformal verification
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ForSyDe: Heterogeneous System Model
ControllerEncr/DecrAdaptive
D2AConverter
adaptGain
1
2
3
4
5 6 7
decode ASK
Receiver
A2DConverter
WaveSine
generate
multCT
modulate ASK
serializeBitVector
encode ASK
Sender
Transceiver
PowerController
Adaptive
Noiseadd
GeneratorNoise
Gaussian
Transceiver System
Noise
NoisyASK
ASK
receivedBitVector
encodedBitVector
ControlInputGainParameter
Controller
Key
BitVector
IntegerTo
IntegerTo
BitVector
decodedBitVector
IntegerInput
IntegerOutput
BitVector
Continuous Time Untimed (SDF) Synchronous
Decoder
Encoder
Bit Errors
Detect
detectBits packBits
Bit Error Rate
Encryption/Decryption
Key
in Hardware
0.0001Attenuation
Implementation
(Simplified DES)
The example has been developed as part of the European FP6 projectANDRES.
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ForSyDe: Simulating a Heterogeneous System
1 Synchronous Input Signal
in = {0,1,2,3,4,5}
4 Gaussian Noise
-0.0004
-0.0003
-0.0002
-0.0001
0
0.0001
0.0002
0.0003
0.0004
0.0005
0 0.001 0.002 0.003 0.004 0.005 0.006
seconds
Noise
7 Synchronous Output Signal
out = {0,1,10,3,4,5}
3 Transceiver Output
-5
-4
-3
-2
-1
0
1
2
3
4
5
0 0.001 0.002 0.003 0.004 0.005 0.006
seconds
ASK
5 Noisy Transceiver Input
-0.0008
-0.0006
-0.0004
-0.0002
0
0.0002
0.0004
0.0006
0.0008
0.001
0 0.001 0.002 0.003 0.004 0.005 0.006
seconds
NoisyASK
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SystemC
SystemC is a class library built on top of the C++ language.
SystemC adds concurrency and notion of time to C++ to allowto model systems.
The semantics of SystemC is very different from C++.
Systems in SystemC are modeled network of communicatingprocesses. Computational processes are encapsulated inmodules, while the communication among them is performedthrough channels.
Module
ProcessesPort
Interface Channel
Module
ProcessesPort
Interface
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SYSMODEL: ForSyDe is implemented in SystemC
MoC A
ChannelMoC A - MoC A
Port
MoC A - MoC BChannel
ModuleSystemC
MoC B
P2
P1
P3 P5
P4
SYSMODEL: Modeling rules will be developed in order to write Sys-temC models to comply to the ForSyDe semantics!
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SYSMODEL: System Functionality Framework
Synchronous Data Flow Model (SDF)
Continuous Time Model (CT)
Synchronous Model (SY)
SystemCCT
SystemCSY
Channel
CT - SY
VHDLSY
SystemCSY
Legacy
C-Code
SDF
ChannelSY-SDFSY-SY
Channel
SystemC WrapperSystemC Wrapper
The System Functionality Model is modeled in SystemC. Other languages can be
imported by means of SystemC-wrappers. The whole model can be co-simulated.
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SYSMODEL: Replacement by Refinement
Synchronous Data Flow Model (SDF)
Continuous Time Model (CT)
Synchronous Model (SY)
SystemCCT
SystemCSY
Channel
CT - SY
VHDLSY
Legacy
C-Code
SDF
ChannelSY-SDFSY-SY
Channel
C-Code
ISS
SystemC WrapperSystemC WrapperSystemC Wrapper
A SystemC block has been refined and replaced by C-code that runs on an
instruction set simulator, which belongs to the platform architecture framework.
The whole model can be co-simulated.Ingo Sander (KTH) Platform-Based Design RTiS 2009 - August 19, 2009 27 / 30
The ANDRES projectForSyDe has been used as formal framework in the FP6 ANDRES project:(Analysis and Design of run-time Reconfigurable, heterogeneous Systems). TheANDRES project used SystemC as design language. As part of the project
a specification methodology
a performance analysis method
for reconfigurable systems has been developed.
Facts on ANDRES
Industrial Partners: Thales Communications (France), DS2 (Spain)
Academic Partners: OFFIS (Germany), Royal Institute of Technology (Sweden),Technical University Vienna (Austria), University of Cantabria (Spain)
The projected has started in June 2006 and will finish in September 2009.
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Conclusion
Platform-based design is a promising approach to tackle theincreasing complexity of embedded system design
The design of a platform is a huge investment and does only payoff, if the platform is reused
Accurate performance characteristics must be available to allowa mapping of the functionality onto the platform
In order to move the design process to a higher level ofabstraction, well defined models and interfaces between differentabstraction layers, each constituting a platform, are needed
Projects like SYSMODEL are required to move system design toa higher level of abstraction
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Further Information
More information on ForSyDe
http://www.ict.kth.se/forsyde/
More information on the SYSMODEL project
http://www.sysmodel.eu/
More information on the ANDRES project
http://andres.offis.de/
More information on platform-based design
Alberto Sangiovanni-Vincentelli. Quo vadis, SLD? Reasoning about the trendsand challenges of system level design. Proceedings of the IEEE, 95(3):467–506,March 2007.
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