PETRA: A Framework for System Level Dynamic Thermal and Power Management Exploration

PETRA: A Framework for System Level Dynamic

Thermal and Power Management Exploration

Yoni Aizik, Muhammad K. MhameedDesign Technology Solution Group, Intel Corporation

DAC 2009 User Track

2

Agenda

• Power Management - Motivation• Overview• Usage Examples• Summary

3

Power Management

• Power Performance• Improved performance

power• How can we save power and

improve performance?– Shut down cores when they are

not needed

– Wake up cores when the workload increases– Reduce frequency

• While making sure that:– The chip does not exceed threshold

temperature– The power is sufficiently low

4

Sleep States

• Shut down unneeded core

• Idle cores:– Busy resources– No jobs

• To save power, idle cores are sent to sleep

Pow

er

Wak

eup

Tim

eSleep state

Idle

perc

enta

ge

5

Frequency Scaling• DVFS:

– Higher frequency higher performance, higher power

– Lower frequency ≠ lower performance• Decreases frequency when the memory is

the bottleneck

- To save power, the frequency of the core is reduced to the point that ensures minimum performance degradation

frequency

6

Challenges

• System architects have to:– Implement power management

algorithms– Consider their mutual influence– Evaluate different implementation

options

• Evaluation of system level power management requires long benchmarks– Minutes-long applications - Thermal effects, global

optimization (not local) – RTL model is not a viable option, due to slow simulation

speed• Need early evaluation method

– That can run long benchmarks – Enable assessment of different power management

algorithms

7

Petra Objectives

• Enable early assessment of – Power management

algorithms/configurations w.r.t. power/performance on real workloads (~minutes)

– Various OS policies• Power architects are the target users

• Provide a flexible high-level modeling and simulation framework for power management algorithms and hardware

8

Petra Overview

• Petra reads application traces• Process traces through power

management algorithms implemented by the user

• Takes into account dynamic thermal behavior

• Reports the power and performance of the simulated application

9

Input Traces

Workload 1Ghz

…

3Ghz

Each workload has to be prepared ahead of time

Applications is run on previous generation CPU

Collect data at all supported frequencies

10

Input Traces

#Inst. Dur. Enrg.

2M 5300 ..

2M 4210 ..

0.7M 1540 ..

0 10300 ..

1.3M 1500 ..

Workload

Information is arranged in buckets

11

Input Traces

#Inst. Dur. Enrg.

2M 5300 ..

2M 4210 ..

0.7M 1540 ..

0 10300 ..

1.3M 1500 ..

Workload

Energy = a1 · # $ misses +

a2 · # int add + …

Monitor activity of uArch events, map it to energy

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Input Traces

#Inst. Dur. Enrg. Cdyn

2M 5300 .. ..

2M 4210 .. ..

0.7M 1540 .. ..

0 10300 .. ..

1.3M 1500 .. ..

Workload

Energy = a1 · # $ misses +

a2 · # int add + …

Cdyn =

EnergyDuratio

n

1Vcc² · f

[F]

13

Dynamic SimulationTime

1 GHz 2 GHz 3 GHz

New Cdyn

Freq Change (1Ghz)Idle

Period

PowerOS

Power

OS

active Period

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Dynamic SimulationTime

1 GHz 2 GHz 3 GHz

Power

Power

execu

tion

ti

me

Power

Power

Power

Power

Power

Power

∑energy

15

Input Traces#Inst. Dur. Cdyn

2M 5300 ..

.. .. ..

#Inst. Dur. Cdyn

2M 5300 ..

.. .. ..

#Inst. Dur. Cdyn

2M 5300 ..

.. .. ..

#Inst. Dur. Cdyn

2M 5300 ..

.. .. ..

1Ghz

2Ghz

3Ghz

4Ghzfreq

PMdata

in1

in2

in3

in4

sel

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Building Blocks

OS Agent

Trace Feeder

Outputs

Traces

Power Model

WP Request

ActivityF/S Request

Sys

tem

Fre

quen

cy

Power / WP (Freq, Voltage, Sleep States)

Thermal Model

Working Point

Dispatcher

Cdyn

Fre

q, V

olta

ge

System Configuration

HS Temperature

Power

Env

utilization

System Info

floorplan

Pow

er

Tem

p

Working Point Calculator

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Building Blocks

OS Agent

Trace Feeder

Outputs

Traces

Power Model

WP Request

ActivityF/S Request

Sys

tem

Fre

quen

cy


Thermal Model

Working Point

Dispatcher

Cdyn

Fre

q, V

olta

ge

HS Temperature

Power

Env

utilizationP

ower

Tem

p


System Info

floorplan

18


Building Blocks

OS Agent

Outputs

Power Model

WP Request

ActivityF/S Request


Thermal Model

Working Point

Dispatcher

Cdyn

Fre

q, V

olta

ge


HS Temperature

Power

utilization

System Info

floorplan

Pow

er

Tem

p

Traces

Trace Feeder

Env

Sys

tem

Fre

quen

cy

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Building Blocks

Trace Feeder

Outputs

Traces

Power Model

WP Request

Activity

Sys

tem

Fre

quen

cy


Thermal Model

Working Point

Dispatcher

Cdyn

Fre

q, V

olta

ge


HS Temperature

Power

Env

System Info

floorplan

Pow

er

Tem

p

OS Agent

utilizationF/S Request

20


Building Blocks

OS Agent

Trace Feeder

Outputs

Traces

WP Request

ActivityF/S Request

Sys

tem

Fre

quen

cy


Thermal Model

Working Point

Dispatcher


HS Temperature

Env

utilization

System Info

floorplan

Pow

er

Cdyn

Power Model

Fre

q, V

olta

geTem

p

Power

21


Building Blocks

OS Agent

Trace Feeder

Outputs

Traces

Power Model

WP Request

ActivityF/S Request

Sys

tem

Fre

quen

cy


Working Point

Dispatcher

Cdyn

Fre

q, V

olta

ge


Power

Env

utilization

System Info

floorplan

Tem

p

Pow

er

HS Temperature

Thermal Model

22


Building Blocks

OS Agent

Trace Feeder

Outputs

Traces

Power Model

ActivityF/S Request

Thermal Model

Cdyn


HS Temperature

Power

Env

utilization

System Info

floorplan

Pow

er

Tem

p

Working Point

Dispatcher

Fre

q, V

olta

ge

WP Request

Sys

tem

Fre

quen

cy


23


Building Blocks

OS Agent

Trace Feeder

Outputs

Traces

Power Model

WP Request

ActivityF/S Request

Sys

tem

Fre

quen

cy


Thermal Model

Working Point

Dispatcher

Cdyn

Fre

q, V

olta

ge


HS Temperature

Power

Env

utilization

System Info

floorplan

Pow

er

Tem

p

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Usage Example:Performance Impact of Thermal Estimations

Errors

• Question: How do guard bands used in thermal reading affect the performance of a thermally limited system?

• Guard bands are result of:– Thermal sensor errors– Thermal sensor location (proximity to the

hotspot)• Each guard band adds performance

penalty (over design)• Petra can evaluate this price

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Performance Impact of Thermal Estimations Errors

to a significant performance loss• The data is application dependent• Petra analyses of the tradeoff between the

thermal guard bands and performance loss

• Thermally-stressed system

• Proprietary DVFS• Different thermal

guard band values

• Spec2k• Even few

degrees of a thermal guard band lead

0%

5%

10%

15%

20%

25%

30%

5 10 15Guardband [C]

Per

form

ance

Pen

alty

[%

]

spec2k galgel

spec2k equake

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Cost of Thread Migration

• Thread migration:– Move execution between cores– Spread power density– Decrease temperature

• Efficiently reduces temp, but adds penalty: – turning-on one core– transfer the µArch state from one core to

another– turning off inactive core

• High frequency thread migration:– better thermal conditions, but– increasing performance overhead

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Cost of Thread Migration

• Dual-core system• Running high power

application• TM: Temp > 100ºC• DVFS: Temp > 110ºC• Migration frequency is

varied

• When cycle time > 20mSec, TM is not efficient (the application run-time is constant)

• When cycle time < 5mSec, the overhead of the migration is greater than the thermal benefit

• The optimal working point : TM cycle time of 10mSec– balance the thermal benefit and the migration overhead

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32

33

34

0 10 20 30 40 50

Migration Cycle Time [mSec]

Ap

pli

cati

on

E

xecu

tio

n T

ime

[Sec

]

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Summary

• Petra is a novel simulation framework that estimates the effect of the PM algorithms on real workloads

• The abstraction level of the traces enables a reasonable (similar to real) simulation time of target applications

• Our solution provides:• Scalability to long benchmark runs• Time accuracy to reflect real system behavior• Separation of algorithm implementation (user

provided) and their scheduling (part of infrastructure)

PETRA: A Framework for System Level Dynamic Thermal and Power Management Exploration

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