The Pinned Photodiodeepp.fnal.gov/DocDB/0016/001647/002/ThePinnedPhotodiode...PC/WEB Cam Application...
Transcript of The Pinned Photodiodeepp.fnal.gov/DocDB/0016/001647/002/ThePinnedPhotodiode...PC/WEB Cam Application...
©2016 N. Teranishi
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The Pinned Photodiode
Nobukazu Teranishi
University of HyogoShizuoka University
RIKEN
FEE (Front End Electronics) 2016June 2, 2016
©2016 N. Teranishi
2Image Sensor (IS) Market
1406 08 10 12040201 03 05 07 09 11 13Year
1
2
0
3
4Bpcs
Sale
s am
ount
(Source: TSR)
Camera phone
Tablet
PC/WEB Cam
Application (2014)
SecurityAutomotive
GameCompact DSC
DSLRCamcorder PMP
TVMedical
OthersBroadcast
- IS sales amount has grown mainly by camera phone in this 10 years.But, it became diminished in Q4, 2015.
- IS spreads into various applications, “Others” includes scientific, industrial, …
CCD image sensorCMOS image sensor
©2016 N. Teranishi
Pixel Shrinkage Trend
・ Shrinkage speed becomes slower recently.・ In 2015, 1 um pixel began to be mass produced.
Mass Production Year85 90
1
10
50% shrinkage in 3.5 years
1005009580
BSI
Microlens
100
(um2)
Min
imum
Pix
el A
rea
Lightpipe
Inner MicrolensShifted Microlens
15
StackDTI
CCDCMOS
3
Pinned PD(PPD)
©2016 N. Teranishi
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1. Introduction
2. Pinned Photodiode (PPD) Structure and Effects
3. Image Lag
4. Transfer Noise
5-1. Dark Current Reduction
5-2. New Diffusion Current Model Including Non-Uniformity
5-3. Recent Approaches for Dark Current Reduction
6. Vertical Overflow Drain (VOD) Shutter with PPD
7. Visible Light Photon Counting Image Sensors
8. Conclusion
Contents
©2016 N. Teranishi
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1. Introduction
2. Pinned Photodiode (PPD) Structure and Effects
3. Image Lag
4. Transfer Noise
5-1. Dark Current Reduction
5-2. New Diffusion Current Model Including Non-Uniformity
5-3. Recent Approaches for Dark Current Reduction
6. Vertical Overflow Drain (VOD) Shutter with PPD
7. Visible Light Photon Counting Image Sensors
8. Conclusion
Contents
©2016 N. Teranishi
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P+ P+P+ N
TG
P-Well
N-Substrate
N
PPD 1. The P+ pinning layer prevents the interface from being depleted, and stabilizes the PD electrically. Low dark current Large saturation High sensitivity Electronic shutter
x x xx x
Signal
PPD Structure and Advantages
PinningLayer
0V
Pote
ntia
l
ON
OFF
FD
2. Complete charge transfer No image lag No transfer noise
x: GR center
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1. Introduction
2. Pinned Photodiode (PPD) Structure and Effects
3. Image Lag
4. Transfer Noise
5-1. Dark Current Reduction
5-2. New Diffusion Current Model Including Non-Uniformity
5-3. Recent Approaches for Dark Current Reduction
6. Vertical Overflow Drain (VOD) Shutter with PPD
7. Visible Light Photon Counting Image Sensors
8. Conclusion
Contents
©2016 N. Teranishi
ψTG
8Cause of Image Lag in Conventional PN PDs (1)
P+ P+N
TG
PN
PD
0V
Pote
ntia
l
FD+ + Subthreshold
current
VPD
)(~ PDTGGS VV TV
Ilog
The driving force is ψTG − VPD, or VGS.(ψTG : TG channel potential)
Step 1. At first, TG operates in the saturation region.Step 2. A few ns later, it enters the subthreshold region.
The subthreshold region causes image lag and transfer noise.
(m = 1 + CD / CG)
©2016 N. Teranishi
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Time evolution of VPD is governed by the equation of continuity;
is derived as
CPD: PD capacitancem: 1+CD/CGI0 : constant
(nsig: signal electron number)
Causes of Image Lag in Conventional PN PDs (2)
=
when >>1 and n>>1
The nth frame lag, nlag(n), is obtained with
©2016 N. Teranishi
10Image Lag in Conventional PN PDs (3)
(N. Teranishi et al., IEDM, 1982)
Long tail image lag
Saturation
The subthreshold model matches the measurements!
1st Frame
2nd Frame
3rd Frame
Frame Number
©2016 N. Teranishi
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P+ P+P+ N
TG
PN
PPD xxx
Causes of Image Lag in PPDs (1)
0V
Pote
ntia
l
FD
(A) Small electric field
(B) Barrier at the PD edge
- -
--
(D) Pump back when the signal is large
Off
(C) Pocket at the TG edge
--
-
- -
(E) Traps at the TG interfaceOn the next slide.
+
CBarrier
On
OnOn
On
Off
©2016 N. Teranishi
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P+ P+P+ N
TG
PN
PPD xxx FD
(E) Traps at the TG interfaceIf the electron transfer path touches the interface, some electrons are captured by traps.- Some of them are detrapped in the following frames, causing lag.- Some of them are annihilated, causing non-linearity.
Signal electrons at PPD
Out
put e
lect
rons Ideal case
With traps
- The signal electron annihilation exhibits this kind of non-linearity.- A buried transfer path is needed to suppress these phenomena.
x : Traps at the TG interface
Causes of Image Lag in PPDs (2)
©2016 N. Teranishi
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1. Introduction
2. Pinned Photodiode (PPD) Structure and Effects
3. Image Lag
4. Transfer Noise
5-1. Dark Current Reduction
5-2. New Diffusion Current Model Including Non-Uniformity
5-3. Recent Approaches for Dark Current Reduction
6. Vertical Overflow Drain (VOD) Shutter with PPD
7. Visible Light Photon Counting Image Sensors
8. Conclusion
Contents
©2016 N. Teranishi
14Transfer Noise in Conventional PN PDs (1)
The equation of continuity is
Average Noise
: Noise, δ (3)The procedure to calculate the transfer noise is
Step 1: Obtain VPDa(t).Step 2: Obtain Vn(t).Step 3: Obtain the variance, <Vn
2> .
(1)
+ (2)CPD: PD capacitancem: 1+CD/CGI0 : constant
©2016 N. Teranishi
15Transfer Noise in Conventional PN PDs (2)
Transfer noise, <Vn2>, is obtained as
(4)
Not an exponential decay, and the convergence is slow.
©2016 N. Teranishi
16Transfer Noise in Conventional PN PDs (3)
When (5)
Caution: - This convergence is very slow, and the initial noise decay is
also slow.- If the TG ON period is 1 μs, we should not use this limit.
We should use (4) and calculate the value at t = 1 μs, considering the initial condition.
©2016 N. Teranishi
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1. Introduction
2. Pinned Photodiode (PPD) Structure and Effects
3. Image Lag
4. Transfer Noise
5-1. Dark Current Reduction
5-2. New Diffusion Current Model Including Non-Uniformity
5-3. Recent Approaches for Dark Current Reduction
6. Vertical Overflow Drain (VOD) Shutter with PPD
7. Visible Light Photon Counting Image Sensors
8. Conclusion
Contents
©2016 N. Teranishi
18Dark Current Reduction Mechanism by SRH (1)
kTEEnpn
npnNvUit
i
itth
cosh2
2
(Sze: “Semiconductor Devices,”Chap. 1 Eq.(59))
1. If depleted, n, p≪ ni
kTEEn
nNvUit
i
itth
cosh2
2
Assuming pn
2i
tthn
NvU
2. If not depleted, p ≫ ni ≫ n,
22
pn
Nvp
npnNvU i
tthi
tth
Schockley-Read-Hall ProcessU: Recombination Rate
When Et= Ei where U is maximum, then,
Small dark current !
Large dark current !
PPDs configure this non-depleted situation!
(1)
(2)
(3)
©2016 N. Teranishi
19Dark Current Reduction Mechanism by SRH (2)
(1) Estimate the interface dark current reduction ratio, assuming that:- Hole density (p) at the P+ pinning layer: 1017 cm-3
- Intrinsic carrier density, ni: 1.45 ✕ 1010 cm-3
72 10~
22
DepleteddepletedNot
iitth
itthnp
pnNvnNv
UU
(2) Dark current comparison by image sensors.Non-PPD (1982) PPD (2012) Unit
Scheme CCD FSI CMOSPixel size 23 x13.5 1.12 x 1.12 μmDark current 1,300 5.6 e-/s/μm2 at 60℃
0.4 %
©2016 N. Teranishi
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PPDConventional PD
If the dark current is reduced, the dark current FPN and dark current shot noise will also be reduced.
Example of Dark Current Reduction (1)
The dark current FPN is suppressed, therefore, picture quality is much improved.
©2016 N. Teranishi
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1. Introduction
2. Pinned Photodiode (PPD) Structure and Effects
3. Image Lag
4. Transfer Noise
5-1. Dark Current Reduction
5-2. New Diffusion Current Model Including Non-Uniformity
5-3. Recent Approaches for Dark Current Reduction
6. Vertical Overflow Drain (VOD) Shutter with PPD
7. Visible Light Photon Counting Image Sensors
8. Conclusion
Contents
©2016 N. Teranishi
22
Incident Light
N
N
P+
××××
×
× ××
×
××
×
×
PD FD
TG
A Question About the Dark Current Reduction Mechanism
Even if the P+ pinning layer neutralizes the interface states, the N-type PD is still depleted nearby the P+ pinning layer. The assumption of “spatial uniformity,” which is implicitly used in SRH,is not realistic!
The N-type PD is depleted.
To understand the effects and limitations of PPDs, a new, correct model is needed.
4Tr CMOS Sensor Cross Section
©2016 N. Teranishi
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xxn
GR Centers
Modified Diffusion Current Model:・ 1-Dim (Along )・ Put the GR centers at x= - xGR in the neutralized region.・ Assume still “stationarity,” but no more “spatial uniformity.”・ No electric field in the neutralized region. Low injection.・ Use the same notation of Sze’s “Semiconductor Devices.”
N
N
P+
××××
×
× ××
×
××
×
×
PD FD
TG
A New Model Including Non-Spatial-Uniformity
×××
-xp-xGR
Depleted
N-PDP+-Pinning layer
××
×××
×
×
××××××
×
××× Neutralized Neutralized
New Model
V
©2016 N. Teranishi
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Introduce the GR centers’ effect into the diffusion equation:
・ G: Intensity of the GR Centers. Unit is 1/cm. GLn is a dimensionless parameter for the GR centers’ intensity.
New Diffusion Current Model with GR Center
(3)0)()( 00
2
2
GRppn
n
pppn xxnnGD
nn
x
nD
(4)
・ At x = - xGR, the GR centers force np toward np0, the equilibrium.
Boundary Conditions:・ Same as in the diffusion current model without GR centers
0pp nn xatkTqV
pp enn 0 pxx at (5)
nnn DL : Diffusion Length
©2016 N. Teranishi
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)1()( 0)0( kTqV
n
pnpn e
LnqD
xJ
Diffusion Current (Dark Current) without GR Centers
(6)
(7)
Derived Solution
Diffusion Current (Dark Current) with GR Centers
EDCF: Extra Dark Current Factor
(8)npGR Lxxnn
n
eGLGL
GLEDCF )(1
1
GLn: Dimensionless Parameter for the GR Centers’ Strength
EDCFxJxJ pnpGR
n )()( )0()(
where
nnn DL : Diffusion Length
©2016 N. Teranishi
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0.1 1 10 100 10000
2
4
6
8
10
GR Centers’ Intensity,
ED
CF
0.1
0.2
0.51
2
nGL
Characteristics of the New Diffusion Current Model
When GLn→∞, then,npGR Lxxe
EDCF )(1
1
No divergence; instead, saturation.kTE
nGR
ngeJJ )0()(
When (xGR − xp)/Ln = 0, GR centers become notneutral; EDCF = GLn+ 1
Ln
xGR-xp
When GLn→ 0, Jn(GR) → Jn
(0)
Reasonable.
Temperature dependence:
When (xGR − xp)/Ln →∞, EDCF → 1.The GR centers’ effect becomes negligible.
= 0
©2016 N. Teranishi
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4
6
8
10
EDC
F
GLn=1000100
10
10.10
When (xGR − xp)/Ln → 0, EDCF increases, because the GR centers’ position approaches the depletion region.
Characteristics of New Diffusion Current Model (2)
When (xGR− xp)/Ln →∞, EDCF → 1.The GR centers’ effect becomes negligible.
1.51
4
6
4
8
6
4
10
8
6
4
2
EDC
F
10
8
6
4
00 20.5
GR Centers’ position, (xGR− xp)/Ln
When GLn→ 0, Jn(GR) → Jn
(0)
Reasonable.
©2016 N. Teranishi
28Is the P+ Pinning Layer Thickness Sufficient?
・ How large is the diffusion length, Ln, in the P+ pinning layer?・ The surface dead zone depth, L1, might be a good alternative for Ln.・ L1 is derived from the spectral response, to be ~0.08 μm.・ P+ pinning layer thickness ≈ 0.05 – 0.5 μm
The GR centers at the silicon surface possibly contribute to the dark current! We should reduce the GR centers.
(SONY ICX658ALA data sheetPixel size: 6.35 x 7.4 um)
Dep
th
Surface dead zone
Sensitive zone(Depleted zone)
Deep dead zone(PD thickness is limited byP+ substrate, orVOD barrier)
L1
L2
Light intensity
x: GR center
xx x
Incident light
©2016 N. Teranishi
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1. Introduction
2. Pinned Photodiode (PPD) Structure and Effects
3. Image Lag
4. Transfer Noise
5-1. Dark Current Reduction
5-2. New Diffusion Current Model Including Non-Uniformity
5-3. Recent Approaches for Dark Current Reduction
6. Vertical Overflow Drain (VOD) Shutter with PPD
7. Visible Light Photon Counting Image Sensors
8. Conclusion
Contents
©2016 N. Teranishi
30Macroscopically Flattening
Itonaga et al. (Sony), IEEE IEDM, 2011
No isolation grooves/ridges and no substrate etching as in STI Less process damage, less stress and no STI side surface.
Dark CurrentStructure of “FLAT,” comparing with STI
STI
©2016 N. Teranishi
31Atomically FlatteningKuroda et al. (Tohoku Univ.); “Highly Ultraviolet Light Sensitive and High Reliable Photodiode with Atomically Flat Si Surface”
AFM ImagesTypical (100) after RCA Cleaning.
Atomically Flat (100).Atomic step is 0.135nm.
・ Atomically flat surfaces reduce GR centers/traps.
N+PN PD
- Low Dark Current, High QE for UV at PD.- Low 1/f noise at MOS Tr.
©2016 N. Teranishi
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1. Introduction
2. Pinned Photodiode (PPD) Structure and Effects
3. Image Lag
4. Transfer Noise
5-1. Dark Current Reduction
5-2. New Diffusion Current Model Including Non-Uniformity
5-3. Recent Approaches for Dark Current Reduction
6. Vertical Overflow Drain (VOD) Shutter with PPD
7. Conclusion
Contents
©2016 N. Teranishi
33Vertical Overflow Drain (VOD) Shutter
For Anti-blooming and electronic shutter・ The VOD is used in CCD image sensors・ TG is used as LOD (lateral overflow drain) in CMOS image sensors.
Blooming Electronic Shutter(Object is rotating at 720 rpm.)
1/60 s 1/125 s 1/250 s
1/500 s 1/1000 s 1/2000 s
©2016 N. Teranishi
34VOD Structure and Mechanism
P+ P+P+ N
TG
P-Well(Barrier)
N-Substrate
N-PD
PPD
PinningLayer
VCCD
Low Voltage
High Voltage
C1
P+ Pinning Layer
N-PD
P-Well (Barrier)
N-Substrate
Excess electrons
All electrons
Pixel cross section Potential profile along the blue line
e-
e- VWell
VPD
©2016 N. Teranishi
35High Speed Shutter (1)
Definitions・ High speed shutter: Short exposure time / sharp shutter・ High speed camera: High frame rate
Motivations of high speed shutter・ High speed motion capture, ToF, fluorescence life time imaging.・ Replace the streak tube and gated image intensifier.
Shutter speed is limited by:(1) Photo-generated carrier collection time into the PD storage region.(2) Driving pulse delivery time, C ✕ R.(3) Carrier transferring time from the PD storage to analogue memory
in the pixel.
・ The VOD shutter mechanism with PPD has a merit on item (2).
©2016 N. Teranishi
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VOD shutter・ Substrate capacitance
dSKCSub
0Si
High Speed Shutter (2) --- Load Capacitance ---
where,KSi: Si dielectric constantε0: Permittivity in vacuumS: Area, d: distance (depletion thickness)
For example, 1/3 inchS = 28 mm2
d = 7.5 μmCsub = 400 pF
LOD shutter・ Gate capacitance, Cgate,+ parasitic capacitance of wires, Cwire
tWLKNC Gate
0SiO2pixel
where, Npixel: Pixel numberKsio2: SiO2 dielectric constantW: Channel width, L: Channel length, t: Gate SiO2 thickness
For example, Npixel = 1.3 M,W = L = 0.4 μm, t = 6 nm
CGate = 1,200 pF CWire = ?
The load capacitance of the VOD shutter is smaller than that of the LOD shutter.
©2016 N. Teranishi
37High Speed Shutter (3) --- Parasitic Resistance
・ A small parasitic resistance and small variations of the parasitic resistance are achieved with (b) backside feeding.
・ A skew smaller than the measurement accuracy limit (0.2 ns).
Two methods for driving pulse delivery: (a) From the periphery (b) From the backside
(E. Tadmor et al., 2014 IEEE Sensors)
N-substrate
©2016 N. Teranishi
38
1. Introduction
2. Pinned Photodiode (PPD) Structure and Effects
3. Image Lag
4. Transfer Noise
5-1. Dark Current Reduction
5-2. New Diffusion Current Model Including Non-Uniformity
5-3. Recent Approaches for Dark Current Reduction
6. Vertical Overflow Drain (VOD) Shutter with PPD
7. Visible Light Photon Counting Image Sensors
8. Conclusion
Contents
©2016 N. Teranishi
Visible Light Photon Counting Image Sensor
SPAD (Single photon avalanche diode)
4-Tr CMOS + High conversion gain +CMS (Correlated multiple sampling)
(N. Dutton et al., VLSI Symposium 2014)
n=0
n=1 n=2
n=3
n=4
n=5n=6
n=7
・ QVGA (320x240 pixel) SPAD, 20 fps, at room temperature, at night
・ High avalanche gain makes followingcircuit noise negligible.・ Large dark count. Small fill factor
・ In 2015, several organization reportedlow noise < 0.3 e- rms.
ref. DEPFET (Max Plank) uses CMS.
39
(MW. Seo, S. Kawahito et al., IEEE EDL 2015)
128 samplings
©2016 N. Teranishi
40
1. Introduction
2. Pinned Photodiode (PPD) Structure and Effects
3. Image Lag
4. Transfer Noise
5-1. Dark Current Reduction
5-2. New Diffusion Current Model Including Non-Uniformity
5-3. Recent Approaches for Dark Current Reduction
6. Vertical Overflow Drain (VOD) Shutter with PPD
7. Conclusion
Contents
©2016 N. Teranishi
41Conclusion
1. The PPD is a primary technology for CCD and CMOS image sensors.It exhibits low noise, low dark current, no image lag, large saturation, high sensitivity, and allows electronic shutter operation.
2. Conventional non-PPDs have long tail lag and transfer noise.
3. A new diffusion dark current model considering the GR centers is proposed. If the P+ pinning layer is thin compared with diffusion length, they contribute to the dark current.The temperature dependence is .
4. Both macroscopiccally and atomically flatness of the silicon surface reduce the dark current.
5. VOD shutters with PPDs are capable of high speed shutter operation.
kTEGRn
geJ )(