Parul Polytechnic Institute
description
Transcript of Parul Polytechnic Institute
![Page 1: Parul Polytechnic Institute](https://reader036.fdocuments.in/reader036/viewer/2022082612/568139f5550346895da1b224/html5/thumbnails/1.jpg)
Parul Polytechnic Institute
Subject Code : 3330705
Name Of Subject : Microprocessor and assembly language
programming
Name of Unit : Introduction to microprocessor
Topic : Multiplexed address and data bus
Name of Faculty : H.M.Avaiya & N.D.Dhameliya
Name of Students: (i) Parekh Krishna(038)
(ii) Shah Rutu(054)
![Page 2: Parul Polytechnic Institute](https://reader036.fdocuments.in/reader036/viewer/2022082612/568139f5550346895da1b224/html5/thumbnails/2.jpg)
MICROPROCESSOR ARCHITECTUR AND MICROPROCESSOR SYSTEM
![Page 3: Parul Polytechnic Institute](https://reader036.fdocuments.in/reader036/viewer/2022082612/568139f5550346895da1b224/html5/thumbnails/3.jpg)
DEMULTIPLEXING MULTIPLEXED ADDRESS/DATA BUS
![Page 4: Parul Polytechnic Institute](https://reader036.fdocuments.in/reader036/viewer/2022082612/568139f5550346895da1b224/html5/thumbnails/4.jpg)
• The multiplexed address/data bus Ad7-AD0 is used to transfer data and address both.
• In order to perform the read or write operation , the memory device requires to identify memory location which is specified by 16-bit address.
• The higher-order address is available through A15-A8 address lines and lower-order address is available through AD7-AD0.
![Page 5: Parul Polytechnic Institute](https://reader036.fdocuments.in/reader036/viewer/2022082612/568139f5550346895da1b224/html5/thumbnails/5.jpg)
[ FIG : DE MULTIPLEXING OF MULTIPLEX ED ADDRESS DATA BUS.]
![Page 6: Parul Polytechnic Institute](https://reader036.fdocuments.in/reader036/viewer/2022082612/568139f5550346895da1b224/html5/thumbnails/6.jpg)
• The lower-order address must be latched as it is required by the memory device and AD7-AD0lines must be made free to transfer data.
• The ALE signal is used to demultiplex AD7-AD0 as shown in figure.
• During initial period of instruction execution ALE goes high and multiplexed address/data bus AD7-AD0contains lower byte of the 16-bit address.
![Page 7: Parul Polytechnic Institute](https://reader036.fdocuments.in/reader036/viewer/2022082612/568139f5550346895da1b224/html5/thumbnails/7.jpg)
• When ALE goes low, this lower – order address is latched into latch and is made available to the memory device.
• It makes the multiplexed path free for data transfer.
![Page 8: Parul Polytechnic Institute](https://reader036.fdocuments.in/reader036/viewer/2022082612/568139f5550346895da1b224/html5/thumbnails/8.jpg)
THANKYOU