Parallel compressing system for satellite on programmable chip Yifat Manzor Yifat Manzor & Reshef...
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Transcript of Parallel compressing system for satellite on programmable chip Yifat Manzor Yifat Manzor & Reshef...
![Page 1: Parallel compressing system for satellite on programmable chip Yifat Manzor Yifat Manzor & Reshef Dahan Supervisor: Eran Segev Part B.](https://reader035.fdocuments.in/reader035/viewer/2022062407/56649d5c5503460f94a3b1ed/html5/thumbnails/1.jpg)
Parallel Parallel compressing system compressing system
for satellite for satellite on programmable on programmable
chipchip
Yifat Manzor Yifat Manzor & & Reshef Dahan Reshef Dahan
Supervisor: Eran SegevSupervisor: Eran Segev
Part Part BB
![Page 2: Parallel compressing system for satellite on programmable chip Yifat Manzor Yifat Manzor & Reshef Dahan Supervisor: Eran Segev Part B.](https://reader035.fdocuments.in/reader035/viewer/2022062407/56649d5c5503460f94a3b1ed/html5/thumbnails/2.jpg)
SatelliteSatellite image Input image Input Data rateData rate
from one sensor linefrom one sensor line B/W Picture Range – 2.5 km width Velocity - 8 km/sec 4 Pixels per 1m²
Rate = 80 Mpix/sec
Streaming Data 12-bit per pixel
5,000 pix
16,0
00 li
nes/
sec
80 Mpixel image
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System demands:System demands: »» 80Mpix/sec input data rate.80Mpix/sec input data rate.»» Image width – 5000 pixel Image width – 5000 pixel
ADV202ADV202Single compressing chip Single compressing chip capabilities:capabilities: »» 27 Mpix/sec maximum input 27 Mpix/sec maximum input data ratedata rate» 25 MByte/sec maximum output » 25 MByte/sec maximum output rate rate »» Maximum image width – 4096 Maximum image width – 4096 pixel pixel » Maximum image length – infinity» Maximum image length – infinity
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Solution Solution MAIN IDEAMAIN IDEA
To generate parallel
processing by separating the
picture to 3 compressors
1667pix 1667pix 1666pix
3
16,0
00 li
nes
/sec
Tile
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Memory
ADV202ADV202
Data in
System DescriptionSystem Description
camera
XILINX
Virtex2Pro
ADV202modelmodel model
Checksum Generator
Data Generator
RESET
LED
Compressor Compressor Compressor
ControllerSystem
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CONTROLLERCONTROLLER
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CONTROLLER CONTROLLER block diagramblock diagram
Compressed data
Input DataDIVIDER
Compression Unit
Compression Unit
Compression Unit
MERGER
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DividerDivider
DIVIDER
Compression Unit
Compression Unit
MERGER
Compression Unit
![Page 9: Parallel compressing system for satellite on programmable chip Yifat Manzor Yifat Manzor & Reshef Dahan Supervisor: Eran Segev Part B.](https://reader035.fdocuments.in/reader035/viewer/2022062407/56649d5c5503460f94a3b1ed/html5/thumbnails/9.jpg)
Divider Simulation Divider Simulation ResultsResults
![Page 10: Parallel compressing system for satellite on programmable chip Yifat Manzor Yifat Manzor & Reshef Dahan Supervisor: Eran Segev Part B.](https://reader035.fdocuments.in/reader035/viewer/2022062407/56649d5c5503460f94a3b1ed/html5/thumbnails/10.jpg)
compression compression unitunit
DIVIDER
Compression Unit
Compression Unit
Compression Unit
MERGER
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25MHz
Compression unitCompression unit - - ArchitectureArchitecture
27MHz
funnel adv_202model
comp_databuff
Interrupt_generator
From divider
80MHz
8 bits12 bitsTo/from merger
To merger
80MHz
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Compression unit Simulation Compression unit Simulation ResultsResults
![Page 13: Parallel compressing system for satellite on programmable chip Yifat Manzor Yifat Manzor & Reshef Dahan Supervisor: Eran Segev Part B.](https://reader035.fdocuments.in/reader035/viewer/2022062407/56649d5c5503460f94a3b1ed/html5/thumbnails/13.jpg)
mergermerger
DIVIDER
Compression Unit
Compression Unit
Compression Unit
MERGER
compressed data
package
header
OutputOutput:
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MergerMerger - Architecture - Architecture
headergenerator
calculator
80MHz
To/from unit 0
To/from unit 2
To/from unit 1 Compressed output
25MHz
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MergerMerger – Architecture cont – Architecture cont..calculatorcalculator
Interrupt from unit 0
outputgenerator
queuegenerator queue
To\from header generator
Data to/from unit 0
Data to/from unit 1
Data to/from unit 2
80MHz
Interrupt from unit 2
Interrupt from unit 1
25MHz
Compressed output
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Merger Simulation Merger Simulation ResultsResults
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ControllerControllerSimulation ResultsSimulation Results
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Testing EnvironmentTesting Environment
DIVIDER MERGER
Comp.
UnitComp.
UnitComp.
Unit
Virtex2Pro
Generator
Check Results
Memory
Data inSystemSystem
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DIVIDER MERGER
Comp.
UnitComp.
UnitComp.
Unit
Controller
Data Generator
ChecksumGenerator
RESET LED
Virtex2Pro
DCM
Testing EnvironmentTesting Environment
SystemSystem
![Page 20: Parallel compressing system for satellite on programmable chip Yifat Manzor Yifat Manzor & Reshef Dahan Supervisor: Eran Segev Part B.](https://reader035.fdocuments.in/reader035/viewer/2022062407/56649d5c5503460f94a3b1ed/html5/thumbnails/20.jpg)
Simulation ResultsSimulation Results
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SummarySummary
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Summary ContSummary Cont..