Paper Discussion

Reim Doumat & Thomas Watteyne

« Simulation of Soc Architectures »

« Overview of the Ptolemy Project » Jul. 2003

« Modeling and Simulation Issues of Programmable Architectures »

Mar. 2001

« Rapid System-Level Performance Evaluation and Optimization for Application Mapping onto SoC Architecures »

Oct. 2002

« Modeling and Simultaion of Embedded Processors Using Abstract State Machine »

Mar. 2001

3

Introduction to Modeling, Design and

Simulation

General Overview

“Modeling and Simulation of Embedded

Processors Using Abstract State

Machines”

“Rapid System-Level Performance Evaluation

and Optimization for Application Mapping

onto SoC Architectures”

Part IPart I

Introduction to Modeling, Design and Simulation

5

OverviewOverview

I. Introduction

II. Machine and Hardware Description Languages, the LISA example

III. Models of computation, the Ptolemy example

6

Introduction

Push-pull effect

Definitions

MDL, HDL

Computation Models

The push-pull effectThe push-pull effect

System complexity

New applications

Semiconductor technology

Time-to-market!!!!

Designer productivity

7

The push-pull effectThe push-pull effect

• productivity

• re-usability

• flexibility

In embedded system design

Effective design phase

Introduction

Push-pull effect

Definitions

MDL, HDL

Computation Models

8

DefinitionsDefinitions

• Modeling : representing an architecture (mathematical model, constructive model)

• Design : defining an architecture

• Simulation : executable model

Introduction

Push-pull effect

Definitions

MDL, HDL

Computation Models

9

Introduction

MDL, HDL

Why LISA ?

Overview

LISA

Validation

Computation Models

Why LISA ?Why LISA ?

Language for Instruction Set Architecture

Electronic systems

Programmable Architecture

ASIC, DSP… processors

Code generation and simulation tools :

• simulatorsimulator

• assemblerassembler

• linkerlinker

• graphical debuggergraphical debugger

10

Programmable Architecture overviewProgrammable Architecture overview

Hardware(processor)

Operating System

User Application

ex: POSIX

Instruction Set

Hardware Description Langage

(ex : VHDL, Verilog)

Machine Description Language(ex : LISA)

Introduction

MDL, HDL

Why LISA ?

Overview

LISA

Validation

Computation Models

11

LISALISA

LISA processor description

processor model

debugger simulator Simulator compiler assembler linker

GenericProcessor

model

Software developpement environment

Introduction

MDL, HDL

Why LISA ?

Overview

LISA

Validation

Computation Models

12

ValidationValidation

• simulation speedsimulation speed (x1000 instruction/cycles per second)

Use of compilation simulation

LISA VHDL ?

• assembler/linker speedassembler/linker speed

equivalent

Introduction

MDL, HDL

Why LISA ?

Overview

LISA

Validation

Computation Models

13

Introduction

MDL, HDL

Computation Models

« Overview of the Ptolemy Project » Jul. 2003

Computation ModelsComputation Models

14

Ptolemy II - IntroductionPtolemy II - Introduction

Gabriel (1986–1991)

Ptolemy Classic(1990–1997)

Ptolemy II(1996–to date)?

Introduces: - Domain polymorphism- Modal Models

Introduction

MDL, HDL

Computation Models

Introduction

Ptolemy Project

Models

Choosing

Facts

15

Definition: Definition: The project studies- modeling,- simulation, - design of concurrent, real-time, embedded systems

Characteristics:Characteristics:- Components built on top of Java compiler (Soot) - XML as data representation - Concept of migrating models

Ptolemy - IntroductionPtolemy - IntroductionIntroduction

MDL, HDL

Computation Models

Introduction

Ptolemy Project

Models

Choosing

Facts

16

Complete separation of the abstract synthax from the semantics.

• SynthaxSynthax, Actor-Oriented design :

- models, actors, ports, parameters, channels

- represented graphically, XML or by program with specific API

• SemanticsSemantics, the “physical laws” :

- models constructed under model of computation- choice of model of computation has deep impact on implementation

- interoperability of executable models

- hierarchical mix of domains

Ptolemy ProjectPtolemy ProjectIntroduction

MDL, HDL

Computation Models

Introduction

Ptolemy

Models

Choosing

Facts

17

Introduction

MDL, HDL

Computation Models

Introduction

Ptolemy

Models

Choosing

Facts

Example of the actor oriented designExample of the actor oriented design

18

Introduction

MDL, HDL

Computation Models

Introduction

Ptolemy

Models

Choosing

Facts

Ptolemy II- Modeling and DesignPtolemy II- Modeling and Design

19

Ptolemy – Modeling & DesignPtolemy – Modeling & Design

Focus on: - Embedded software - Actor oriented design (Version 4.0.1)- Architecture Design

1) Components designed to be domain polymorphic2) Interaction mechanisms among domains 3) Development of a meta-model describing

models of computation

Introduction

MDL, HDL

Computation Models

Introduction

Ptolemy

Models

Choosing

Facts

20

Models of ComputationModels of Computation

• At least 12 different models of computation

• Variety of models because :

time (continuous, discrete, causal)

concurency, interactions

different underlying mathematical models

Introduction

MDL, HDL

Computation Models

Introduction

Ptolemy

Models

Choosing

Facts

21

• Component Interaction (Demand-Driven, e.g. Web Browsers)

• Communication Sequential Processes (use of rendez-vous)

• Continuous Time

• Discrete-Events

• Distributed Discrete Events

• Discrete Time

• Finite-State Machines

• Process Networks

• Synchronous Dataflow

• Giotto (hard real time)

• Synchronous/reactive

• Timed Multitasking

Models of ComputationModels of ComputationIntroduction

MDL, HDL

Computation Models

Introduction

Ptolemy

Models

Choosing

Facts

22

Choosing a Model of ComputationChoosing a Model of Computation

• Most designer faced to only one or two

• Choice is very important (time, event, etc.)

Unifying not possible ... (complex)

Introduction

MDL, HDL

Computation Models

Introduction

Ptolemy

Models

Choosing

Facts

23

• Core packages: support data model and actor model

• User Interface packages: support XML file format (MoML)• Library packages: define actors to be domain polymorphic • domains : subpackages of ptolemy domains package

Introduction

MDL, HDL

Computation Models

Introduction

Ptolemy

Models

Choosing

Facts

Ptolemy II –What’s the Architecture?Ptolemy II –What’s the Architecture?

24

Introduction

MDL, HDL

Computation Models

Introduction

Ptolemy

Models

Choosing

Facts

Ptolemy II – some capabilitiesPtolemy II – some capabilities

•Higher level concurrent design in Java•Better modularization through the use of packages•Complete separation of the abstract syntax from the semantics•Domain-polymorphic actors

25

Ptolemy in factsPtolemy in facts• 3rd generation : Ptolemy II

• Java as a programming language

• Visual synthax

• Set of packages

Introduction

MDL, HDL

Computation Models

Introduction

Ptolemy

Models

Choosing

Facts

Part IIPart II

“Rapid System-Level Performance Evaluation and Optimization for Application Mapping onto SoC

Architectures”October 2002

Sumit Mohanty, Viktor K. Prasanna

27

IntroductionIntroduction

GenM

HiPerE

MILAN

Evaluation& optimization of performance

During application design

Estimation at the system level

Estimation of specific component performance

Introduction

GenM

HiPerE

MILAN

conclusion

28

Introduction

GenM

HiPerE

MILAN

conclusion

GenGeneric eric MModel for Application Mapping odel for Application Mapping onto SoC Architectureonto SoC Architecture

Components of the GenM Model

DVS (Dynamic Voltage Scaling)

29

Introduction

GenM

HiPerE

MILAN

conclusion

Why to use GenM?Why to use GenM?

• Rapid estimation of performance.

•Development of efficient application designs (High Level abstraction).

•Development of optimization techniques for mapping application onto SoC architecture.

30

Introduction

GenM

HiPerE

MILAN

conclusion -system-level performance estimation

HiPerE (HiPerE (HiHigh-Level gh-Level PerPerformance formance EEstimator)stimator)

HiPerE

GenM (Target SoC architecture)

Performance parameters

Application Task Graph

Estimation of System-level energy & latency

Activity Report for Each component in the target

architecture

-Interpretive simulator

31Component specific Performance Estimation using MILAN

Component Specific Performance EstimationComponent Specific Performance EstimationMILAN(MILAN(MModel based odel based IIntegrated simuntegrated simuLALAtiotioNN

MILANMILAN

Application Model

Resource Model

ProgramImplementing

The Task

Low-levelsimulator

ComponentSpecific

Estimates Feed

back

Sourcecode

Con

figur

e

Update Energy And Latency

Estimates

Introduction

GenM

HiPerE

MILAN

conclusion

32

Introduction

GenM

HiPerE

MILAN

conclusion

Performance estimation includes?Performance estimation includes?

•Cost for execution

•Data access

•Memory activation

•reconfiguration

33

Application Optimization Using MILANApplication Optimization Using MILAN

Hierarchical Simulation for DES in MILAN

Introduction

GenM

HiPerE

MILAN

conclusion

34

    

    

Application Optimization Using MILANApplication Optimization Using MILANIntroduction

GenM

HiPerE

MILAN

conclusion

35

Introduction

GenM

HiPerE

MILAN

conclusion

ConclusionConclusion

By using (GenM,HiPerE,MILAN) solve these problems:

•Estimation of system-level performance for SoC architectures.

•Lack of high-level abstraction for SoC architectures.

•Lack of standard interface between different component simulators.

Part IIIPart III

“Modeling and Simulation of Embedded Processors Using Abstract State Machines”

March 2001

Dirk Fischer, Jurgën Teich, Ralph Weper

37

OverviewOverview

I. Architecture/compiler co-design

II. Abstract State Machines

III. The BUILDABONG project

IV. Paper’s Interest

I. Architecture/Compiler co-design

in ASIPs

39

The needsThe needs

“ - ASIP ASAP ? ”

Application Specific Instruction

Set Processors

As soon as possible

ASIP ASAP

• customized processors

• special applications (signal processing…)

• time to market

• optimal application/processor tradeoff

co-design

Needs

Process

Related work

ASMs

BUILDABONG

Interest

40

ProcessProcess

• Simple instruction set

• Complex application

• complex instruction set

• simple application

More computation time, more memory

More design / manufacturing process

costs

Application

Processor Exploration Simulation

Architecture/compiler co-design

co-design

Needs

Process

Related work

ASMs

BUILDABONG

Interest

41

work on architecture/compiler co-designwork on architecture/compiler co-design

• LISA University of Aachen, Germany

Compiled simulator 100K instructions per second

• CASTEL

VHDLRTL DATA PATH MODELextended FSM

• EXPRESSION University of California, USA

V-SATGraphical Design

Environment

EXPRESSION

model

Retargetable compiler

Cycle accurate simulator

co-design

Needs

Process

Related work

ASMs

BUILDABONG

Interest

II. Abstract State Machines

43

The MathematicsThe Mathematicsco-design

ASMs

Mathematics

Modeling

Advantages

BUILDABONG

Interest

universe

• Functions

• Relations

== ?

< ?

== ?

>= ?

== ?

> ?

<= ?

structure Algebra

44

The MathematicsThe Mathematicsco-design

ASMs

Mathematics

Modeling

Advantages

BUILDABONG

Interest Μ = (V, f1, f2, … , fn)

Finite vocabulary

Finite set of n-ary functions over V

(State of M ≡ algebra over V )

Abstract State Machine

Initial state SS00 + set of transition rules PP = ASM

45

The MathematicsThe Mathematicsco-design

ASMs

Mathematics

Modeling

Advantages

BUILDABONG

Interest

Transition Rule

If

<cond>

then

<Rule>

endif Update rulef(t1, t2, … , tn) := t

No relations boolean value

46

The MathematicsThe Mathematicsco-design

ASMs

Mathematics

Modeling

Advantages

BUILDABONG

Interest

Operationnal semantics

Si Si+2 Sn

R

state

Update rule

Si+1

R R

Terminal state

No cycling…

47

Modeling processors with ASMsModeling processors with ASMsco-design

ASMs

Mathematics

Modeling

Advantages

BUILDABONG

Interest

• cycle accurate model, register transfer level

• a register tranfer is conditionned (mode registers, instruction bits)

• “guarded register transfer paterns” (Leupers)

If

<register_transfer_condition>

then

<register_transfer_pattern>

endif

ASMs

48

AdvantagesAdvantagesco-design

ASMs

Mathematics

Modeling

Advantages

BUILDABONG

Interest

• short description (ARM7, 200 lines XASM)

• readability

• cycle accuracy

• simulation speed (?)

• XASM environment supports C-libraries (irregular arithmetic operations on arbitrary large word-lengths)

• “natural” mathematical tool

III. The BUILDABONG project

50

General ViewGeneral View

ASM

Simulator Generator(Gem-Mex)

Simulator

Retargetable Compiler

ParserLinkerLoader

ArchitectureComposer

ASM Generator

AssemblerProgram library

Instruction SetDescription

ANSI CProgram

Explorer

Graphicalinput

co-design

ASMs

BUILDABONG

General view

Editor

XASM

Simulator

Future work

Interest

51

Graphical Architecture EditorGraphical Architecture Editorco-design

ASMs

BUILDABONG

General view

Editor

XASM

Simulator

Future work

Interest

• libraries

• hierarchical

52

XASM-code generationXASM-code generationco-design

ASMs

BUILDABONG

General view

Editor

XASM

Simulator

Future work

Interest

53

XASM-code generationXASM-code generation

Library include

co-design

ASMs

BUILDABONG

General view

Editor

XASM

Simulator

Future work

Interest

54

XASM-code generationXASM-code generation

Function declaration

co-design

ASMs

BUILDABONG

General view

Editor

XASM

Simulator

Future work

Interest

55

XASM-code generationXASM-code generation

Sequential element initialization

co-design

ASMs

BUILDABONG

General view

Editor

XASM

Simulator

Future work

Interest

56

XASM-code generationXASM-code generation

Guarded update rules (memory and registers)

?

co-design

ASMs

BUILDABONG

General view

Editor

XASM

Simulator

Future work

Interest

57

Automatic Simulator GeneratorAutomatic Simulator Generatorco-design

ASMs

BUILDABONG

General view

Editor

XASM

Simulator

Future work

Interest

?

58

To-Do list…To-Do list…co-design

ASMs

BUILDABONG

General view

Editor

XASM

Simulator

Future work

Interest

ASM

Simulator Generator(Gem-Mex)

Simulator

Retargetable Compiler

ParserLinkerLoader

ArchitectureComposer

ASM Generator

AssemblerProgram library

Instruction SetDescription

ANSI CProgram

Explorer

Graphicalinput

IV. The paper’s interest

60

CriticismCriticismco-design

ASMs

BUILDABONG

Interest• meets the demand

• structured project

• « natural » modeling tool

• but proprietary graphical language

• openings

Fine-tuning of the compiler (different needs)

Conversion tools with HDLs