P89LPC920/921/922 80C51 8-bit microcontroller with two ... · PDF file80C51 8-bit...

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  • INTEGRATED CIRCUITS

    P89LPC920/921/92280C51 8-bit microcontroller with two-clock core2 KB/4 KB/8 KB 3 V low-power Flash with 256 Byte RAM

    USERMANUAL

    2003 Dec 8

  • Philips Semiconductors User Manual - Subject to Change

    P89LPC920/921/92280C51 8-bit microcontroller with two-cycle instructions2KB/4KB/8KB Flash with 256 Byte RAM

    2003 Dec 8 2

  • Philips Semiconductors User Manual - Subject to Change

    P89LPC920/921/922

    Table of Contents1. General Description................................................................................... 9

    Pin configuration...................................................................................................... 920-Pin TSSOP, DIP Package.................................................................................. 9Logic symbol............................................................................................................ 9Pin Descriptions....................................................................................................... 11Special Function Registers...................................................................................... 14Memory organization ............................................................................................... 18

    Data RAM arrangement................................................................................ 192. Clocks........................................................................................................ 21

    Enhanced CPU........................................................................................................ 21Clocks...................................................................................................................... 21Clock definitions ...................................................................................................... 21

    Oscillator clock (OSCCLK) ........................................................................... 21Low speed oscillator option .......................................................................... 21Medium speed oscillator option .................................................................... 21High speed oscillator option.......................................................................... 21

    Clock output............................................................................................................. 21On-chip RC oscillator option.................................................................................... 22Watchdog oscillator option ...................................................................................... 22External clock input option....................................................................................... 23Oscillator Clock (OSCCLK) wakeup delay .............................................................. 23CPU Clock (CCLK) modification: DIVM register...................................................... 23Low power select..................................................................................................... 24

    3. Interrupts ................................................................................................... 25Interrupt priority structure ........................................................................................ 25External Interrupt pin glitch suppression ................................................................. 26

    4. I/O Ports .................................................................................................... 29Port configurations................................................................................................... 29Quasi-bidirectional output configuration .................................................................. 29Open drain output configuration .............................................................................. 30Input-only configuration ........................................................................................... 31Push-pull output configuration ................................................................................. 31Port 0 analog functions............................................................................................ 31Additional port features............................................................................................ 32

    5. Power Monitoring Functions ...................................................................... 33Brownout Detection ................................................................................................. 33Power-on Detection ................................................................................................. 34Power reduction modes........................................................................................... 34

    6. Reset ......................................................................................................... 39Reset vector ............................................................................................................ 40

    7. Timers 0 and 1........................................................................................... 41

    2003 Dec 8 3

  • Philips Semiconductors User Manual - Subject to Change

    P89LPC920/921/922

    Mode 0..................................................................................................................... 42Mode 1..................................................................................................................... 42Mode 2..................................................................................................................... 43Mode 3..................................................................................................................... 43Mode 6..................................................................................................................... 43Timer overflow toggle output ................................................................................... 46

    8. Real-Time Clock/System Timer................................................................. 47Real-time Clock source ........................................................................................... 47Changing RTCS1-0 ................................................................................................. 47Real-time Clock interrupt/wake up........................................................................... 48Reset sources affecting the Real-time Clock........................................................... 48

    9. UART......................................................................................................... 51Mode 0..................................................................................................................... 51Mode 1..................................................................................................................... 51Mode 2..................................................................................................................... 51Mode 3..................................................................................................................... 51SFR space............................................................................................................... 51Baud Rate Generator and selection ........................................................................ 52Updating the BRGR1 and BRGR0 SFRs ................................................................ 52Framing Error .......................................................................................................... 53Break Detect............................................................................................................ 53More about UART Mode 0....................................................................................... 55More about UART Mode 1....................................................................................... 56More about UART Modes 2 and 3........................................................................... 57Framing Error and RI in Modes 2 and 3 with SM2 = 1 ............................................ 57Break Detect............................................................................................................ 57Double buffering ...................................................................................................... 58Double buffering in different modes......................................................................... 58Transmit interrupts with double buffering enabled (Modes 1, 2 and 3) ................... 58The 9th bit (bit 8) in double buffering (Modes 1, 2 and 3)........................................ 59Multiprocessor communications .............................................................................. 60Automatic address recognition ................................................................................ 60

    10. I2C interface ............................................................................................ 63I2C Data register ..................................................................................................... 64I2C Slave Address register...................................................................................... 64I2C Control register ................................................................................................. 64I2C Status register................................................................................................... 66I2C SCL Duty Cycle registers I2SCLH and I2SCLL ................................................ 66I2C operation mode.............................................................................................