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I2CRF: Incremental Interconnect Customization for Embedded Reconfigurable
FabricsJonghee W. Yoon, Jongeun Lee*, Jaewan Jung, Sanghyun Park,
Yongjoo Kim, Yunheung Paek and Doosan Cho**Seoul National University, Korea
*UNIST, Korea**Sunchon National University, Korea
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2Udo KebschullUniversity of Heidelberg
Outline• CGRA & Augmentation• Overall Design Flow• Our Approach (I2CRF)
• Problem definition(Inexact graph matching)• Mapping with A* search
• Experiment• Conclusion
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3Udo KebschullUniversity of Heidelberg
Reconfigurable Architecture• Reconfiguration is emerging
• increasing needs for flexible and high speed computing fabrics
• CGRAs (Coarse-Grained Reconfigurable Architectures)
• operation level granularity• high performance• S/W development is easy
MorphoSys ADRES
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4Udo KebschullUniversity of Heidelberg
Augmentation• General CGRA - Mapping
• CGRA Arch. + Applications Configurations• Application specific CGRAs - Synthesis
• Applications New Arch. + Configurations• Augmentation
• Base CGRA + Applications New Arch.+Configurations• Customizable Features
• The number of PEs• The set of PE operation• Heterogeneity or Homogeneity• Memory subsystem architectures• Interconnection network
Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures, TVLSI 200914% (130nm) 30%(45nm)
Energy consumption
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5Udo KebschullUniversity of Heidelberg
Overall design flow - I2CRF
Kernel
Evaluation
Application-Specific Reconfigurable Architecture
Arch ExtensionMapping (A* Search for Minimum-Cost Edit
Path)+(Accum.)
I2CRF (Incremental Interconnect Customization for Reconfigurable Fabrics )
Base CGRA
Interconnections
Not Satisfied
Vertex Clustering
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6Udo KebschullUniversity of Heidelberg
I2CRF• Incremental architecture change by adding
interconnections to the base architecture• Strengths
• Regularity is maintained through the base architecture
• But provides specialization for the target applications
• Fast specialization and no limitation for design space
• The architecture change occurs while kernel is mapped.
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7Udo KebschullUniversity of Heidelberg
The difference Compared with general mapping
PE 1
PE 2
PE 3
PE 4
PE 5
PE 6
1
6
3
4 5
2
1 2
6
43
• Existing application mapping for CGRA • Find a graph X C that is isomorphic to K
• Augmentation and Mapping• Find the a graph Y that is isomorphic to K and a subset of C`
which is most similar to C
Kernel graph, K Base CGRA graph, C
5×
1 2
6
43
5
General Mapping
Augmentation and Mapping
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8Udo KebschullUniversity of Heidelberg
Problem Definition - Inexact Graph Matching Problem
• How to find C which is most similar to C0 : Inexact graph matching• Similarity between two graph can be measured by calculating the
cost of graph edit path• Edit path is the set of edit operations that transform G1 into
another G2• Edit operations
– Node(or edge) substitution : NS, ES ( identical or non-identical )– Node(or edge) insertion : NI, EI– Node(or edge) deletion : ND, ED– All the other edit operations are induced by Node substitution.
1 2
3 5
6 7
4
a b c
d e f
g h i
NS1 e2 a3 h4 d5 b6 g7 f
e1
a2
h3
b5
g6
d4 f7
Identical ESNon-identical ES & NI
ED EI<G1> <G2>
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9Udo KebschullUniversity of Heidelberg
Graph Edit Cost Model• Ce - The cost of Edge deletion
• Interconnection insertion cost• Cv - The cost of Node insertion
• Routing PE insertion cost
• Routing PE can replace interconnection insertion in case there are extra PEs
• Do not need augmentation– can reduce the amount of architecture extension
• Cv is much cheaper than Ce
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10Udo KebschullUniversity of Heidelberg
A* Search for Min Cost Edit Path• Inexact graph matching problem is NP-complete
How to search the mapping space for the min cost path : A* Search algorithm• Root : Kernel graph• Leaf : Sub-CGRA graph• s : current mapping state• g(s) : The sum of the costs(Ce, Cv) of the graph
edit operations from root to current state s• h(s) : The estimated cost from current state s to
a leaf state• Assessment of the partial mapping s
• g(s) + h(s)
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11Udo KebschullUniversity of Heidelberg
Vertex Scattering • Make clusters of vertex and assign each cluster to
row• Strengths of Vertex scattering
• Search space reduction• Considering shared resource constraints
2 1
34
PE 1
PE 2
PE 4
PE 5
PE 3
PE 6
2 1
345
5
2
1
3
4 5
KernelClustering & Row assignment Final
mapping
Row 1
Row 2
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12Udo KebschullUniversity of Heidelberg
h(s) & Vertex Scattering • Heuristic function, h(s) …
• guides the fast search of mapping space• needs cost estimation methods
• Detecting difficult-to-map edges• After vertex scattering• Forks, Over-length edges cannot be mapped to a mesh
without routing PE or a custom interconnection links• H(s) # of forks & over-length edges (=Nr )
• Unroutable difficult-to-map edge (c1) has more cost than routable (c2)
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2
3
5
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4 7
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13Udo KebschullUniversity of Heidelberg
ExamplePE 1
PE 2
PE 4
PE 5
PE 3
PE 6
c1 = cv = 1c2 = ce = 3
1 4
32
1 4
32
s=0{ }
s=1{(11)}
s=2{(12)}
s=4{(42)}
s=5{(43),($2)}
s=8{(24)}
s=7{(25)}
s=3{(13)}
g( s ) + h( s ) = 0 + 1
s=6{(26)}
s=9{(33),($5}
0+1 0+1 0+1
0+1 1+1
0+10+10+1
4+0 s=10{(35),($4)}
1+0
1 4
3 23
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14Udo KebschullUniversity of Heidelberg
Experimental Setup• We test I2CRF on a CGRA called
RSPA• mesh base interconnection• Each row has 2 shared
multipliersEach row can perform 2 loads and 1 store
• PE can be used for routing• Benchmarks from
• Livermore loops, MultiMedia and DSPStone
• Comparison to Mesh, 1-hop, Diagonal, and Mixed
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15Udo KebschullUniversity of Heidelberg
Performance Improvement
• IPC of 16 is equivalent to 100% utilization• PE utilization and the IPC are increased by more than 70% on
average compared to Mesh or by 41% on average compared to Mixed
compress
LowPass
wavelet
calc1
calc2
calc3
Sobel
SOR
bdist dctdist
2hyd
roICCG
inner_pro
duct
n_complex_
up...
prewitt SAD
state
G.M.
0
2
4
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18Mesh Diagonal 1-Hop Mixed I2CRF
IPC
(PE
Util
izat
ion,
16=
100%
)
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16Udo KebschullUniversity of Heidelberg
Customization Overhead
• Through our interconnection increment, …• # of new interconnection links is very small• Very marginal increase in the overall Mux complexity
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17Udo KebschullUniversity of Heidelberg
Optimization Time
• Find competitive custom interconnection architecture with configuration in reasonable time.
1
10
100
1000
10000
Tim
e (s
ec)
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18Udo KebschullUniversity of Heidelberg
Conclusion• We presented an interconnection customization
method for CGRAs • Our method exploits the similarity between the
interconnection customization problem and inexact graph
• Non-homogeneous extensions to a base interconnection architecture may present some challenges and possibly penalty in back-end VLSI design matching
• We plan to find out the extent of the difficulty due to the non-homogeneity as well as find novel ways to mitigate any impact if necessary
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19Udo KebschullUniversity of Heidelberg
Thank you for your attention!