Optimal Phase Margin for Minimal Settling Time

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Optimal Phase Margin for Minimal Settling Time As () ϖ u s 1 1 s p2 = useful functions and identities Units Constants _______________________________________ Table of Contents I. Introduction II. Inputs III. Phase Margin, Q, and Damping Factor IV. Transient Response V. Copyright and Trademark Notice _______________________________________ Introduction What is the truth to the rumor that the optimal phase margin for minimal settling time is 45 deg, 60 deg, 64 deg, or critical damping? What phase margin corresponds to critical damping? These questions will be answered in this report with specific application to second order systems consisting of a dominant and non-dominant poles. _______________________________________ Inputs SNR 80dB := 1

Transcript of Optimal Phase Margin for Minimal Settling Time

Page 1: Optimal Phase Margin for Minimal Settling Time

Optimal Phase Marginfor Minimal Settling Time

A s( )ωu

s

1

1s

p2+

⋅=

useful functions and identitiesUnitsConstants

_______________________________________Table of ContentsI. IntroductionII. InputsIII. Phase Margin, Q, and Damping FactorIV. Transient ResponseV. Copyright and Trademark Notice

_______________________________________Introduction

What is the truth to the rumor that the optimal phase margin for minimal settling time is 45 deg, 60 deg, 64 deg, or critical damping? What phase margin corresponds to critical damping? These questions will be answered in this report with specific application to second order systems consisting of a dominant and non-dominant poles.

_______________________________________Inputs

SNR 80dB:=

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0 2 4 60

1

2

3

4Q vs. 2nd Pole Location

p2/wu

Q

0 2 4 60

0.5

1

1.5Damping vs. 2nd Pole Location

p2/wu

dam

ping

fact

or

0 2 4 60

50

100Phase Margin vs. 2nd Pole Location

p2/wu

PM (d

eg)

p2_ωuii

num5⋅:=ω0ti

i 1−

num 1−20⋅:=i 1 num..:=num 50:=

As a designer we have control over the pole locations, which is swept in the following plots to show the relationship between non-dominant pole location and Q, phase margin and damping factor.

1 2 3 40

10

20

30Bandwidth Loss vs. Non-dominant Pole

p2/wu

Ban

dwid

th lo

ss (%

)

This phase margin expression assumes, the unity gain bandwidth is entirely determined by the dominant pole. In practice, the non-dominant pole will reduce the real unity gain bandwidth from the expected value. For properly placed non-dominant pole this error is only about 5%, as shown in the following figure:

PM p2_ωu( ) 90180

πatan

1

p2_ωu

⋅−:=ζ p2_ωu( ) p2_ωu

2:=Q p2_ωu( ) 1

p2_ωu:=

ω0 ωu p2_ωu⋅=

The closed loop gain can be expressed in terms of Q, damping factor, phase margin, or as a function of non-dominant pole location with respect to unity gain bandwidth.

AclAol

1 Aol+=

1

s2

p2 ωu⋅

s

ωu+ 1+

=1

s

ω0

21

Q

s

ω0⋅+ 1+

=1

s

ω0

22 ζ⋅

s

ω0⋅+ 1+

=

The closed loop transfer function given this forward path gain is given by the following equations. In this closed loop response the feedback factor is assumed to unity, as it will be lumped into ωu.

Aolωu

s

1

1s

p2+

⋅=

The open loop response of most second order systems can be represented in the following form. This form assumes infinite gain at DC. This assumption results in neglible error for DC gains greater than 10, which is the case for most operational amplifiers with DC gains typically greater than 500.

_______________________________________Phase Margin, Q and Damping Factor

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err2 p2_ωu ω0t,( ) p2 p2_ωu( )p2_ωu 4−

exp p1 p2_ωu( )− ω0t⋅( )⋅p1 p2_ωu( )p2_ωu 4−

exp p2 p2_ωu( )− ω0t⋅( )⋅−:=

h t( ) 1p2

p1 p2−( ) exp p1− ω0⋅ t⋅( )⋅p1

p1 p2−( ) exp p2− ω0⋅ t⋅( )⋅−+=

An overdamped system is very slow. However it is often used in systems with large process variations, to avoid crossing into extreme underdamped scenarios.

Overdamped

err1 p2_ωu ω0t,( ) e

p2_ωu

2− ω0t⋅

1

4

p2_ωu1−

sin 1p2_ωu

4− ω0t⋅

⋅ cos 1p2_ωu

4− ω0t⋅

⋅:=

err t( ) h t( ) 1−= eζ− ω0⋅ t⋅( ) ζ

1 ζ2

sin 1 ζ2

− ω0⋅ t⋅

⋅ cos 1 ζ

2− ω0⋅ t⋅

⋅=

h t( ) 1 eζ− ω0⋅ t⋅( ) ζ

1 ζ2

sin 1 ζ2

− ω0⋅ t⋅

⋅ cos 1 ζ

2− ω0⋅ t⋅

⋅+=

Acl1

s

p11+

s

p21+

=

p2 p2_ωu( ) ζ p2_ωu( ) ζ p2_ωu( )21−−:=p1 p2_ωu( ) ζ p2_ωu( ) ζ p2_ωu( )2

1−+:=

For damping factors less than one, the system is underdamped. This is the preferred operating condition for almost all systems for minimum settling time.

Underdamped

err0 ω0t( ) ω0t 1+( )− exp ω0t−( )⋅:=

h ω0t( ) 1 ω0t 1+( ) exp ω0t−( )⋅−:=

For a critcally damped system, the damping factor is one. This response has a transient response and settling error given by the following expression:

Critically damped

In this section, the settling time is found. This first requires the transient response be found. For a second order system, three possible equations can result, depending on whether the response is under, over, or critically damped.

_______________________________________Transient Response

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Overall Error vs. Non-Dominant Pole LocationThe three transient responses are merged into the following expression:

err p2_ωu ω0t,( ) if p2_ωu 4= err0 ω0t( ), ifp2_ωu

21≥ err2 p2_ωu ω0t,( ), err1 p2_ωu ω0t,( ),

,

:=

The required settling accuracy is calculated from the SNR requirements as follows

Vacc 10

SNR−

20:=

From the transient response we can find the settling timeω0tsettle p2_ωu Vacc,( ) tval 0←

tval if err p2_ωu ω0ti,( ) Vacc≤( ) err p2_ωu ω0ti 1−,( ) Vacc>( )⋅ ω0ti, tval, ←

i 2 num..∈for

tval

:=

Settling time is best found by plotting settling error on a logarithmic axis verses time.

0 5 10 15 201 .10 71 .10 61 .10 51 .10 41 .10 3

0.010.1

1Settling Error vs. Time

Time (w0*t)

Settl

ing

Erro

r ω0tsettle 2 Vacc,( )

When the nondominant pole is swept, we can see how the settling time varies

0 1 2 3 4 55

10

15

20Settling Time vs. Non-dominant Pole

Settling Time (w0*t)

p2/w

u

Now we can find the optimum pole placement for settling given a required settling accuracy:

p2_ωuopt Vacc( ) ω0tsetmin 1000000←

opt 0←

ω0tset ω0tsettle p2_ωui Vacc,( )←

opt if ω0tset ω0tsetmin< p2_ωui, opt,( )←

ω0tsetmin if ω0tset ω0tsetmin< ω0tset, ω0tsetmin,( )←

i 2 num..∈for

opt

:= p2_ωuopt Vacc( ) 3.4=

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This corresponds to a phase margin of

PMopt Vacc( ) 90180

πatan

1

p2_ωuopt Vacc( )

⋅−:= PMopt Vacc( ) 73.61=

num 7:=i 1 num..:=SNRi 30 i 10⋅+:=

Vacci10

SNRi−

20:=

Now for the most useful plot of this report: Optimal phase margin verses SNR requirements. 76 degrees represents critical damping. The optimal phase margin approaches this as the SNR requirements get large.

40 50 60 70 80 90 10060

65

70

75

80Optimal Phase Margin vs. SNR

SNR (dB)

Phas

e M

argi

n (d

eg)

Similarly, the optimal non-dominant pole placement approaches 4*ωu for large SNR requirements

40 50 60 70 80 90 1002

2.5

3

3.5

4Optimal Non-dominant pole vs. SNR

SNR (dB)

p2/w

u

5

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It is interesting to that optimized settling time is the same as first order settling with a bandwidth of ω0, and in most cases 40% faster than critical settling.

ω0tsetlin SNR( )SNR

20ln 10( )⋅:=

40 50 60 70 80 90 1000

5

10

15

Optimal 2nd order settling1st order SettlingCritical 2nd order settling

SNR (dB)

Settl

ing

Tim

e (w

0*t)

Extra comments:-Third order loops are trickier to analyze, because their are two variables involved in the settling: phase margin and gain margin.-This analysis assumes linearity is limited by the exponential settling error.-With ideal 1st order linear settling, incomplete settling does not affect SDR.-For continuous time filters and PLLs the optimum phase margin is low, in the 50 degree range.

_______________________________________Copyright and Trademark Notice

All software and other materials included in this document are protected by copyright, and are owned or controlled by Circuit Sage.

The routines are protected by copyright as a collective work and/or compilation, pursuant to federal copyright laws, international conventions, and other copyright laws. Any reproduction, modification, publication, transmission, transfer, sale, distribution, performance, display or exploitation of any of the routines, whether in whole or in part, without the express written permission of Circuit Sage is prohibited.

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