Cos~ut. & B~t, F.aSaS VoL 7, pp. 73-77 0045--7~dSO/e601-O073/$02.09/O ~) Pergamon Press Ltd., 1980, Printed in Great Britain

O P T I M A L D E S I G N OF N O N L I N E A R D.C. CIRCUITS

HAR1OM GUPTA and JAYDEV SHARMA

Department of Electrical Engineering, University of Roorkee, Roorkee, India 24?6?2

(Received 14 June 1979; received for publicafion 11 January 1980)

Abstract--This paper presents a method for optimal design of nonlinear d.c. circuits which minimizes the difference between the desired and actual specifications subject to constraints based on circuit equations and limits on design parameters. All the problem variables are decomposed into two sets, i.e. independent and dependent variables, which reduces the size of the problem. Computation of partial derivatives of the objective function is also done more efficiently and it does not require the adjoint network and its solution. Reliability and efficiency of the method is tested by the authors for large practical circuits.

1. INTRODUCTION

For the computer aided design of several types of nonlinear d.c. circuits, many methods[I-7] have been developed. In the methods [1-4], most of the computation time for such a design is spent on the non-linear Circuit analysis [3] and the partial derivatives of obejctive function are calculated by solving the adjoint network. In Refs. [5-7] the constrained optimization problem is converted to an unconstrained one by a penalty function method. It has the inconvenience that the penalty functions must be defined and adjusted in the course of the solution in an arbitrary way. The efficiency of these methods depends on the initial choice of penalty parameters and their adjustment in the successive iterations.

In this paper, a method is presented for the optimization of nonlinear d.c. electronic circuit by using conjugate gradient technique of Fletcher and Reeves because of its low storage requirements. All problem variables are decomposed into two sets i.e. independent and dependent variables. Designable parameters are taken as independent variables. Circuit vari- ables (branch currents and voltages) are taken as dependent variables. The decomposition of variables results in the reduction of problem size. This method requires the solution of circuit equations for the given set of designable parameters. Since very fast and reliable algorithms of d.c. analysis have been developed[8, 9], this step does not take much computer time. Com- putation of the partial derivatives of the objective function do not require adjoint network and its solution.

2. DESIGN PROBLEM

The design problem can be stated so as to minimize a performance function subject to circuit equations and limit on problem variables.

Performance function. The performance function reflects the desired design specifications. The d.c. design specifications will be in terms of various voltages and currents appearing in the circuit. A performance function F, which describes these specifications is the summation of the squared errors between the actual and desired values of various voltages and currents in the circuit with given weights, i.e.

i=1 j=l

where V,.,/j are the actual voltages and currents and ~; ~ are the corresponding desired values; N~, Nc are the number of voltages and currents specifications respectively, while at,/]i are the positive weights which takes into account the normalizing factor.

To minimize the power dissipation, terms of the type adkVk are added to F in (1) for each power supply. Ak is a positive weighting factor used to provide a trade off between the accuracy of specified voltages, currents and the power consumption.

The performance function of (1) yields a design under a nominal environmental condition.

73

74 HARIOM GUPTA and JAYDEV SHARMA

However, it can easily be extended to include several such conditions simultaneously such as the d.c. collector currents, Ic, of transistors are required to remain constant over some temperature range [6].

Constraints (a) Circuit equations--The variables V, I and P should satisfy the circuit equations, i.e.

g( V, L P) = 0 (2)

where P is the set of designable variables of the circuit. (b) Bounds on problem variables--Bounds on some or all problem variables are required

due to thermal stability, gain, power dissipation in some delves and power supplies, etc., i.e.

Pi mm ~ Pi <~ P ~ , i = 1 . . . . Np

V/rain ~< Vl ~< V/max

/jmin </ j ~< wax.

(3)

(4)

subject to

Min f(X, U) (5)

g(X, U) = 0 (6)

U =i" ~< U ~< U ='~ (7)

X "i" -< X -< X ='x. (8)

Expanding g for small variation A U and AX at point (U °, X °)

0g ~XIxo" AX +~-Uluo" AU =0 (9)

where Ogl~X is an X Jacobian matrix of elements #g.J0Xj and aglOU is a matrix of elements agdO U i. Eliminating the dependent variation

ag - l ag (lO,

The quantity inside the bracket of eqn (10) is known as the sensitivity matrix. The Lagrangian function of the optimization problem (5)-(8) considering only equality

constraints is

L(X, U, A) = I(U, X) + A rg(X, U) (11)

where n is the number of dependent variables and A is a column vector of dimension n, selected so that

3. OPTIMIZATION METHOD

The total number of variables is divided into two sets: U the set of independent variables and X the set of dependent variables. The designable variables such as resistances, transistors parameters etc. are chosen as independent variables and branch currents and voltages are taken as dependent variables. Therefore the optimization problem (1)--(4) can be expressed in terms of dependent and independent variables as

Optimal design of nonlinear d.c. circuits 75

That is

,T o/fog1-' = - T~ LT~J • (12)

Expanding the Lagrangian function (11) for small variations A U and AX at the point (U °, x o)

Substituting the value of A r from (12) in (13), we get

(13)

Now the steps of the method are (i) Select vector U ° and set i = 0. (ii) Calculate X ~ from g(U, X) = 0 by using method given in [8] and store [ag/OX]-L (iii) Calculate vector A ~ from eqn (12). (iv) Calculate ALd from (14). (v) Calculate the conjugate search direction.

where

S i

(ALd)r(ALd) S i-I for i/> 1 - ALt/+ (ALt/_I)r(ALd_~)"

I i - ALv for i = 0.

(vi) Calculate the projection of the gradient on the bounds of independent variables

In/if uj.m~-u, j'=O and • and si= t - t i f u] '- uj mln=0

[ s/ otherwise

~ > 0 s/ <O

where s / i s the vector element of S i. (vii) Calculate t mu the maximum step length

r,.,:- - ,.,,, ]. m,. r,.,,m"-,,']}. tma'=n~n {,/rni>n L s/ 4<oL s/

(viii) Calculate step size t ~< t m" such that

I( U i÷l , X/÷I) < f( U i, X i )

Ui+l = U i + tS i

and X i+1 is calculated as in step (ii) and at the same time it satisfies the constraint (8). (ix) Check if [[(U s, X i ) - f ( U i+r, Xi+1)] <¢ stop, Otherwise set i = i+ 1 and go to step (iii).

is a preassigned tolerance.

4. EXAMPLES

Two example are presented to illustrate the effectiveness of the method. The examples are run on a IBM 360-044 computer. The termination criterion is F ~+1 - F ~ ~< 10 -n.

ALt/ OL Of Of r{ og,~-, og ] (14) = TO = au ° ~ L \ ~ / FJ j"

76 HARIOM GUPTA and JAYDEV SHARMA

Gi

Vj n 0

Gz

C

E

/co" /cs (ovsc/V'-I ) / (l~J)

/to " I t s (e vK/~" I ) / ( / g r+ I)

I c s " IO'e

B O

I + VCC

t- c

E

/9 r - 2 5

I ~ C - 12.0V

V t - 0 . 0 2 5 o t lemp.25"C

Fig. I. Single transistor circuit.

C

t

G!

- VCC

r ~ /c3

VEE

For oll t ransistors

Ics• I0 "w VCCo 18.0 V

/£$ . 10 "14 V E E = " l S O V

/9 F • I 00 ,8 n • 5

10 .025o t temp. 25 *C

Fig. 2. Two-stage differential amplifier.

IG, or .

Optimal design of nonlinear d.c. circuits 77

Example 1. The biasing circuit to be designed is shown in Fig. 1. The desired operating point is: Ic = I mA; and VcB = 6 V. The designable parameters are conductances GI, G2 and G3. The optimum value of GI, G2 and G3 obtained are 0.509 x 10-sU, 0.67 × 10 -4 Uand 0.167 × 10-3U respectively. The computation time required is 4 sec.

Example 2. The circuit is shown in Fig. 2. The designable parameters are the five conductances Gj to Gs. The bias point specifications are as follows: Icj = 0.5 mA, Ic2 = 0.5 mA, Ic3 = 1.0 mA, Ic4 = 1.0 mA, Voltage across conductance G3 = 1.5 V and VcE(Q4) = 1.5 V. To have a voltage gain t> 1000, Gi < 2.1" 10-3U, G2 < 2.1 • 10-3U, G3 < 0.67" 10-3U and to limit the cost of production G~ to G~ ~> 0.4.10 -4 U (as the production cost of lower conductances is higher). The designable variables are Gi through Gs. Results were obtained after only 20 secs of IBM 360144 computer time. The optimum values of G~ through G5 obtained are 0.21 × 10-3U, 0.21 × 10-3~, 0.666 × 10-3U, 0.621 × 10-4U, 0.050 Urespectively.

5. CONCLUSION

In each iteration, circuit equations are solved. Therefore termination of the program at any stage will always give a feasible solution. To meet some requirements like stability gain, desired transient response etc. limits on some or all circuit parameters and variables can be imposed. Also by giving the range of some circuit variables we may improve the performance function. For example, some bias points may be specified in a range like (0.9 VCC/2)<. VcE << .

(1.1 VCC)/2. All such inequality constraints to meet other requirements or to improve the performance of the circuit are included in this method. The sensitivity matrix does not require the adjoint network and its solution.

REFERENCES

1. R. I. Dowell and R. A. Rohrer, Automated design of biasing circuits. IEEE Trans. Circuit Theory 1-18, 85-89 (1971). 2. A. J. Broderson, S. W. Director and W. A. Bristol, Simultaneous automated a.c. and d.c. design of linear integrated

circuit amplifiers. IEEE Trans. Circuit Theory CT-18, 50-58 (1971). 3. D. A. Calahan, Computer-Aided Network Design. McGraw-Hill, New York (1972). 4. S. W. Director, Computer-aided design of linear integrated circuit amplifiers. Proc. IEEE Int. Symp. Circuit Theory

(1973). 5. S. R. K. Dutta and M. Vidyasagar, Optimal design of nonlinear d.c. transistor circuits without solving network

equations. IEEE Trans. Circuits and Systems CAS-22($) (1975). 6. S. R. K. Dutta and M. Vidyasagar, Worst-case design of d.c. transistor circuits. IEEE Trans. Circuits and Systems

CAs.24(5) 0977). 7. A. J. Jimenz, A variable order nonlinear programming algorithm for use in computer-aided circuit design and analysis.

Ph.D. Thesis, University of Florida (1976). 8. H. Gupta, J. Sharma and A. P. Dhawan, A method for d.c. solution of bipolar electronic device circuits. Prac. 12th

Ann. Asilomar Conf. Circuits, Systems and Computers 6..8 Nov. (1978). 9. H. Gupta and J. Sharma, An algorithm for d.c. solutions of electronic circuits. Comp. Elect. Engng (Communicated). I0. F. C. Fitchen, Electronic Integrated Circuits and Systems. Van Nortrand Reimbold, New York (1970).