OPERATORS A set of operators is available in Verilog The operator symbols are similar to those in C language With these operators we can carry out specified operations on the operands and assign the results to a net or a vector set of nets as the case may be

Unary Operators Unary operators do an operation on a single operand and assign the result to the specified net All unary operators get precedence over binary and ternary operators

Unary operators and their symbols

Reduction operators opearate on all bits of a single operand and produce 1 ndashbit result The operator list given in previous slide

For reduction and if any bit is 0 the result is 0else if any bit is an X or Z the result is an X else the result is 1

Like that apply for ornandnor

for reduction XOR if any bit is an X or Z the result is X else if there are even number of 1rsquos in the operand the result is 0else the result is 1

a= lsquob0110 b= lsquob0100

then | b is 1

ampb is 0

~^ A is 1

next example myreg = 4rsquob01x0

then ^myreg is an x

Binary operators

Most operators available are of the binary type A binary operator takes on two operands the operator comes in between the two operands in the assignment

1048696 The arithmetic operators treat both the operands as numbers and return theresult as a number

1048696 All net and reg operand values are treated as unsigned numbers

1048696 Real and integer operands may be signed quantities

The result of any arithmetic operation mdash with the ldquo+rdquo or ldquondashrdquo or with any of the other arithmetic operators discussed later mdash will have an x value if any of the operand bits has an x or a z value

Classified into arithmetic operators logical operators relational operators equality operators bit wise logical operators operator truth tables shift operators

Arithmetic operators

The modulus operand is similar to that in C language ndash It provides the remainder of the division of two numbers Example module add_8(abc)input[70]aboutput[70]cassign c = a + b indication of arithmetic binary operator for additionendmodule

Examples

7 4 results 1 division operation

7 4 results 3 modulus operator

- 7 4 results -3 modulus operator

if any bit of an operand in an arithmetic operation is an x or z the entire result is x for example lsquob10x0 + lsquob01111 is lsquobxxxxx

the size of the result of an arithmetic expression is determined by the size of the largest operand

Logical operators There are two logical operators involving two operands The operands concerned can be variables or expressions involving variables

In both cases the result of the operation is a single bit of value 1 (true) or 0 (false)

If a bit in one of the operands is x or z the result of evaluation of the expression has an x value

Crd = lsquob0 dgs = lsquob1 then

Crd ampamp dgs is 0

Crd||dgs is 1

For vector operands a non zero vector is treated as a 1 for example

abus = lsquob0110 bbus = b0100

Then abus||bbus is 1 also abusampampbbus is also 1

Relational operators There are four relational operators their details are

A relational operator treats both the operands as binary numbers and compares them

The result is a 1 (true) bit or a 0 (false) bit If a bit in either operand is x or z the result has x (unknown) value

The operands can be variables or expressions involving variables

Operands of net or reg type are treated as unsigned numbersReal and integers can be positive or negative (ie signed) numbers

Example of relational operators

23 gt 45 is false (value 0)

while 52 lt 8rsquohxff is x

if operands are not of the same size the smaller operand is zero filled on the MSB side for example

lsquob1000 gt= lsquob01110

is equivalent to lsquob01000gt= lsquob01110 which is false value 0 is the output

Equality operators The equality operator makes a bit-by-bit comparison of the two operands and produces a result bit

The result bit is a 1 (true) if the operand condition is satisfied otherwise it is 0 (false)

The operands can be variables or expressions involving variables

If the operands are of unequal length the shorter one is zero filled to match the larger operand

The operators in this category are only of two types ndash those to test the equality and those to test inequality

== (logical equality) = (logical inequality) ===(case equality) == (case inequality)

The result is 0 if the comparison is false else the result is a 1 in case comparisons values x and z are compared strictly as values that is with no interpretations

Equality operators and their symbols

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
• Slide 2
• Slide 3
• Slide 4
• Slide 5
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• Slide 7
• Slide 8
• Slide 9
• Slide 10
• Slide 11
• Slide 12
• Slide 13
• Slide 14
• Slide 15
• Slide 16
• Slide 17
• Slide 18
• Slide 19
• Slide 20

Reduction operators opearate on all bits of a single operand and produce 1 ndashbit result The operator list given in previous slide

For reduction and if any bit is 0 the result is 0else if any bit is an X or Z the result is an X else the result is 1

Like that apply for ornandnor

for reduction XOR if any bit is an X or Z the result is X else if there are even number of 1rsquos in the operand the result is 0else the result is 1

a= lsquob0110 b= lsquob0100

then | b is 1

ampb is 0

~^ A is 1

next example myreg = 4rsquob01x0

then ^myreg is an x

Binary operators

Most operators available are of the binary type A binary operator takes on two operands the operator comes in between the two operands in the assignment

1048696 The arithmetic operators treat both the operands as numbers and return theresult as a number

1048696 All net and reg operand values are treated as unsigned numbers

1048696 Real and integer operands may be signed quantities

The result of any arithmetic operation mdash with the ldquo+rdquo or ldquondashrdquo or with any of the other arithmetic operators discussed later mdash will have an x value if any of the operand bits has an x or a z value

Classified into arithmetic operators logical operators relational operators equality operators bit wise logical operators operator truth tables shift operators

Arithmetic operators

The modulus operand is similar to that in C language ndash It provides the remainder of the division of two numbers Example module add_8(abc)input[70]aboutput[70]cassign c = a + b indication of arithmetic binary operator for additionendmodule

Examples

7 4 results 1 division operation

7 4 results 3 modulus operator

- 7 4 results -3 modulus operator

if any bit of an operand in an arithmetic operation is an x or z the entire result is x for example lsquob10x0 + lsquob01111 is lsquobxxxxx

the size of the result of an arithmetic expression is determined by the size of the largest operand

Logical operators There are two logical operators involving two operands The operands concerned can be variables or expressions involving variables

In both cases the result of the operation is a single bit of value 1 (true) or 0 (false)

If a bit in one of the operands is x or z the result of evaluation of the expression has an x value

Crd = lsquob0 dgs = lsquob1 then

Crd ampamp dgs is 0

Crd||dgs is 1

For vector operands a non zero vector is treated as a 1 for example

abus = lsquob0110 bbus = b0100

Then abus||bbus is 1 also abusampampbbus is also 1

Relational operators There are four relational operators their details are

A relational operator treats both the operands as binary numbers and compares them

The result is a 1 (true) bit or a 0 (false) bit If a bit in either operand is x or z the result has x (unknown) value

The operands can be variables or expressions involving variables

Operands of net or reg type are treated as unsigned numbersReal and integers can be positive or negative (ie signed) numbers

Example of relational operators

23 gt 45 is false (value 0)

while 52 lt 8rsquohxff is x

if operands are not of the same size the smaller operand is zero filled on the MSB side for example

lsquob1000 gt= lsquob01110

is equivalent to lsquob01000gt= lsquob01110 which is false value 0 is the output

Equality operators The equality operator makes a bit-by-bit comparison of the two operands and produces a result bit

The result bit is a 1 (true) if the operand condition is satisfied otherwise it is 0 (false)

The operands can be variables or expressions involving variables

If the operands are of unequal length the shorter one is zero filled to match the larger operand

The operators in this category are only of two types ndash those to test the equality and those to test inequality

== (logical equality) = (logical inequality) ===(case equality) == (case inequality)

The result is 0 if the comparison is false else the result is a 1 in case comparisons values x and z are compared strictly as values that is with no interpretations

Equality operators and their symbols

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
• Slide 2
• Slide 3
• Slide 4
• Slide 5
• Slide 6
• Slide 7
• Slide 8
• Slide 9
• Slide 10
• Slide 11
• Slide 12
• Slide 13
• Slide 14
• Slide 15
• Slide 16
• Slide 17
• Slide 18
• Slide 19
• Slide 20

Binary operators

Most operators available are of the binary type A binary operator takes on two operands the operator comes in between the two operands in the assignment

1048696 The arithmetic operators treat both the operands as numbers and return theresult as a number

1048696 All net and reg operand values are treated as unsigned numbers

1048696 Real and integer operands may be signed quantities

The result of any arithmetic operation mdash with the ldquo+rdquo or ldquondashrdquo or with any of the other arithmetic operators discussed later mdash will have an x value if any of the operand bits has an x or a z value

Classified into arithmetic operators logical operators relational operators equality operators bit wise logical operators operator truth tables shift operators

Arithmetic operators

The modulus operand is similar to that in C language ndash It provides the remainder of the division of two numbers Example module add_8(abc)input[70]aboutput[70]cassign c = a + b indication of arithmetic binary operator for additionendmodule

Examples

7 4 results 1 division operation

7 4 results 3 modulus operator

- 7 4 results -3 modulus operator

if any bit of an operand in an arithmetic operation is an x or z the entire result is x for example lsquob10x0 + lsquob01111 is lsquobxxxxx

the size of the result of an arithmetic expression is determined by the size of the largest operand

Logical operators There are two logical operators involving two operands The operands concerned can be variables or expressions involving variables

In both cases the result of the operation is a single bit of value 1 (true) or 0 (false)

If a bit in one of the operands is x or z the result of evaluation of the expression has an x value

Crd = lsquob0 dgs = lsquob1 then

Crd ampamp dgs is 0

Crd||dgs is 1

For vector operands a non zero vector is treated as a 1 for example

abus = lsquob0110 bbus = b0100

Then abus||bbus is 1 also abusampampbbus is also 1

Relational operators There are four relational operators their details are

A relational operator treats both the operands as binary numbers and compares them

The result is a 1 (true) bit or a 0 (false) bit If a bit in either operand is x or z the result has x (unknown) value

The operands can be variables or expressions involving variables

Operands of net or reg type are treated as unsigned numbersReal and integers can be positive or negative (ie signed) numbers

Example of relational operators

23 gt 45 is false (value 0)

while 52 lt 8rsquohxff is x

if operands are not of the same size the smaller operand is zero filled on the MSB side for example

lsquob1000 gt= lsquob01110

is equivalent to lsquob01000gt= lsquob01110 which is false value 0 is the output

Equality operators The equality operator makes a bit-by-bit comparison of the two operands and produces a result bit

The result bit is a 1 (true) if the operand condition is satisfied otherwise it is 0 (false)

The operands can be variables or expressions involving variables

If the operands are of unequal length the shorter one is zero filled to match the larger operand

The operators in this category are only of two types ndash those to test the equality and those to test inequality

== (logical equality) = (logical inequality) ===(case equality) == (case inequality)

The result is 0 if the comparison is false else the result is a 1 in case comparisons values x and z are compared strictly as values that is with no interpretations

Equality operators and their symbols

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
• Slide 2
• Slide 3
• Slide 4
• Slide 5
• Slide 6
• Slide 7
• Slide 8
• Slide 9
• Slide 10
• Slide 11
• Slide 12
• Slide 13
• Slide 14
• Slide 15
• Slide 16
• Slide 17
• Slide 18
• Slide 19
• Slide 20

Arithmetic operators

The modulus operand is similar to that in C language ndash It provides the remainder of the division of two numbers Example module add_8(abc)input[70]aboutput[70]cassign c = a + b indication of arithmetic binary operator for additionendmodule

Examples

7 4 results 1 division operation

7 4 results 3 modulus operator

- 7 4 results -3 modulus operator

if any bit of an operand in an arithmetic operation is an x or z the entire result is x for example lsquob10x0 + lsquob01111 is lsquobxxxxx

the size of the result of an arithmetic expression is determined by the size of the largest operand

Logical operators There are two logical operators involving two operands The operands concerned can be variables or expressions involving variables

In both cases the result of the operation is a single bit of value 1 (true) or 0 (false)

If a bit in one of the operands is x or z the result of evaluation of the expression has an x value

Crd = lsquob0 dgs = lsquob1 then

Crd ampamp dgs is 0

Crd||dgs is 1

For vector operands a non zero vector is treated as a 1 for example

abus = lsquob0110 bbus = b0100

Then abus||bbus is 1 also abusampampbbus is also 1

Relational operators There are four relational operators their details are

A relational operator treats both the operands as binary numbers and compares them

The result is a 1 (true) bit or a 0 (false) bit If a bit in either operand is x or z the result has x (unknown) value

The operands can be variables or expressions involving variables

Operands of net or reg type are treated as unsigned numbersReal and integers can be positive or negative (ie signed) numbers

Example of relational operators

23 gt 45 is false (value 0)

while 52 lt 8rsquohxff is x

if operands are not of the same size the smaller operand is zero filled on the MSB side for example

lsquob1000 gt= lsquob01110

is equivalent to lsquob01000gt= lsquob01110 which is false value 0 is the output

Equality operators The equality operator makes a bit-by-bit comparison of the two operands and produces a result bit

The result bit is a 1 (true) if the operand condition is satisfied otherwise it is 0 (false)

The operands can be variables or expressions involving variables

If the operands are of unequal length the shorter one is zero filled to match the larger operand

The operators in this category are only of two types ndash those to test the equality and those to test inequality

== (logical equality) = (logical inequality) ===(case equality) == (case inequality)

The result is 0 if the comparison is false else the result is a 1 in case comparisons values x and z are compared strictly as values that is with no interpretations

Equality operators and their symbols

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
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• Slide 20

Examples

7 4 results 1 division operation

7 4 results 3 modulus operator

- 7 4 results -3 modulus operator

if any bit of an operand in an arithmetic operation is an x or z the entire result is x for example lsquob10x0 + lsquob01111 is lsquobxxxxx

the size of the result of an arithmetic expression is determined by the size of the largest operand

Logical operators There are two logical operators involving two operands The operands concerned can be variables or expressions involving variables

In both cases the result of the operation is a single bit of value 1 (true) or 0 (false)

If a bit in one of the operands is x or z the result of evaluation of the expression has an x value

Crd = lsquob0 dgs = lsquob1 then

Crd ampamp dgs is 0

Crd||dgs is 1

For vector operands a non zero vector is treated as a 1 for example

abus = lsquob0110 bbus = b0100

Then abus||bbus is 1 also abusampampbbus is also 1

Relational operators There are four relational operators their details are

A relational operator treats both the operands as binary numbers and compares them

The result is a 1 (true) bit or a 0 (false) bit If a bit in either operand is x or z the result has x (unknown) value

The operands can be variables or expressions involving variables

Operands of net or reg type are treated as unsigned numbersReal and integers can be positive or negative (ie signed) numbers

Example of relational operators

23 gt 45 is false (value 0)

while 52 lt 8rsquohxff is x

if operands are not of the same size the smaller operand is zero filled on the MSB side for example

lsquob1000 gt= lsquob01110

is equivalent to lsquob01000gt= lsquob01110 which is false value 0 is the output

Equality operators The equality operator makes a bit-by-bit comparison of the two operands and produces a result bit

The result bit is a 1 (true) if the operand condition is satisfied otherwise it is 0 (false)

The operands can be variables or expressions involving variables

If the operands are of unequal length the shorter one is zero filled to match the larger operand

The operators in this category are only of two types ndash those to test the equality and those to test inequality

== (logical equality) = (logical inequality) ===(case equality) == (case inequality)

The result is 0 if the comparison is false else the result is a 1 in case comparisons values x and z are compared strictly as values that is with no interpretations

Equality operators and their symbols

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
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• Slide 19
• Slide 20

Logical operators There are two logical operators involving two operands The operands concerned can be variables or expressions involving variables

In both cases the result of the operation is a single bit of value 1 (true) or 0 (false)

If a bit in one of the operands is x or z the result of evaluation of the expression has an x value

Crd = lsquob0 dgs = lsquob1 then

Crd ampamp dgs is 0

Crd||dgs is 1

For vector operands a non zero vector is treated as a 1 for example

abus = lsquob0110 bbus = b0100

Then abus||bbus is 1 also abusampampbbus is also 1

Relational operators There are four relational operators their details are

A relational operator treats both the operands as binary numbers and compares them

The result is a 1 (true) bit or a 0 (false) bit If a bit in either operand is x or z the result has x (unknown) value

The operands can be variables or expressions involving variables

Operands of net or reg type are treated as unsigned numbersReal and integers can be positive or negative (ie signed) numbers

Example of relational operators

23 gt 45 is false (value 0)

while 52 lt 8rsquohxff is x

if operands are not of the same size the smaller operand is zero filled on the MSB side for example

lsquob1000 gt= lsquob01110

is equivalent to lsquob01000gt= lsquob01110 which is false value 0 is the output

Equality operators The equality operator makes a bit-by-bit comparison of the two operands and produces a result bit

The result bit is a 1 (true) if the operand condition is satisfied otherwise it is 0 (false)

The operands can be variables or expressions involving variables

If the operands are of unequal length the shorter one is zero filled to match the larger operand

The operators in this category are only of two types ndash those to test the equality and those to test inequality

== (logical equality) = (logical inequality) ===(case equality) == (case inequality)

The result is 0 if the comparison is false else the result is a 1 in case comparisons values x and z are compared strictly as values that is with no interpretations

Equality operators and their symbols

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
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Relational operators There are four relational operators their details are

A relational operator treats both the operands as binary numbers and compares them

The result is a 1 (true) bit or a 0 (false) bit If a bit in either operand is x or z the result has x (unknown) value

The operands can be variables or expressions involving variables

Operands of net or reg type are treated as unsigned numbersReal and integers can be positive or negative (ie signed) numbers

Example of relational operators

23 gt 45 is false (value 0)

while 52 lt 8rsquohxff is x

if operands are not of the same size the smaller operand is zero filled on the MSB side for example

lsquob1000 gt= lsquob01110

is equivalent to lsquob01000gt= lsquob01110 which is false value 0 is the output

Equality operators The equality operator makes a bit-by-bit comparison of the two operands and produces a result bit

The result bit is a 1 (true) if the operand condition is satisfied otherwise it is 0 (false)

The operands can be variables or expressions involving variables

If the operands are of unequal length the shorter one is zero filled to match the larger operand

The operators in this category are only of two types ndash those to test the equality and those to test inequality

== (logical equality) = (logical inequality) ===(case equality) == (case inequality)

The result is 0 if the comparison is false else the result is a 1 in case comparisons values x and z are compared strictly as values that is with no interpretations

Equality operators and their symbols

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
• Slide 2
• Slide 3
• Slide 4
• Slide 5
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• Slide 11
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• Slide 13
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• Slide 16
• Slide 17
• Slide 18
• Slide 19
• Slide 20

Example of relational operators

23 gt 45 is false (value 0)

while 52 lt 8rsquohxff is x

if operands are not of the same size the smaller operand is zero filled on the MSB side for example

lsquob1000 gt= lsquob01110

is equivalent to lsquob01000gt= lsquob01110 which is false value 0 is the output

Equality operators The equality operator makes a bit-by-bit comparison of the two operands and produces a result bit

The result bit is a 1 (true) if the operand condition is satisfied otherwise it is 0 (false)

The operands can be variables or expressions involving variables

If the operands are of unequal length the shorter one is zero filled to match the larger operand

The operators in this category are only of two types ndash those to test the equality and those to test inequality

== (logical equality) = (logical inequality) ===(case equality) == (case inequality)

The result is 0 if the comparison is false else the result is a 1 in case comparisons values x and z are compared strictly as values that is with no interpretations

Equality operators and their symbols

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
• Slide 2
• Slide 3
• Slide 4
• Slide 5
• Slide 6
• Slide 7
• Slide 8
• Slide 9
• Slide 10
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• Slide 12
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• Slide 15
• Slide 16
• Slide 17
• Slide 18
• Slide 19
• Slide 20

Equality operators The equality operator makes a bit-by-bit comparison of the two operands and produces a result bit

The result bit is a 1 (true) if the operand condition is satisfied otherwise it is 0 (false)

The operands can be variables or expressions involving variables

If the operands are of unequal length the shorter one is zero filled to match the larger operand

The operators in this category are only of two types ndash those to test the equality and those to test inequality

== (logical equality) = (logical inequality) ===(case equality) == (case inequality)

The result is 0 if the comparison is false else the result is a 1 in case comparisons values x and z are compared strictly as values that is with no interpretations

Equality operators and their symbols

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
• Slide 2
• Slide 3
• Slide 4
• Slide 5
• Slide 6
• Slide 7
• Slide 8
• Slide 9
• Slide 10
• Slide 11
• Slide 12
• Slide 13
• Slide 14
• Slide 15
• Slide 16
• Slide 17
• Slide 18
• Slide 19
• Slide 20

Equality operators and their symbols

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
• Slide 2
• Slide 3
• Slide 4
• Slide 5
• Slide 6
• Slide 7
• Slide 8
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• Slide 10
• Slide 11
• Slide 12
• Slide 13
• Slide 14
• Slide 15
• Slide 16
• Slide 17
• Slide 18
• Slide 19
• Slide 20

Examples of Equality operators

Example data = lsquob11x0 addr = lsquob11x0 then data = =addr is unknown that is the value x and

if data ===addr is true that is the value 1

If the operands are of unequal lengths the smaller operand is zero filled on the MSB side that is on the left for example 2rsquob10 == 4rsquob0010 is same as 4rsquob0010==4rsquob0010 which is true the result value is 1

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
• Slide 2
• Slide 3
• Slide 4
• Slide 5
• Slide 6
• Slide 7
• Slide 8
• Slide 9
• Slide 10
• Slide 11
• Slide 12
• Slide 13
• Slide 14
• Slide 15
• Slide 16
• Slide 17
• Slide 18
• Slide 19
• Slide 20

Bit wise logical operators

The operator does a specified bit-by-bit operation on the two operands and produces a set of result bits

The result is (bit-wise) as wide as the wider operandIf the width of one of the operands is less than that of the other it is bit-extended by filling zero bits and the widths are matched

Subsequently the specified operation is carried out

If one of the operands has an x or z bit in it the corresponding result bit is x Either operand can be a single variable or an expression involving variables

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
• Slide 2
• Slide 3
• Slide 4
• Slide 5
• Slide 6
• Slide 7
• Slide 8
• Slide 9
• Slide 10
• Slide 11
• Slide 12
• Slide 13
• Slide 14
• Slide 15
• Slide 16
• Slide 17
• Slide 18
• Slide 19
• Slide 20

Operator Truth Table bit wise operators

The truth tables for different types of bit-wise operators are given in TableNote that an z input is treated as an x value

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

• Slide 1
• Slide 2
• Slide 3
• Slide 4
• Slide 5
• Slide 6
• Slide 7
• Slide 8
• Slide 9
• Slide 10
• Slide 11
• Slide 12
• Slide 13
• Slide 14
• Slide 15
• Slide 16
• Slide 17
• Slide 18
• Slide 19
• Slide 20

Examples of bitwise operators

A= lsquob0110 B =lsquob0100 then A | B is 0110 Aamp B is 0100

If the operands are unequal in length the smaller operand is zero filled on the most significant side for example

lsquob0110 ^ lsquob10000

Is same as lsquob00110 ^ lsquob10000

Answer is lsquob10110

Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

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Shift Operators

The ltlt operator executes left shift operation while the gtgt operator executes the right shift operation

In either case the operand specified on the left is shifted by the number of bits specified on the right The shifting is done irrespective of whether the bits are 0 1 x or zThe bits shifted out are lost

The vacated positions created as a result of the shifting are filled with zeroes

If the right operand is x or z the result has an x value If the right operand is negative the left operand remains unchanged

Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

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Shift Operators contd

the shift operation shifts left operand by the right operand number of times It is a logical shift The vacated bits are filled with 0 if the right operand evaluates to an x or z the result of the shift operation is an x

reg[07] Qreg

Qreg= 4rsquob0111

qreg gtgt 2 is 8rsquob0000_0001

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

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• Slide 20

Ternary Operator Verilog has only one ternary operator ndash the conditional operator It checks a condition and does a branching It is a versatile and powerful operator

The general form is Abc

The conditional operation is made up of two operators ndash ldquordquo and ldquordquo ndash and three operands

The two operands separate the three operators in the order shown

The operational sequence of the operation is as follows

ldquoArdquo is evaluated first

If A is true b is evaluated

If A is false c is evaluated

If A evaluates to an ambiguous result both b and c are evaluated

Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

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Conditional operator contdhellip

cond_expr expr1expr2

If cond_expr is true (that is has a value 1) expr 1 is selected if cond_expr is false (value 0) expr2 is selected

if cond_expr is an x or a z the result is a bitwise operation on expr1 and expr2 with the following logic 0 with 0 gives 0 1 with gives 1 rest are x

here is an example

wire [02] student = marks gt18 Grade_A grade_c

the expression marks gt 18 is computed if true Grade_A is assighned to student if marks lt=18 grade_C is assighed to student

Another example

always

5 ctr = (ctr=25) (ctr+1) 5

The expression in the procedural assignment says that if ctr is not equal to 25 increment ctr else if ctr becomes 25 reset to 5

Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

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Operator priority A clear understanding of the operator precedence makes room for a compact design description But it may lead to ambiguity and to inadvertent errors Whenever one is not sure of the operator priorities it is better to resort to the use of parentheses and ensure clarity and accuracy of expressions Further some synthesizers may not interpret the operator precedence properly These too call for the apt use of parentheses

In any expression operators associate from left to right Ternary operator is the only exception to this it associates from right to left

Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

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Examples

P = Q ndash R + SHere R is subtracted from Q and then S is added to the result However operator precedence does not cause any ambiguity or change the result here P = Q ndash R SIn the above case the ldquodividerdquo operator ldquordquo has precedence over the ldquosubtractrdquo operator ldquondashrdquo Hence R will be divided by S and the result will be subtracted from Q

If division of (Q ndash R) is desired the expression has to be recast as P = (Q ndash R) S

In a lengthier expression such as P = a1 ndash a2 a3 + a4 a5 The operation is equivalent to P = a1 ndash ( a2 a3 ) + ( a4 a5 )Use of parentheses adds to clarity especially in operations involving more than two operators The operation P gt Q ndash R is the same as P gt (Q ndash R) since the relational operator ldquogtrdquo has a lower precedence than the algebraic operator ldquondashrdquo

Similarly the expression P + Q lt= R is the same as ( P + Q ) lt= R

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