Operating Systems and Networks AE4B33OSS · AE4B33OSS Lecture 1/Page 6 2015 What is Operating...
Transcript of Operating Systems and Networks AE4B33OSS · AE4B33OSS Lecture 1/Page 6 2015 What is Operating...
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Operating Systems and NetworksAE4B33OSS
Introduction
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Lecture 1/Page 2AE4B33OSS 2015
Operating Systems and Networks
Operating system – Lecture 18 Silberschatz A., Galvin P. B., Gagne G.: Operating System Concepts
http://codex.cs.yale.edu/avi/osbook/OS7/os7c/index.html Tanenbaum A. S.: Modern Operating Systems
http://www.cs.vu.nl/~ast/books/mos2/ YouTube lectures :
CS 162 – UC Berkeley OSSP06 – Surendar Chandra – UC Berkeley MIT 6.004
Networking – Lecture 912/13 Comer D. E.: Internetworking With TCP/IP Volume 1: Principles Protocols, and Architecture, http://www.cs.purdue.edu/homes/dec/vol1/vol1_presentation.pdf YouTube lectures :
CS 162 – UC Berkeley
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Lecture 1/Page 3AE4B33OSS 2015
Operating Systems and Networks
Examination: Lab exercise 10 points Quiz – select correct answer 8 points Test – 2 topics from OS and net 12 points
Result: A >=27 , B >=24, C>=21, D>=18, E>=15
Web:
https://cw.fel.cvut.cz/wiki/courses/ae4b33oss
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Lecture 1/Page 4AE4B33OSS 2015
Operating SystemMotto: Everybody is using OS but only few people know OS
Goal of course: To learn what is OS To learn principles of OS design To learn algorithms and known solution for complicated
problems To learn how to use efficiently OS
Material: https://cw.fel.cvut.cz/wiki/courses/ae4b33oss Book: Silberschatz A., Galvin P.B., Gange G.: Operating
Systems Concepts – http://codex.cs.yale.edu/avi/osbook/OS7/os7c/index.html
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Lecture 1/Page 5AE4B33OSS 2015
What is operating system doing?
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Lecture 1/Page 6AE4B33OSS 2015
What is Operating System?
Can you use computer without Operating System? A program that acts as an intermediary between a user of a
computer and the computer hardware. Operating system goals:
Execute user programs and make solving user problems easier.
Make the computer system convenient to use. Use the computer hardware in an efficient manner.
Exploits the hardware resources of one or more processors Provides a set of services to system users Manages memory storage and I/O devices
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Lecture 1/Page 7AE4B33OSS 2015
What Operating System needs?
Operating system runs on a computer Operating system strongly depends on computer
architecture On CPU – type, number, instruction set On bus – connection of components On devices – drivers (programs that control the
device) In this lesson we will suppose “general” computer Some approaches will be documented on OS Linux,
Windows, MacOS for PC computer
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Lecture 1/Page 8AE4B33OSS 2015
What is operating system?
In this lecture we will mark operating system as operating system kernel. other (so called system) programs are OS enlargement GUI – Windows is only graphical interface for users
System and application programs
Operating system(kernel)
PC
Hardware
User 1 User 2 User 3 User n...
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Lecture 1/Page 9AE4B33OSS 2015
OS diversity
OS for supercomputer (3,120,000 cores, 54,902TFlops, 17,8MW power)
OS for data and networks server OS for personal computer OS for realtime application – control of air planes,
rockets,... OS for mobile applications – telephone, tablet Embedded OS (printer, washing machine, ...) Smart card OS ... and other specialized OS
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Lecture 1/Page 10AE4B33OSS 2015
Elements of General Personal Computer Processor (one or more) Main Memory
Volatile, real memory or primary memory
System bus Communication among processors,
memory, and I/O modules I/O modules
Secondary memory – hard disk
Communications devices Terminals Printers …
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Lecture 1/Page 11AE4B33OSS 2015
Processor CPU
Processor execute instructions only from memory Usually two modes of processor
System mode privileged Processor can do everything what is possible
User mode restricted Special operations are disabled Disabled operation – operations that can modify state of
the whole system– Halt, reset, Interrupt enable/disable, modification of
processor mode, modification of MMU– Instruction for input and output (in / out)
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Lecture 1/Page 12AE4B33OSS 2015
Instruction Execution
CPU works in steps – instruction cycles defined by clock signal
Two steps Processor reads instructions from memory
Fetches Processor executes each instruction
The processor fetches the instruction only from main memory
Program counter (PC) holds address of the instruction to be fetched next
Program counter is incremented after each fetch
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Lecture 1/Page 13AE4B33OSS 2015
Instruction Cycle
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Lecture 1/Page 14AE4B33OSS 2015
Characteristics of a Hypothetical Machine
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Lecture 1/Page 15AE4B33OSS 2015
Example of Program Execution
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Lecture 1/Page 16AE4B33OSS 2015
TopLevel Components
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Lecture 1/Page 17AE4B33OSS 2015
Control and Status Registers Program Counter (PC)
Contains the address of an instruction to be fetched
Instruction Register (IR) Contains the instruction most
recently fetched Program Status Word (PSW)
Condition codes Interrupt enable/disable Supervisor/user mode Used by privileged operating
system routines to control the execution of programs
Condition Codes or Flags•Bits set by the processor hardware as a result of operations•Examples
•Positive result•Negative result•Zero•Overflow
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Lecture 1/Page 18AE4B33OSS 2015
Processor
Two internal registers Memory address register (MAR)
Specifies the address for the next read or write Memory buffer register (MBR)
Contains data written into memory or receives data read from memory
I/O address register I/O buffer register
Uservisible registers Enable programmer to minimize mainmemory references by
optimizing register use
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Lecture 1/Page 19AE4B33OSS 2015
UserVisible Registers
May be referenced by machine language Available to all programs application programs and
system programs Types of registers
Data Address
Index Segment pointer Stack pointer
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Lecture 1/Page 20AE4B33OSS 2015
UserVisible Registers Address Registers
Index Involves adding an index to a base value to get
an address Segment pointer
When memory is divided into segments, memory is referenced by a segment and an offset
Stack pointer Points to top of stack
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Lecture 1/Page 21AE4B33OSS 2015
Interrupts
Interrupt the normal sequencing of the processor Most I/O devices are slower than the processor
Processor must pause to wait for device
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Lecture 1/Page 22AE4B33OSS 2015
Interrupts
Interrupts enable parallel run of CPU and external devices
Interrupts are numbered 0255 (00FF) Each number specify different type of interrupts Each number has special program – interrupt
handler
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Lecture 1/Page 23AE4B33OSS 2015
Interrupts Interrupt handler:
Program to service a particular I/O device Generally part of the operating system Suspends the normal sequence of execution
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Lecture 1/Page 24AE4B33OSS 2015
Interrupt Cycle
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Lecture 1/Page 25AE4B33OSS 2015
Interrupt Cycle
Processor checks for interrupts If there is no interrupt then fetch the next instruction
for the current program If an interrupt is pending (waiting), suspend execution
of the current program, and execute the interrupthandler routine
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Lecture 1/Page 26AE4B33OSS 2015
Simple Interrupt Processing
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Lecture 1/Page 27AE4B33OSS 2015
Changes in Memory and Registers for an Interrupt
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Lecture 1/Page 28AE4B33OSS 2015
Changes in Memory and Registers for an Interrupt
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Lecture 1/Page 29AE4B33OSS 2015
Multiple Interrupts Disable interrupts while an interrupt is being processed
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Lecture 1/Page 30AE4B33OSS 2015
Multiple Interrupts Define priorities for interrupts
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Lecture 1/Page 31AE4B33OSS 2015
Multiple Interrupts
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Lecture 1/Page 32AE4B33OSS 2015
Multitasking Processor has more than one program to execute The sequence the programs are executed depend on
their relative priority and whether they are waiting for I/O
Multitasking simulates parallel execution on oneCPU systems
Multitasking is using TimeSharing System, that depends on timer interrupt
After an interrupt handler completes, control may not return to the program that was executing at the time of the interrupt. Interrupt makes context switch, store old process status into memory and load status of another process
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Lecture 1/Page 33AE4B33OSS 2015
Memory Hierarchy Faster access time, greater cost per bit
Cache memory is fast but it is small because it is expensive
Greater capacity, smaller cost per bit & slower access speed DVD memory is cheap but the CPU need first to
read data into main memory – it is slow
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Lecture 1/Page 34AE4B33OSS 2015
Memory Hierarchy
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Lecture 1/Page 35AE4B33OSS 2015
Going Down the Hierarchy
Decreasing cost per bit Increasing capacity Increasing access time Decreasing frequency of access of the memory by the
processor Locality of reference
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Lecture 1/Page 36AE4B33OSS 2015
Memory Hierarchy
Level 1 2 3 4
Type Registrs CPU
Cache Main memory
Disk
Typical size ≤ 1KB ≤ 16MB ~ 16 GB > 100 GB
Technology Inside CPU(CMOS)
CMOS SRAM
CMOS SRAM
Magnetic disk / SSD
Access speed
1-2 TiB/s 700-100 GiB/s
1-10 GiB/s <600MiB/s
Controlled by
program HW Operating system
Operating system
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Lecture 1/Page 37AE4B33OSS 2015
Cache Memory
CPU
CPU
L1 cache
L1 cache
L2 cache
L2 cache
L3 cacheMain
memoryRAM
word transfer block transfer
Invisible to operating system Increase the speed of memory Processor speed is faster than memory speed Exploit the principle of locality
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Lecture 1/Page 38AE4B33OSS 2015
Cache Memory
Contains a copy of a portion of main memory Processor first checks cache If not found in cache, the block of memory containing
the needed information is moved to the cache and delivered to the processor
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Lecture 1/Page 39AE4B33OSS 2015
Cache/Main Memory System
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Lecture 1/Page 40AE4B33OSS 2015
Cache Read Operation
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Lecture 1/Page 41AE4B33OSS 2015
Cache Design Cache size
Small caches have a significant impact on performance
Block size The unit of data exchanged between cache and main
memory Larger block size more hits until probability of using
newly fetched data becomes less than the probability of reusing data that have to be moved out of cache
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Lecture 1/Page 42AE4B33OSS 2015
Cache Design
Mapping function Determines which cache location the block will
occupy Replacement algorithm
Determines which block to replace LeastRecentlyUsed (LRU) algorithm
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Lecture 1/Page 43AE4B33OSS 2015
Cache Design
Write policy When the memory write operation takes place Can occur every time block is updated Can occur only when block is replaced
Minimizes memory write operations Leaves main memory in an obsolete state
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Lecture 1/Page 44AE4B33OSS 2015
Secondary Memory
Nonvolatile Auxiliary memory Used to store program and data files Harddrive SSD CD, DVD, BlueRay
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Lecture 1/Page 45AE4B33OSS 2015
Disk Cache
A portion of main memory used as a buffer to temporarily to hold data for the disk
Disk writes are clustered Some data written out may be referenced again. The
data are retrieved rapidly from the software cache instead of slowly from disk
Disk cache is organized by Operating system
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Lecture 1/Page 46AE4B33OSS 2015
Programmed I/O
I/O module performs the action, not the processor
Sets appropriate bits in the I/O status register
No interrupts occur Processor checks status until operation is
complete
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Lecture 1/Page 47AE4B33OSS 2015
InterruptDriven I/O Processor is interrupted when I/O
module ready to exchange data Processor saves context of program
executing and begins executing interrupthandler
No needless waiting Consumes a lot of processor time
because every word read or written passes through the processor
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Direct Memory Access
Transfers a block of data directly to or from memory
An interrupt is sent when the transfer is complete
Processor continues with other work
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Lecture 1/Page 49AE4B33OSS 2015
Direct Memory Access (DMA)
I/O exchanges occur directly with memory Processor grants I/O module authority to read from or
write to memory Relieves the processor responsibility for the exchange