Opening Remarks- Spintronics for Nonvolatile Electronics -

Hideo Ohno

http://www.csis.tohoku.ac.jp/

Center for Spintronics Integrated Systems Tohoku University, Sendai, Japan

Supported by the FIRST program of JSPS.

2011 Spintronics Workshop on LSIJune 13, 2011

Rihga Royal Hotel Kyoto, Kyoto, Japan

2011 Spintronics Workshop on LSI

2

ChallengesStatic powerDynamic powerInterconnection delayFeature size

NonvolatileSmallEmbedded in interconnectionPart of logic

Making memories

Nonvolatile CMOS Electronics

Comparison of memories

PRAM ReRAM MRAM Spin (STT)RAM FeRAM

Cell Size ～130 F2 4～8 F2 4 F2 4～6 F2 16～40 F2 4～ 64F2 12～25 F2

High Speed

Operation◎ ○ ○ ○ ○ ◎ ○

Nonvolatility － － ○ ○ ○ ○ ○

Endurance

(limitation

of W/E

cycle)

◎

(∞）

◎

(∞）○ ○ ◎ ◎ ○

Lower

power

operation○ ◎ △ △ △

○◎

Next Generation Nonvolatile MemorySRAM DRAM

⇒ ◎

T. Endoh, ITRS Emerging Research Memory Technologies Workshop2010T. Endoh, STS in SEMICON Korea2010 (Invited)

System (Memory) Hierarchy

current near future future

NonvolatileLogic-in-Memory

Magnetic tunnel junction based memory elements to counter dynamic and static power, and interconnection delay

Ohno et al. IEDM 2010

E E

Magnetic Tunnel JunctionA Spintronics Device

2

2

12(TMR) istanceMagnetoRes Tunnel

PP

RRR

P

PAP

−=

−=

Ferromagnet 1 Ferromagnet 2Insulator

Parallel

Antiparallel

Room temperature TMR: Miyazaki and Tezuka (Tohoku U.), J. Mag. Mag. Mat. 1995 and Moodera et al. Phys. Rev. Lett. 1995.

6

two terminal three terminal

Magnetic Tunnel Junction Configurations

nonvolatile, fast and high endurance

MTJ for VLSI: A wish list

1. Small footprint (F nm)2. High output (TMR ratio > 100%) 3. Nonvolatility (∆=E/kBT >40)4. Low switching current (IC0 < F µA)5. Back-end-of-the-line compatibility (350 oC)6. Endurance 7. Fast read & write8. Low resistance for low voltage operation9. Low error rate10. Low cost

E

Parallel Antiparallel

Thermal fluctuationkBT

E

Parallel Antiparallel

Thermal fluctuationkBT

Ic0 and ∆=E/kBT

> kBT

perpendicular

E

Parallel Antiparallel

Thermal fluctuationkBT

E

Parallel Antiparallel

Thermal fluctuationkBT E

Parallel Antiparallel

Thermal fluctuationkBT

E

Parallel Antiparallel

Thermal fluctuationkBT

Ic0 and ∆=E/kBT

( )shape crystallineE K K V= +

( )

E

KVgeI

KVVHME

BC

KS

αµαγ

∝

=

=

=

221

0

S. Ikeda et al., Nat. Mat. 9, 721 (2010), K. Miura et al., MMM 2010

Perpendicular MgO-CoFeB MTJ

SiO2/Si sub.

Ta

Ru

Cr/Au

TaCoFeB

CoFeBMgO

TaRu

40 nm

5 nm

(a)

(c)

(b)

Top electrode

Bottom electrode

interface perpendicularanisotropy

JC0 = 3.8 MA/cm2

(IC0 = 48 μA) E/kBT ~ 40TMR ratio = 110%Ta = 350oC

perpendicular

Scaling

TkEI BC 60for A][ 104.3 30 =×= µα

High and low αKS HMK21

= 0

10

20

30

40

50

60

70

80

90

100

0 0.01 0.02 0.03 0.04 0.05

IC0 = 100 µAIC0 = 50 µAIC0 = 30 µAIC0 = 20 µA

α

E/k B

T

α = 0.015 α = 0.029

α = 0.009

α = 0.006

( )

E

KVgeI

KVVHME

BC

KS

αµαγ

∝

=

=

=

221

0

In-planeCoFeB

α versus Ku

Ref. [1] E. P. Sajitha, et. al., IEEE Transactions on Magnetics, 46, 2056 (2010)[2] S. Mizukami, et. al., App. Phys. Lett., 96, 152502 (2010) [3] A. Barman, et. al., J. App. Phys., 101, 09D102 (2007) [4] J.-M. Beaujour, et. al., Phys. Rev. B., 80, 180415R (2009)[5] N. Fujita, et. al., J. Magn. Magn. Mater., 320, 3019 (2008)[6] S. Ikeda, et. al., Nat. Mat., 9, 721 (2010)

10-31E-3

0.01

0.1

1 CoFeB/Pd/[Co/Pd]x6 [1] Pt/Co/Pt [2] [Co/Pt]xn [3] Pd/Co/Pd/[Co/Ni]x3/Pd/Co/Pd [4] [Co/Pt]x12 [5] Ta/CoFeB/MgO [6]

10010-1 101

Dam

ping

par

amet

er, α

Ku (x105 J/m3)10-2

13

14

How small can we go?

CoPtCr-SiO2, Takei et al., Fuji Electric review 55 (2009) 6..

Center for Spintronics Integrated Systems

CSIS home page http://www.csis.tohoku.ac.jpTohoku University

Support office

Spintronics materials Shoji Ikeda (Tohoku Univ.)

Yasuo Ando (Tohoku Univ.)Spintronics devices

Fumihiro Matsukura (Tohoku Univ.)New spintronics materials and devices

Nobuyuki Ishiwata ( NEC )Spintronics processing

Takahiro Hanyu (Tohoku Univ.)Spintronics logic design and IP development

Tetsuo Endoh (Tohoku Univ.)Design tool development for spintronics VLSI

Tadahiko Sugibayashi ( NEC )Spintronics VLSI demonstration

Advisory Committee

Technical Advisory Committee

Steering Committee

Tsukuba site : Tsukuba Innovation Arena (TIA) Participating organization :Tohoku University, NEC, Hitachi, ULVAC,

National Institute of Material Science,University of Tokyo

Collaborating organization : AIST, JST

Center for Spintronics

Integrated Systems (CSIS)Director： Hideo OhnoDeputy Director： Tetsuo Endoh, Naoki Kasai

Funded by the FIRST Program of JSPS