Opamp - Gen
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WHAT ARE OPAMPS?
Most versatile and widely used electronic devices that allow you to
build useful circuits without needing to know their complex internal
circuitry
Low cost, easy, fun to work with
Self protecting internal circuitry β (forgiving of wiring errors)
Amplify DC as well as AC signals
Used for versatile operations today (as opposed to add/subtract
etcβ¦)
HISTORY OF OPAMPS
Idea of op-Amps goes way back to 1930s - Gain controlled amplifiers with negative feedback - Bell telephone Laboratories (Patent in 1941)
Around late 1940s and early 1950s - Non-transistorized version; vacuum tube op Amp
First solid state monolithic IC Op-amp(BJTs and FETs) was designed by Robert Wildar and introduced in 1963 by Fairchild semiconductors as uA702
The uA741 was designed by Dave Fullagar in 1967!
Op Amps are not new!! Just Improved. .
DIFFERENTIAL AMPLIFIER
Basic building block of an Op-Amp that amplifies the difference between two input signals
2 Emitter biased circuits
Transistors π1 & π2 are identical
π πΈ1 = π πΈ2 ; π πΆ1 = π πΆ2
+ππΆπΆ and βππΈπΈ have equal magnitudes
(w.r.t ground)
Two emitter biased circuits when connected in the given
manner, work like a differential amplifier
+ππΆπΆ and βππΈπΈ are made common
Both emitters are connected
π πΈ1 β₯ π πΈ2 is replaced by π πΈ
Inputs π1& π2 are applied at base of
π1 & π2
Output voltage is taken b/w
collectors
π πΆ1 = π πΆ2 = π πΆ
Ideally, when π1= π2 output voltage = 0
If π1 > π2 or π2> π1, output voltage with a polarity appears.
DIFFERENTIAL AMPLIFIER CONFIGURATIONS
Based on the NUMBER of Input signals and the WAY an Output voltage
is measured, we have the following configurations
Dual Input, Balanced Output differential amplifier (DIBO)
Dual Input, Unbalanced Output differential amplifier (DIUO)
Single Input, Balanced Output differential amplifier (SIBO)
Single Input, Unbalanced Output differential amplifier (SIUO)
DIBO
2 Inputs
Output measured
b/w collectors
DIUO
2 Inputs
Output measured b/w
one collector & ground
SIBO
1 Input
Output measured
b/w collectors
SIUO
1 Input
O/p measured b/w one
collector & ground
D.C. ANALYSIS OF A DIBO DIFFERENTIAL AMPLIFIER
To find Operating Points (πΌπΆπ& ππΆπΈπ) , a DC equivalent circuit is drawn by reducing Inputs (π1& π2) to 0 Applying KVL to Base β Emitter Loop of Q1,
W.K.T, π°π© = π°π¬π·π π & π°π¬ β π°πͺ
πΌπΈ = πΌπΆ =ππΈπΈ β ππ΅πΈ
2π πΈ +π ππ½ππ
π°π©πΉπΊπ + π½π©π¬ + ππ°π¬πΉπ¬ = π½π¬π¬
ππΆπΈπ = ππΆ β ππΈ
ππΆ = ππΆπΆ β πΌπΆπ πΆ ππΈ = βππ΅πΈ (ππ π π’ππππ ππππ πππππ π π πππ ππππππππππ)
ππΆπΈπ = ππΆπΆ + ππ΅πΈ β πΌπΆπ πΆ
π°π¬ = π°πͺ =π½π¬π¬ β π½π©π¬
ππΉπ¬
But, 2π πΈ β«π π
π½ππ
PROBLEM
The following specifications are given for a DIBO differential amplifier
π πΆ = 2.2. πΞ©, π πΈ = 4.7πΞ©, π ππ1 = π ππ2 = 50Ξ©, +πππ= 10π, βππΈπΈ= β10π,
+π½ππ= 100, ππ΅πΈ = 0.715π. Determine the operating points (πΌπΆπ & ππΆπΈπ)
of the two transistors
SYMBOL: Triangle which points in the direction of signal flow
Op-Amp has five terminals
(i) Positive Supply Voltage Terminal (+ππΆπΆ or +V)
(ii) Negative Supply Voltage Terminal (-ππΈπΈ or βV)
(iii) Output Terminal
(iv) Inverting input Terminal (marked -)
(v) Non-Inverting input Terminal (marked +)
Input at inverting terminal results in opposite polarity (anti phase)
output
Input at non-inverting terminal results in same polarity output
(in phase) output
Power Supply: Dual balanced Power Supply (typically Β± 15V or
±9V, ±12V, ±22V etc⦠)
DUAL SUPPLY: 2 DC supply voltages whose mid point is ground
BALANCED: Voltages of +ππΆπΆ and -ππΈπΈ are same in magnitude
Ideal Op-Amp is basically an amplifier that amplifies
difference between two input signals (Differential Amplifier in
its basic form)
Ideal Differential Amplifier - Amplifies difference between two
input voltage signals
Ideally, π0 β (π1 β π2)
DIFFERENTIAL GAIN
π½π = π¨π (π½π β π½π)
π0 = π΄πππ
π΄π : Differential Gain ; Constant of proportionality
ππ : Difference Voltage (π1 β π2)
Differential Gain may be expressed as
π΄π =π0ππ
π¨π (π π©) = ππ π₯π¨π πππ¨π
COMMON MODE GAIN
Ideally, if π1 = π2, then π0 = π΄π(π1 β π2) should be 0
Practically, common mode signal ππ is also present
π½π =π½π + π½π
π
Gain with which it amplifies common mode signal to produce output is
called common mode gain
π½π = π¨ππ½π
Total o/p of any Differential Amplifier
π½π = π¨ππ½π + π¨π π½π
IDEAL DIFFERENTIAL AMPLIFIER: Infinite π΄π and Zero π΄π
CMRR (Common Mode Rejection Ratio)
Common Mode Configuration: The common mode signal is interference, static and other kinds of undesirable pickup etc. common to both input terminals of OPAMP - should be rejected!
Ability to reject common mode signal is expressed by a ratio called
common mode rejection ratio (CMRR, π)
πͺπ΄πΉπΉ = π =π¨π
π¨π
πͺπ΄πΉπΉ π π© = ππ ππππ¨π
π¨π
Ideally, CMRR should be infinite (practically a large value)
IDEAL OP-AMP Characteristics
Ideal Op-Amp: 2 i/p signals π1 πππ π2 applied at non-inverting and
inverting terminals
Infinite Input Impedance: πΌ1 = πΌ2 = 0;
Any source can drive it and there is no loading on driver stage
Infinite Gain and hence differential input ππ = π1 β π2 = 0 for finite
voltage π0
Zero Output Impedance : Output voltage π0 is independent of current
drawn from o/p terminals
o/p can drive infinite number of other circuits.
The various characteristics of an Ideal Op-Amp are
Infinite Voltage Gain
Infinite Input Impedance
Zero Output Impedance
Zero Offset Voltage
Infinite Bandwidth
Infinite CMRR
Infinite Slew Rate
No effect of Temperature
Power Supply Rejection Ratio
Infinite Voltage Gain (π΄ππΏ): Differential Open Loop Gain and is
infinite for an ideal Op-Amp.
Infinite Input Impedance (π ππ): Infinite for ideal Op-Amp and
ensures that no current flows into an ideal Op-Amp
Zero Output Impedance (π π): Zero for an ideal Op-Amp and ensures
that o/p voltage of an Op-Amp remains the same irrespective of
the value of the load resistance connected
Zero Offset Voltage: Presence of a small output voltage even if
π1 β π2 = 0 is called βOffset Voltageβ - Zero for an Ideal Op-Amp
Ensures that output is zero for zero input signal
Infinite Bandwidth:
Bandwidth: Range of frequency over which satisfactory amplifier performance
is obtained
Infinite Bandwidth implies Operating frequency range is 0 to β
Ensures that gain of Op-Amp will be constant over freq. range from DC
frequency (0) to infinite frequency
Amplify AC as well as DC
Infinite CMRR: Infinite for ideal Op-Amp and ensures Zero Noise output voltage
( π΄πΆ = 0)
Infinite Slew Rate:
Slew Rate: Maximum rate of change of output voltage with time - π ππ
ππππ€ π ππ‘π π =ππ0ππ‘
(πππ₯πππ’π)
Infinite Slew Rate implies changes in the output voltage occurs simultaneously
with changes in the input voltage. (e.g. Step Input)
No effect of temperature: Characteristics of an op-amp does not
change with temperature
Power Supply Rejection Ratio (PSRR): This is defined as ratio of
change in input offset voltage due to changes in supply voltage
producing it, keeping other power supply voltage constant (Power
Supply Sensitivity)
If ππΈπΈ is constant and due to change in ππΆπΆ, there is change in
input offset voltage, then PSRR is expressed as,
πππ π =βππππ βππΆπΆ
(πππ ππ
πππ )
Similarly,
πππ π =βππππ βππΈπΈ
Ideal Voltage Transfer Curve
Voltage transfer curve: π½π plotted against π½π assuming constant gain β
TRANSFER CHARACTERISTICS
π0 is proportional to ππ only up to positive and negative saturation
voltages of Op-Amp & remains constant later
Practically saturation voltages are slightly less than + ππΆπΆ and - ππΈπΈ
INPUT STAGE
A βDIBOβ differential amplifier satisfies all requirements and is most commonly used as input stage
Voltage Gain
Constant Current
High Input Impedance
2 Terminals
Small Input Offset voltage
Small Input Offset current
High CMRR
CONSTANT CURRENT SOURCE β Provides high emitter resistance to basic circuit,
eliminates changes due to common mode signals (improves CMRR of circuit)
INPUT STAGE WITH CONSTANT CURRENT CIRCUIT
INTERMEDIATE STAGE
A βDIUOβ is used
Provide additional voltage gain
Cascade of amplifiers
Direct Coupling is done - No coupling capacitors used
LEVEL SHIFTING STAGE
Direct Coupling: Stage by stage DC level increases well above ground potential - βMay drive transistors into saturation, cause distortionβ
An Emitter Follower (Common Collector) with a voltage divider circuit is used in STAGE 3
High Input Impedance: Also prevents loading of gain stage
Low Output Impedance: Easily drives o/p stage
Level Shifter: Shifts DC level at o/p of Stage 2
downwards to 0v
Buffer: Isolates high gain stages from o/p stage
π½π = π½ππ β π½π©π¬
π½π β π½ππ = βπ½π©π¬ ;
πΌππππ πΊππππ ππππππππ = π. ππ½
OUTPUT STAGE
Supplies load and low o/p impedance
Large o/p voltage swing capability
Low Output Impedance
Low power dissipation
Short circuit protection
Class B push-pull amplifier may be used - Emitter Follower with
complementary transistors
Limitation: As long as πππ < ππ΅πΈ, output voltage remains 0 - causes
βCrossover Distortionβ
Diode biasing voltage causes both transistors to slightly conduct even
when no input signal is present
About 24 Transistors, few resistors, only 1 Capacitor, 2 power supplies and short circuit protection
EQUIVALENT CIRCUIT OF A PRACTICAL OPAMP
Op-Amp parameters are represented in terms of physical components for purpose of Analysis
π½π = π¨πΆπ³π½π = π½π β π½π
π¨πΆπ³ - Open Loop Voltage Gain
π½π = Difference Voltage
π½π - Non βInverting voltage w.r.t. ground
π½π - Inverting input voltage w.r.t ground
πΉππ - Input Resistance of Op-Amp
πΉπ - Output Resistance of Op-Amp
π¨πΆπ³π½π - Theveninβs Equivalent voltage source πΉπ - Theveninβs Equivalent resistance
PRACTICAL OP-AMP CHARACTERISTICS
OPEN LOOP GAIN: Voltage gain of op-amp without feedback (several thousands)
INPUT IMPEDANCE: Finite (>1MΞ© and may be increased to several Mπ΄ if FETs are
used in input stage)
OUTPUT IMPEDANCE: Finite (few 100 Ξ© and may be reduced to 1 - 2 Ξ© using
negative feedback)
BANDWIDTH: Finite and small in O.L. configuration (may be increased to a suitable
value by using a negative feedback)
INPUT OFFSET VOLTAGE: A small non-zero o/p voltage is present even if both i/p
terminals are grounded (ideally 0)
The D.C. voltage applied to a particular terminal that makes o/p voltage 0 when
other terminal is grounded is called Input Offset Voltage ππππ
Voltage, terminal, polarity etc specified by manufacturer
INPUT BIAS CURRENT: Practical Op-Amps have some current flowing into
the input terminals (10β6 β 10β14π΄)
Due to improper matching of transistors, I/p terminals (base terminals
of 2 transistors) conduct small amount of d.c. currents known as bias
currents (πΌπ1ππππΌπ2)
Manufacturers specify average bias current πΌπ
π°π =π°ππ + π°ππ
π
Transistors of the Differential Amplifier (used as i/p stages) must be
biased correctly
INPUT OFFSET CURRENT: Difference in magnitudes of πΌπ1 and πΌπ2 is called Input Offset Current
π°πππ = π°ππ β π°ππ
Magnitude: Small (20 β 60 nA) when input Vg = 0
QUESTIONS
If base currents for emitter coupled transistor of D.A. are 18ππ΄
and 22ππ΄, find Input bias current and Input Offset current
For a particular op-amp input offset current is 20nA while input
bias current is 60nA. Calculate values of two input bias
currents.
PSRR (POWER SUPPLY REJECTION RATIO): Change in offset voltage due
to change in supply producing it
SLEW RATE: Max rate of change of output voltage with time
πΊ =π π½π
π π
π½π¬π¬ const.,
π·πΊπΉπΉ =βπ½πππ
βπ½πͺπͺ
π½πͺπͺ const.,
π·πΊπΉπΉ =βπ½πππ
βπ½π¬π¬
Typically 30ππ/π for IC 741
Sq. wave is applied, βFβ is increased
till o/p is distorted and observed
Assume voltage rises from -6 to 6 in 24πs,
π =6 β (β6)
24= 0.5π/πs
Ideally it should be infinite!
When a high frequency large amplitude signal is given, internal capacitor
voltage cannot change simultaneously
If max internal charging current is known, S is also given by
πΊ =π°πππ
πͺ
FACTORS AFFECTING SLEW RATE
Charging rate of capacitor
Current limiting & saturation of
internal stages
π π½πͺ
π π=
π°
πͺ;
Small Capacitor
Large Charging Current High Charging Rate
SLEW RATE EQUATION Consider a sinusoidal input signal
ππ = πππ ππππ‘ Output voltage will also be purely sinusoidal
π0 = πππ ππππ‘
π π½π
π π= π½π ππππππ
π π½π
π ππππ
= πΊπππ πΉπππ = ππ½π
MAXIMUM SIGNAL FREQUENCY If the output is distortion free then, max allowable frequency of operation may be determined using slew rate
This frequency is called full power bandwidth of Op-Amp
πΊ = ππ ππ½π ; π½/π
ππππ =πΊ
ππ π½π
OPEN LOOP OPAMP CONFIGURATION
Configuration in which there is no feedback from output to
input
Output depends upon input but has no effect upon input
3 modes of operation
Differential Amplifier
Inverting Amplifier
Non-Inverting Amplifier
DIFFERENTIAL AMPLIFIER
Open Loop Differential Amplifier
π½π = π¨πΆπ³ π½π β π½π
π½π = π¨πΆπ³ π½π
π½πππ , π½πππ - Signal Sources πΉπΊπ , πΉπΊπ - Source Resistances
π½ππππ π½π can be AC or DC
Output Polarity depends upon polarity of difference voltage
INVERTING AMPLIFIER
Amplifier in which output is inverted - 180Β° phase shift with input
Open Loop Inverting Amplifier
π½π = π¨πΆπ³ π β π½π
π½π = π¨πΆπ³ π½π
Input is applied to inverting
terminal
N.I. terminal is grounded
π½π = βπ¨πΆπ³ π½πππ
NON INVERTING AMPLIFIER
Amplifier in which output is amplified without any phase shift between
input and output
Open Loop Non Inverting Amplifier
π½π = π¨πΆπ³ π½π β π
π½π = π¨πΆπ³ π½π
Input is applied to N.I. terminal
Inverting terminal is grounded
π½π = π¨πΆπ³ π½πππ
Large Gain of Op-Amp - A very small voltage input drives Op-amp
voltage to saturation
Voltage Transfer Curve
In O.L. configuration: Output is at +Vsat or βVsat
For A.C. inputs: Output may switch between +Vsat or βVsat
An Op-Amp with π¨πΆπ³ = πππ, πππ is used as a differential amplifier in open
loop mode. Input voltages are π½πππ = πππ½ (πππ) and
π½πππ = ππππ½ (πππ) Sketch the input and output waveforms. Op-amp
saturation voltages are Β±13π
CLOSED LOOP OPAMP CONFIGURATION
Configuration in which there is a feedback from output to
input
Feedback resistor βπ πβconnects output to
inverting input terminal
Resulting Gain β βClosed Loop Gainβ
For linear applications an Op-Amp is always used with a βNegative Feedbackβ β
controls gain
ADVANTAGES OF NEGATIVE FEEDBACK
Reduces gain and makes it controllable
Increases bandwidth (freq. range)
Increases input resistance ; decreases output resistance of op-amp
Reduces effects of temperature, power supply on gain of circuit
Realistic Simplifying Assumptions (Analysis of op-amp circuits)
1. ZERO INPUT CURRENT: Current drawn by either of input terminals is βzeroβ (practically πA or nA)
2. VIRTUAL GROUND: Differential input voltage βππβ is essentially zero
Under linear range of operation there is virtually a βshort circuitβ between the two input terminals (in the sense their voltages are same)
e.g. If N.I. terminal is grounded, by concept of virtual ground, inverting terminal is also at ground potential
π΄π ππππ π΄ππΏ β β ππππππππππ π£πππ‘πππ ππ β 0 π½π =π½π
π¨πΆπ³
BASIC LINEAR APPLICATIONS
Linear Application: Output Voltage varies linearly with respect to
input.
Negative feedback is the base of linear Applications
Realistic Assumptions may be used for analysis
3 Basic Configurations
Inverting Amplifier
Non Inverting Amplifier
Voltage Follower
CLOSED LOOP INVERTING AMPLIFIER
Phase Shift of 180Β° between input and amplified output
β’ *DERIVATION*
Expression for Closed Loop Gain
π¨πͺπ³ =π½π
π½ππ= β
πΉπ
πΉπ
A sine wave of 0.5V peak voltage is applied to an inverting
amplifier using π 1 = 10πΞ© and π π = 50πΞ© . Supply voltage used is
Β± 12π. Determine the output and sketch waveform.
If the amplitude of sine wave is now increased to 5V, what will be
the output?
CLOSED LOOP NON-INVERTING AMPLIFIER
Amplifies the input without any phase shift between input and
output
Expression for Closed Loop Gain
*DERIVATION*
π¨πͺπ³ =π½π
π½ππ= π +
πΉπ
πΉπ
QUESTION
For the op-amp configuration gain required is 61. Determine appropriate
value of feedback resistance π π
VOLTAGE FOLLOWER
A circuit in which output voltage follows the input voltage is called
a voltage follower circuit
Node B is at potential πππ. Node A is also at same same potential πππ
(Virtual Ground)
π½π¨ = π½π© = π½ππ
Node A is directly connected to output
π½π = π½π¨ = π½ππ
Voltage Gain here is unity
Also called source follower, unity gain amplifier, buffer amplifier,
isolation amplifier
PRACTICAL INVERTING AMPLIFIER
Input Resistance is less than infinity ; Open Loop voltage gain is less than infinity ;
Output resistance is not 0
π¨πͺπ³ = βπ¨πΆπ³ πΉπ
πΉπ + πΉπ + πΉππ¨πΆπ³
*DERIVATION*
CLOSED LOOP VOLTAGE GAIN (π¨πͺπ³)
PARAMETERS
Closed Loop Voltage Gain (π¨πͺπ³)
Input Resistance with Feedback (πΉπ°π΅π)
Output Resistance with Feedback (πΉππ)
BLOCK DIAGRAM OF PRACTICAL INVERTING AMPLIFIER
A β Forward Path Gain
π½ β Feedback Path Gain
K β Attenuation Factor
π¨πͺπ³ =π½π
π½ππ= β
π¨π²
π + π©π¨
π¨πͺπ³ = β
π¨πΆπ³
πΉπ
(πΉπ+πΉπ)
π +(πΉπ)
(πΉπ+πΉπ)π¨πΆπ³
We observe that
A : π¨πΆπ³ - Forward Path Gain
π· : (πΉπ)
(πΉπ+πΉπ) - Feedback Path Gain
K : πΉπ
(πΉπ+πΉπ) - Attenuation Factor
*DERIVATION*
MILLERβS THEOREM / MILLERβS THEOREM FOR VOLTAGES
In a linear circuit, if there exists a branch with impedance βZβ connecting
two nodes with nodal voltages V1 and V2, then we can replace this
branch by 2 branches connecting the corresponding nodes to ground by 2
impedances Z1 and Z2
Mainly used for analysis / simplification
π1 =π
1 β πΎ π2 =
πΎπ
πΎ β 1 πΎ =
π2π1
= ππππ πΏπππ πΊπππ
Feedback Resistor = πΉπ
π1 =π
1 β πΎ
π2 =πΎπ
πΎ β 1
=π π
1 + π΄ππΏ
=π ππ΄ππΏ
1 + π΄ππΏ
Millerized Resistance
πΎ = π. πΏ. πΊπππ = βπ΄ππΏ
INPUT RESISTANCE WITH FEEDBACK (πΉπππ)
To find Input Resistance with feedback, split π π into its Miller Components
πΉπππ = πΉπ +πΉππΉππ
πΉπ + πΉππ + π¨πΆπ³πΉππ
πΉπππ = πΉπ (ππ πππππ)
πΉπππ = πΉπ + [πΉπ
π + π¨πΆπ³β₯ πΉππ]
THEVENINβS THEOREM
Any circuit made up of resistors and sources, viewed from two terminals of that circuit, is equivalent to a VOLTAGE SOURCE in SERIES with a RESISTANCE, or to
a CURRENT SOURCE in PARALLEL with a RESISTANCE
VOLTAGE SOURCE = Open Circuit Voltage of the circuit
CURRENT SOURCE = Short Circuit Current of the circuit
RESISTANCE = Equivalent Resistance of the circuit
NOTE:
Independent source is set equal to zero, & equivalent resistance is found
Dependent sources are kept as it is & equivalent resistance is found
vTH
+
-
RTH A
B
~Any circuit
made up of
resistors and
sources
A
B
A
B
~ iN
RN
OUTPUT RESISTANCE WITH FEEDBACK (πΉπΆπ)
To find Output Resistance with feedback, an equivalent circuit using is found
using Theveninβs Theorem
Dependent source π΄ππΏππ is kept as it is
Independent Source πππ is made 0
πΉππ =πΉπ
π + π¨πΆπ³π·
*DERIVATION*
πΉπΆπ = πΉπ (ππ πππππ)
Feedback reduces output resistance
Output Resistance is π
π+π¨πΆπ³π· times that of
ideal o/p Resistance
For a practical Inverting Amplifier, values of π 1πππ π π are 470πΊ
and 4.7 kπΊ. Various specs. of the op-amp are
(a) Open loop Gain = 2 x 105
(b) Input resistance = 2M πΊ
(c) Output Resistance = 75 πΊ
(d) Supply = Β±15V
Calculate closed loop voltage gain, input resistance, output
resistance
PRACTICAL NON-INVERTING AMPLIFIER
Difference voltage is the difference between INPUT voltage and FEEDBACK
voltage
*DERIVATION*
CLOSED LOOP VOLTAGE GAIN (π¨πͺπ³)
π¨πͺπ³ =π½π
π½ππ=
π¨πΆπ³ πΉπ + πΉπ
πΉπ +πΉπ + π¨πΆπ³πΉπ
π¨πͺπ³ = π +πΉπ
πΉπ (ππ πππππ!)
BLOCK DIAGRAM OF PRACTICAL NON INVERTING AMPLIFIER
A β Forward Path Gain
π½ β Feedback Path Gain
π¨πͺπ³ =π½π
π½ππ=
π¨
π + π©π¨
π¨πͺπ³ = βπ¨πΆπ³
π +(πΉπ)
(πΉπ+πΉπ)π¨πΆπ³
We observe that
A : π¨πΆπ³ - Forward Path Gain
π· : (πΉπ)
(πΉπ+πΉπ) - Feedback Path Gain
*DERIVATION*
INPUT RESISTANCE WITH FEEDBACK (πΉπππ)
πΉπππ = πΉππ π + π¨πΆπ³π·
π πππΉ = π ππ (πππππ)
πΉπππ =π½ππ
π°ππ
πΌππ =πππ ππ
π0 = π΄ππΏππ
π°ππ =π½π π¨πΆπ³
πΉππ
π0πππ
=π΄ππΏ
1 + π΄ππΏπ½
Defined as ratio of input voltage πππ and input current πΌππ
π½ππ =π½π(π + π¨πΆπ³π·)
π¨πΆπ³
Substituting all the values,
OUTPUT RESISTANCE WITH FEEDBACK (πΉπΆπ)
To find Output Resistance with feedback, an equivalent circuit using is found
using Theveninβs Theorem
Dependent source π΄ππΏππ is kept as it is
Independent Source πππ is made 0
πΉππ =πΉπ
π + π¨πΆπ³π·
*DERIVATION*
πΉπΆπ = πΉπ (ππ πππππ)
For a non-inverting amplifier the values of π 1πππ π π are
1kπΊ and 10kπΊ respectively. Various op-amp parameters
are,
(a) Input resistance = 2M πΊ
(b) Output Resistance = 75 πΊ
(c) Open Loop Gain = 2 x 105
Calculate closed loop gain, input resistance, output
resistance
OPERATIONAL AMPLIFIER β PIN DETAILS
Circuit Symbol and Terminals
Triangle β Direction of flow
PIN (Part Identification Number)
8-pin mini DIP
Fabricated on a tiny silicon chip
Metal Can package:
Silicon chip is bonded to bottom metal
Available in 3, 5, 8, 10 and 12 leads configuration
Tab identifies pin 8
14 pin DIP /8 pin DIP
Available in plastic/ceramic case
Notch/Dot identifies pin 1.
Terminals are numbered counter clockwise
Identification Code
Letter Prefix: Manufacturer
Circuit Designation: Type of op-amp and temperature range
C : Commercial 0 to 70β
I : Industrial -25 to 80β
M : Military -55 to 125β
Letter Suffix: Package Style that houses the Op-Amp
D: Plastic dual-in-line for surface mounting on PC board
J: Ceramic dual-in-line
N,P: Plastic dual-in-line for insertion into sockets
e.g. LM 741C N