OpAmp Circuit Stability and Compensationhome.deib.polimi.it/spinelli/corsi/ele/L4.pdf ·...

Electronics – 96032

Alessandro SpinelliPhone: (02 2399) [email protected] home.deib.polimi.it/spinelli

OpAmp Circuit Stability and Compensation

Alessandro Spinelli – Electronics 96032

Slides are supplementary material and are NOT a

replacement for textbooks and/or lecture notes

Disclaimer 2


Acquisition chain 3

Sensor Filter ADC

small signal

noise

amplifiedsignal

amplifiednoise

amplifiedsignal

reducednoise

Amp

next lessons


• We begin our study with the analysis and design of simpleamplifiers

• Next lessons will deal with Basic amplifier principles and the feedback amplifier concept Linear applications of OpAmps Feedback amplifier properties Stability of feedback amplifiers (this lesson) Instrumentation amplifiers and single-supply OpAmp circuits

Purpose of the lesson 4


• Frequency response of feedback amplifiers• Stability of feedback amplifiers• Compensation• Appendix

Outline 5


• Open-loop gain can usually be expressed as

𝐴𝐴 𝑠𝑠 =𝐴𝐴0

1 + 𝑠𝑠𝜏𝜏• 𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺 is the unity-gain frequency

𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺 =𝐴𝐴0

2𝜋𝜋𝜏𝜏

OA parameter: gain-bandwidth product 6

𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺


Actual values from datasheets 7


Actual values from datasheets 8

Dependent on 𝑉𝑉𝑐𝑐𝑐𝑐, 𝑅𝑅𝐿𝐿, 𝑇𝑇,…


𝐺𝐺 =𝐺𝐺𝑂𝑂𝐿𝐿(𝑠𝑠)

1 − 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙(𝑠𝑠)=

𝐺𝐺𝑖𝑖𝑖𝑖(𝑠𝑠)1 − 1/𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙(𝑠𝑠)

≈𝐺𝐺𝑖𝑖𝑖𝑖 ∀ 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 ≫ 1𝐺𝐺𝑂𝑂𝐿𝐿 ∀ 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 ≪ 1

where

𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 𝑠𝑠 = −𝐺𝐺𝑂𝑂𝐿𝐿 𝑠𝑠𝐺𝐺𝑖𝑖𝑖𝑖 𝑠𝑠

⇒ 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 𝑠𝑠𝑖𝑖𝑑𝑑

= 𝐺𝐺𝑂𝑂𝐿𝐿 𝑠𝑠 𝑖𝑖𝑑𝑑 − 𝐺𝐺𝑖𝑖𝑖𝑖 𝑠𝑠 𝑖𝑖𝑑𝑑

Frequency response 9


Bode plot 10

𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙(𝑠𝑠)

𝐺𝐺𝑂𝑂𝐿𝐿(𝑠𝑠)

𝐺𝐺(𝑠𝑠)

𝐺𝐺𝑖𝑖𝑖𝑖(𝑠𝑠)

� 𝑖𝑖𝑑𝑑

log 𝑓𝑓




Example: single-pole amplifier 11

𝐴𝐴02𝜋𝜋𝜏𝜏

= 𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝑓𝑓𝑇𝑇 =𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝑖𝑖𝑖𝑖


𝐺𝐺𝑂𝑂𝐿𝐿 𝑠𝑠 = 𝐴𝐴(𝑠𝑠)

𝐺𝐺(𝑠𝑠)𝐺𝐺𝑖𝑖𝑖𝑖(𝑠𝑠)


log 𝑓𝑓𝑅𝑅1

𝑅𝑅2‒

+


𝐺𝐺 =𝐺𝐺𝑖𝑖𝑖𝑖

1 − 1𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙(𝑠𝑠)

=𝐺𝐺𝑖𝑖𝑖𝑖

1 + 𝑅𝑅1 + 𝑅𝑅2𝐴𝐴 𝑠𝑠 𝑅𝑅1

The pole position is(𝑅𝑅1 + 𝑅𝑅2)(1 + 𝑠𝑠𝜏𝜏)

𝐴𝐴0𝑅𝑅1= −1

𝑠𝑠 = −1𝜏𝜏

1 +𝐴𝐴0𝑅𝑅1𝑅𝑅1 + 𝑅𝑅2

= −1𝜏𝜏

1 − 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 0 ⇒ 𝑓𝑓𝑙𝑙 ≈𝐴𝐴02𝜋𝜋𝜏𝜏

𝑅𝑅1𝑅𝑅1 + 𝑅𝑅2

Analytical solution 12

Open-looppole


• For a non-inverting amplifier we have

𝑓𝑓𝑙𝑙 ≈12𝜋𝜋𝜏𝜏

𝐴𝐴0𝐺𝐺𝑖𝑖𝑖𝑖

⇒ 𝑓𝑓𝑙𝑙𝐺𝐺𝑖𝑖𝑖𝑖 =𝐴𝐴02𝜋𝜋𝜏𝜏

= 𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺

• In an inverting configuration we should write𝑓𝑓𝑙𝑙 1 + |𝐺𝐺𝑖𝑖𝑖𝑖| = 𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺,

which becomes the same for high gains• The feedback loop reduces the (open-loop) gain by 1 − 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙(0)

and widens the bandwidth by the same factor

Gain-bandwidth product 13



Outline 14


• Stability only depends on 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙• The critical condition is 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 = 1, i.e., −𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 = −1

Stability of feedback systems 15

𝐺𝐺𝑂𝑂𝐿𝐿

𝐹𝐹

+-𝑆𝑆𝑖𝑖𝑖𝑖 𝑆𝑆𝑙𝑙𝑜𝑜𝑜𝑜

𝐹𝐹𝑆𝑆𝑙𝑙𝑜𝑜𝑜𝑜

𝜀𝜀


• If 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙(𝑠𝑠) only has poles in LHP (or in 𝑠𝑠 = 0)

There is only one critical frequency 𝑓𝑓0𝑖𝑖𝑑𝑑 where the magnitude −𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 is0 dB

∠ −𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 𝑓𝑓0𝑖𝑖𝑑𝑑 > −180°

• Then, the system is stable

Bode stability criterion (1945) 16


• If 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙(𝑠𝑠) only has poles in LHP (or in 𝑠𝑠 = 0)

There is only one frequency 𝑓𝑓−180 where the phase of −𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 is −180°(± multiples of 360°)

𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 𝑓𝑓−180 < 1

• Then, the system is stable

An alternative definition 17


𝐺𝐺𝑚𝑚 =1

𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 𝑓𝑓−180⇒ �𝐺𝐺𝑚𝑚

𝑖𝑖𝑑𝑑= − 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 𝑓𝑓−180 𝑖𝑖𝑑𝑑

𝜑𝜑𝑚𝑚 = 180 + ∠ −𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 𝑓𝑓0𝑖𝑖𝑑𝑑• 𝐺𝐺𝑚𝑚 and 𝜑𝜑𝑚𝑚 represent how much increase in gain or phase lag the

system can withstand before becoming unstable• Important in real systems, where transfer functions are subjected

to tolerances

Gain and phase margins 18


If poles and zeros are in LHP, stability can be inferred from Bode plot:

Simplified Bode criterion 19

𝜑𝜑𝑚𝑚 ≈ 45°

log 𝑓𝑓

-2𝜑𝜑𝑚𝑚 ≈ 0°

log 𝑓𝑓-1

𝜑𝜑𝑚𝑚 ≈ 90°

log 𝑓𝑓𝜑𝜑𝑚𝑚 ≈ 45°

log 𝑓𝑓

-2

-2

-1

-1


How much phase margin? 20



Outline 21


• Is the tailoring of 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙(𝑠𝑠) in order to improve the circuit stability• Most OAs are «internally compensated» to ease their use with

resistive feedback, and have a single pole above 0dB• For frequency-dependent feedback, stability must be checked and

compensation applied (if needed)

Frequency compensation of OpAmps 22


Dominant pole compensation 23

×

𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 𝑠𝑠𝑖𝑖𝑑𝑑

log 𝑓𝑓

• Used in OA internalcompensation

• Put (usually) a large capacitor at the output of the OA

• Large reduction of bandwidth ⇒ use only ifno other option is available


Gain compensation

• Circuit becomes more stable asgain is increased

• Bandwidth and static precisionare reduced (check 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙)

• Useful in uncompensatedversions of OAs

24

𝐺𝐺𝑂𝑂𝐿𝐿 𝑠𝑠

𝐺𝐺(𝑠𝑠) 𝐺𝐺𝑖𝑖𝑖𝑖(𝑠𝑠)


log 𝑓𝑓

𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 𝑠𝑠


Lead compensation (𝒇𝒇𝒛𝒛 < 𝒇𝒇𝒑𝒑) 25

𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 = −𝐴𝐴 𝑠𝑠𝑅𝑅1

𝑅𝑅1 + 𝑅𝑅21 + 𝑠𝑠𝐶𝐶𝑐𝑐𝑅𝑅2

1 + 𝑠𝑠𝐶𝐶𝑐𝑐(𝑅𝑅1ǁ 𝑅𝑅2)

‒

+

𝑅𝑅1𝑅𝑅2

𝐶𝐶𝑐𝑐

12𝜋𝜋𝜏𝜏1

12𝜋𝜋𝜏𝜏2

𝐴𝐴 𝑠𝑠 𝑖𝑖𝑑𝑑

log 𝑓𝑓


Resulting loop gain

• The zero cancels the secondpole of the OA

• The ideal gain is modified

𝐺𝐺𝑖𝑖𝑖𝑖𝐼𝐼 = −𝑅𝑅2𝑅𝑅1

11 + 𝑠𝑠𝐶𝐶𝑐𝑐𝑅𝑅2

𝐺𝐺𝑖𝑖𝑖𝑖𝑁𝑁𝐼𝐼 =𝑅𝑅1 + 𝑅𝑅2𝑅𝑅1

1 + 𝑠𝑠𝐶𝐶𝑐𝑐 𝑅𝑅1ǁ 𝑅𝑅21 + 𝑠𝑠𝐶𝐶𝑐𝑐𝑅𝑅2

26

𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙,𝐺𝐺𝑖𝑖𝑖𝑖 𝑖𝑖𝑑𝑑

log 𝑓𝑓

12𝜋𝜋𝜏𝜏1

12𝜋𝜋𝜏𝜏2

Zero can also be placed here, to achieve 𝜙𝜙𝑚𝑚 = 45°


𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 = −𝐴𝐴 𝑠𝑠𝑍𝑍1

𝑍𝑍1 + 𝑅𝑅2= −𝐴𝐴 𝑠𝑠

𝑅𝑅1𝑅𝑅1 + 𝑅𝑅2

11 + 𝑠𝑠𝐶𝐶𝑖𝑖(𝑅𝑅1ǁ 𝑅𝑅2)

Example: input capacitance 27

12𝜋𝜋𝜏𝜏

12𝜋𝜋𝐶𝐶𝑖𝑖 𝑅𝑅1ǁ 𝑅𝑅2


log 𝑓𝑓

‒

+

𝑅𝑅1𝑅𝑅2

𝐶𝐶𝑖𝑖


Compensation of input capacitance 28


𝑅𝑅1 + 𝑅𝑅21 + 𝑠𝑠𝐶𝐶𝑐𝑐𝑅𝑅2

1 + 𝑠𝑠(𝐶𝐶𝑖𝑖+𝐶𝐶𝑐𝑐)(𝑅𝑅1ǁ 𝑅𝑅2)

‒

+

𝑅𝑅1𝑅𝑅2

𝐶𝐶𝑖𝑖

𝐶𝐶𝑐𝑐


Resulting loop gain 29

12𝜋𝜋𝜏𝜏

𝑓𝑓𝑙𝑙 =1

2𝜋𝜋(𝐶𝐶𝑖𝑖+𝐶𝐶𝑐𝑐) 𝑅𝑅1ǁ 𝑅𝑅2𝑓𝑓𝑧𝑧 =

12𝜋𝜋𝐶𝐶𝑐𝑐𝑅𝑅2

𝑓𝑓𝑙𝑙 𝑓𝑓𝑧𝑧𝑓𝑓𝑙𝑙 < 𝑓𝑓𝑧𝑧


log 𝑓𝑓


• 𝐶𝐶𝑐𝑐 modifies the closed-loop gain ⇒ stability is traded off againstbandwidth (now given by 𝑓𝑓𝑧𝑧)

• Another possibility is 𝐶𝐶𝑐𝑐𝑅𝑅2 = 𝐶𝐶𝑖𝑖𝑅𝑅1 (pole-zero cancellation), butkeep in mind that 𝐶𝐶𝑖𝑖 is never constant in reality…

• In differential amplifiers, use symmetric compensation

Notes… 30


𝑍𝑍 does not affect 𝐺𝐺𝑖𝑖𝑖𝑖, but can degrade 𝑍𝑍𝑖𝑖𝑖𝑖 in NI amplifiers

Lag network (𝒇𝒇𝒑𝒑 < 𝒇𝒇𝒛𝒛) 31


𝑅𝑅1 + 𝑅𝑅21 + 𝑠𝑠𝐶𝐶𝑐𝑐𝑅𝑅𝑐𝑐

1 + 𝑠𝑠𝐶𝐶𝑐𝑐(𝑅𝑅𝑐𝑐 + 𝑅𝑅1ǁ 𝑅𝑅2)

𝑅𝑅𝑐𝑐

𝐶𝐶𝑐𝑐

‒

+

𝑅𝑅1𝑅𝑅2

𝑍𝑍


A small resistor 𝑅𝑅𝑐𝑐 between the OA inputs can reduce 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙and provide compensation. However, reducing 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 is usuallynot a good solution…

Example: differentiator 32

𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 = −𝐴𝐴 𝑠𝑠1

1 + 𝑠𝑠𝑅𝑅(𝐶𝐶 + 𝐶𝐶𝑖𝑖)

‒

+

𝑅𝑅

𝐶𝐶𝑖𝑖

𝐶𝐶


Yet another compensation 33

LF: HF:

‒

+

𝑅𝑅

𝐶𝐶𝑖𝑖

𝐶𝐶𝑅𝑅𝐶𝐶

‒

+

𝑅𝑅𝐶𝐶𝑅𝑅𝐶𝐶 ‒

+

𝑅𝑅

𝐶𝐶𝑖𝑖

𝑅𝑅𝐶𝐶


• 𝑓𝑓𝑙𝑙2 is usually at high frequency and can be neglected

• Lag network (𝑓𝑓𝑙𝑙1 < 𝑓𝑓𝑧𝑧) can be used for compensation

• Closed-loop gain bandwidth limited to 12𝜋𝜋𝑅𝑅𝑐𝑐𝐶𝐶

Poles and zeros 34

𝑓𝑓𝑧𝑧 =1

2𝜋𝜋𝐶𝐶𝑅𝑅𝑐𝑐𝑓𝑓𝑙𝑙1 ≈

12𝜋𝜋𝐶𝐶 𝑅𝑅𝑐𝑐 + 𝑅𝑅

; 𝑓𝑓𝑙𝑙2 ≈1

2𝜋𝜋𝐶𝐶𝑖𝑖 𝑅𝑅𝑐𝑐ǁ𝑅𝑅


Additional pole in 𝐺𝐺𝑙𝑙𝑙𝑙𝑙𝑙𝑙𝑙 must be above 𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺 (say, 10 𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺) ⇒maximum load capacitance is

Capacitive load 35

𝐶𝐶𝐿𝐿‒

+

𝑅𝑅1𝑅𝑅2𝑅𝑅𝑙𝑙

𝐶𝐶𝐿𝐿 ≈1

2𝜋𝜋𝑅𝑅𝑙𝑙(10 𝐺𝐺𝐺𝐺𝐺𝐺𝐺𝐺)


Compensation – 1 36

𝑓𝑓𝑧𝑧 =1

2𝜋𝜋𝐶𝐶𝐿𝐿𝑅𝑅𝑐𝑐𝑓𝑓𝑙𝑙 ≈

12𝜋𝜋𝐶𝐶𝐿𝐿(𝑅𝑅𝑐𝑐 + 𝑅𝑅𝑙𝑙)

If 𝑅𝑅1 + 𝑅𝑅2 ≫ 𝑅𝑅𝑙𝑙

𝐶𝐶𝐿𝐿

‒

+

𝑅𝑅1𝑅𝑅2𝑅𝑅𝑙𝑙 𝑅𝑅𝐶𝐶



Outline 37


Compensation – 2 38

𝐶𝐶𝐿𝐿

‒

+

𝑅𝑅1𝑅𝑅2

𝑅𝑅𝑙𝑙 𝑅𝑅𝐶𝐶𝐶𝐶𝑐𝑐

OpAmp Circuit Stability and Compensationhome.deib.polimi.it/spinelli/corsi/ele/L4.pdf ·...

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