Online-Resume-BartonT

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Tim Barton [email protected] Member Technical Staff, Software Over 22 years of extensive Embedded Systems software development experience in C, C++, and Assembly Language at both the Application and Device Driver levels. Application design domains include GPS, Wireless Networking, Wireless Communications, and Electronic Warfare. Possess a strong hardware background with Board Design and Bring-Up experience. TECHNICAL SUMMARY: Engineering Process: CMMI, Some DO-178B Methodologies: UML, Object-Oriented Design and Analysis, Waterfall Model Languages: C, C++, Assembly, Visual Basic, Some Python RTOS: VxWorks, pSOS, Proprietary Processors: PowerPC, ADSP 21XX, Motorola 68K, Intel iAPX86 Platforms: ACE, Microsoft Windows, MS-DOS, UNIX Signal Processing: GPS Satellite Search and Acquisition, Radar Warning Receiver Data Limitation, Separation, and Correlation Networking: ATM, IP Wireless: CDMA Modems, TDMA Modems Satellite: Modernized and Legacy GPS Systems, Satellite Communications CM Tools: ClearCase, ClearQuest, SourceSafe, Perforce, and Continuus Requirements Tools: Slate, DOORS PC Software: Visual Basic GUIs, Visual Basic for Excel, Visual C++ .net SECURITY CLEARANCE: Active D.O.D Security Clearance. __________________________________________________________________________________ PROFESSIONAL EXPERIENCE: Trimble Military and Advanced Systems, Sunnyvale, CA 2007 Present Member Technical Staff Wrote software requirements, design, and test documentation for two Modernized GPS Receiver programs using UML, MS Word, and DOORS. Documentation was critically reviewed by the customer and formally accepted, allowing contract progression and completion. Represented the company’s software technical effort to the customer as part of formal program design reviews. All reviews for two programs have been completed and accepted by the customer and both contracts are complete. Ported Proprietary RTOS to a new ASIC PowerPC platform by rewriting platform-specific Kernel code in Assembly and C. Discovered four long-standing bugs in mature Proprietary RTOS code base through visual analysis and UML modeling. Developed Device Drivers in C and Assembly for new Modernized GPS ASIC hardware. Brought-Up several new boards by porting software to the new Embedded Hardware and working with the hardware team to integrate and debug the new system. Refactored legacy C code in parallel with adding new functionality. Adapted GPS Wide-Aperture Satellite Signal Search and Verification software to accommodate new high-speed Search Engine and new Signal Correlation and Tracking hardware. Algorithm accommodated Doppler time and frequency shifts and variable time delays.

Transcript of Online-Resume-BartonT

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Tim Barton

[email protected]

Member Technical Staff, Software Over 22 years of extensive Embedded Systems software development experience in C, C++, and Assembly Language at both the Application and Device Driver levels. Application design domains include GPS, Wireless Networking, Wireless Communications, and Electronic Warfare. Possess a strong hardware background with Board Design and Bring-Up experience.

TECHNICAL SUMMARY: Engineering Process: CMMI, Some DO-178B Methodologies: UML, Object-Oriented Design and Analysis, Waterfall Model Languages: C, C++, Assembly, Visual Basic, Some Python RTOS: VxWorks, pSOS, Proprietary Processors: PowerPC, ADSP 21XX, Motorola 68K, Intel iAPX86 Platforms: ACE, Microsoft Windows, MS-DOS, UNIX Signal Processing: GPS Satellite Search and Acquisition, Radar Warning Receiver Data

Limitation, Separation, and Correlation Networking: ATM, IP Wireless: CDMA Modems, TDMA Modems Satellite: Modernized and Legacy GPS Systems, Satellite Communications CM Tools: ClearCase, ClearQuest, SourceSafe, Perforce, and Continuus Requirements Tools: Slate, DOORS PC Software: Visual Basic GUIs, Visual Basic for Excel, Visual C++ .net

SECURITY CLEARANCE: Active D.O.D Security Clearance.

__________________________________________________________________________________

PROFESSIONAL EXPERIENCE:

Trimble Military and Advanced Systems, Sunnyvale, CA 2007 – Present

Member Technical Staff

Wrote software requirements, design, and test documentation for two Modernized GPS Receiver programs using UML, MS Word, and DOORS. Documentation was critically reviewed by the customer and formally accepted, allowing contract progression and completion.

Represented the company’s software technical effort to the customer as part of formal program design reviews. All reviews for two programs have been completed and accepted by the customer and both contracts are complete.

Ported Proprietary RTOS to a new ASIC PowerPC platform by rewriting platform-specific Kernel code in Assembly and C.

Discovered four long-standing bugs in mature Proprietary RTOS code base through visual analysis and UML modeling.

Developed Device Drivers in C and Assembly for new Modernized GPS ASIC hardware.

Brought-Up several new boards by porting software to the new Embedded Hardware and working with the hardware team to integrate and debug the new system.

Refactored legacy C code in parallel with adding new functionality.

Adapted GPS Wide-Aperture Satellite Signal Search and Verification software to accommodate new high-speed Search Engine and new Signal Correlation and Tracking hardware. Algorithm accommodated Doppler time and frequency shifts and variable time delays.

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Implemented a new Satellite Search and Signal Verification algorithm utilizing new ASIC hardware. This software provided a new search and acquisition capability that was previously unavailable on prior systems.

Integrated an updated tool chain into the program development environment and distributed the configured and integrated tools to the Software Development Team.

Implemented an Object-Oriented Software Build System in Python that was used both for software development as well as formal software builds.

Northrop Grumman Electronic Systems, San Jose, CA 2002 - 2007

Senior Embedded Software Engineer,

Analyzed requirements for Radar Warning Receiver (RWR) suite upgrade program and wrote Requirements Specification using Slate and MS Word.

Designed and implemented Signal Processing improvements to data limiting, pattern matching, pulse separation, and pattern error correction software for RWR Deinterleaver. Enhancements were made to existing C code base running on VxWorks to improve multiple threat identification and monitoring capabilities. Demonstrated improved signal processing by using a precision radar simulator with a series of carefully selected complex and difficult signal scenarios.

Developed Partitioned Memory Block Manager software with built in leak detection capability and real-time fault detection in C to replace VxWorks PowerPC library which had significant bugs. Leak detection capability allowed several memory leaks to be detected and fixed in a few hours each.

Trained to be a CMMI appraisal team member and worked to improve the Software Department’s process maturity level. Served as an appraisal team member for a formal CMMI Level-3 Software SCAMPI and assisted in awarding the Software Department a Level-3 rating.

IOSpan Wireless Inc., San Jose, CA 2000 - 2002

Senior Software Engineer

Designed Network Base Station Connection Switch Management software using Object-Oriented Design and Analysis with UML modeling.

Implemented Connection Management software in C++ utilizing ACE and VxWorks and integrated software on an Embedded PowerPC platform. Verified software on target switch hardware using system hardware and software along with test bench code. Only a single bug was found subsequent to integration over the following year of development.

Alcatel, Sunnyvale, CA (Stanford Wireless Broadband Inc., Newbridge Networks) 1998 - 2000

Senior Software Engineer

Developed ATM wireless network Connection Management and Control software in C for LMDS Wireless Gateway PowerPC platform running pSOS.

Modified TDMA Remote Gateway RF Modem controller software and Device Drivers to accommodate hardware upgrade. Verified updates using Oscilloscopes, Spectrum Analyzers, and system hardware and software.

Stanford Telecommunications Inc., Sunnyvale, CA 1992 - 1998

Hardware / Firmware Design Engineer,

Performed Board, FPGA, and Embedded Software design in C and Assembly for Telephony, Satellite Telecommunications, and Wireless Networking products. Application domains spanned CDMA, TDMA, ATM, and POTS technologies.

EDUCATION: BS in Computer Engineering, San Jose State University

REFERENCES: Available upon request.