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SEMINAR PRESENTATION

B Y

A N K I T T H A R WA N ID E PA R T M E N T O F E L E C T R O N I C S A N D C O M M U N I C AT I O N E N G I N E E R I N G

M A L AV I YA N AT I O N A L I N S T I T U T E O F T E C H N O L O G Y J A I P U R

NoC – Network on Chip

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What are SoC’s and NoC’s?

According to Wikipedia :--“ System-on-chip refers to integrating all components of a

computer or other electronic system into a single

integrated circuit (chip).”

--“Network -on-a-chip (NoC) is a new paradigm for System-on-Chip (SoC) design. The NoC solution brings a

networking method to on-chip communications and claims roughly a threefold performance increase over conventional bus systems.”

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System on Chip (SoC)• With many tens of milliontransistors available on asingle chip, the System-on-Chip (SOC) has become a

reality.• Design with IP reuse ismandatory .Integrated processor cores,DSPs, on-chip memories,IP- blocks, etc…are commonly in use.

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Traditional SoC nightmare

Variety of dedicated interfacesDesign and verification complexity Unpredictable performanceMany underutilized wires

DMA CPU DSP

Bridge

IO IO IOC

A

B Peripheral Bus

CPU Bus

Controlsignals

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Evolution of on-chip communication

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Network on Chip: A paradigm Shift inVLSI

s

s

s

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s s

s

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Module

Module

s

Module

From: Dedicated signal wires To: Shared network

Point-To-pointLink

Network switch

ComputingModule

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NoC essential

• Communication by packets of bits•

Routing of packets through several hops, via switches• Efficient sharing of wires• Parallelism

s

s

s

s

s s

s

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Module

Module

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Modul

e

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Critical problems addressed by NoC

1) Global interconnect design problem:delay, power, noise, scalability, reliability

2 ) System integrationproductivity problem

3) Chip Multi Processors(key to power-efficient computing)

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From buses to networks

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Regular Network on Chip

PE

PE

PE

PE

PE

PE

PE

PE

PE

PERouter

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Generic On-Chip Router

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Data abstractions

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Layers of abstraction in network modeling

Software layersApplication, OS

Network & transport layersNetwork topology e.g. crossbar, ring, mesh, torus, fat tree,…Switching Circuit / packet switching etc.

Addressing Logical/physical, source/destination, flow, transactionRouting Static/dynamic, distributed/source, deadlock avoidanceQuality of Service e.g. guaranteed-throughput, best-effortCongestion control, end-to-end flow control

Data link layerFlow control (handshake)Handling of contentionCorrection of transmission errors

Physical layerWires, drivers, receivers, repeaters, signaling, circuits,..

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OSI Layered Model• Open System Interconnect (OSI) Model is general purpose

network model• NoC employs at present Physical layer, Data Link Layer and

Network Layer in detail

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Typical NoC design flow

PlaceModules

Determine routingand adjust link capacities

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Adopted from large-scale networks andparallel computingTopology classifications:Direct topologiesIndirect topologies

NoC Topology The connection map between PEs

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Direct topologies

Each switch (SW) connected to a single PEAs the # of nodes in the system increases, thetotal bandwidth also increases

1 PE is

connectedto only a singleSW

PE

PE PE

PE

SW

SW SW

SW

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Indirect topologies

Fat tree topology

A set of PEs are connected to a switch (router)

PE PEPEPE PE PE PEPE

SW

SW

SW

SW SW SW

SW

Butterfly topology

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Adaptive Systems Laboratory, Univ. of Aizu 19

NoC Switching Strategies

There are two basic modes:Circuit switchingPacket switching

Switching determines how flits and packets flowsthrough routers in the network

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Circuit SwitchingNetwork resources (channels) are reserved before a packet is sentEntire path must be reserved first The packets do not contain routing information, but rather dataand information about the data.Circuit-switched networks require no overhead for packetization,

packet header processing or packet bufferingOnce circuit is setup, router latency and control overheads are very low Very poor use of channel bandwidth if lots of short packets mustbe sent to many different destinationsMore commonly seen in embedded SoC applications where trafficpatterns may be static and involve streaming large amounts of data between different IP blocks

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Packet SwitchingStore and Forward (SAF)

We can aim to make better use of channel resourcesby buffering packets . We then arbitrate for accessto network resources dynamically.Packet is sent from one router to the next only if the

receiving router has buffer space for entire packetBuffer size in the router is at least equal to the sizeof a packet

Switch

Buffer

Switch

Buffer

Switch

Buffer

Forward packet by packet

Store and Forward switching

data flit header flit

packet

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Bibliography

Wikipedia – System on ChipWikipedia – Network on ChipGuerrier and Greiner (2000) “A generic architecture for on -chip packet- switched interconnections”

Hemani et al. (2000) “Network on chip: An architecture forbillion transistor era”De Micheli and Benini (2002) “Networks on chip: A new paradigm for systems on chip design”

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Thank You