New Abstract Project(2)

8/2/2019 New Abstract Project(2)

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ABSTRACT

With the growing population of the country and its rising electric power

need, the demands on the power grid continue to climb its ladder day by day.

Particularly at the domain of mobile base station & networks, recent analysis by

manufacturers and network operators has shown that current wireless networks are

not very energy efficient, in specific to the base stations by which terminals access

services from the network. A typical mobile phone network may consume approx

40-50MW, even excluding the power consumed by users handsets. When direct

electricity connections are not readily available, these service providers use diesel

to power their network. As a result, a polluted environment is established and a

whole of about 1% of the total power generation is being consumed by the mobile

networks itself. The ratio might seem to be a small sector but at industrial point of

view it is extremely a huge sum.

The specific object of this project is to provide a solution to this problem of

power demand by means of implementing a technology that will enable efficient

energy saving in BTS. To be precise its a pollution free technology where its aim

is to keep only one mobile tower in active mode to take up all communications

while the remaining towers are put into an idle state where there is no higher power

consumption thereby saving power. When the users limit crosses the

predetermined level, the neighboring towers are turned into active mode

accordingly. Hence the project is to create an efficient method for reduction of

total energy being consumed by the mobile tower. This approach also extends at

the site of without any modification to the existing infrastructure. Thus the power

could be saved at a greater rate. With the reduction in total power consumption the

amount of carbon dioxide emissions into the atmosphere is being lowered, thereby

providing a pollution free clean environment.


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LIST OF FIGURES

FIGURE NO FIGURE NAME PAGE NO

1.1.a Power Consumption In MCS 2

1.1.b Time Vs Cost In Mc 2

2.1.a Overall Block Diagram 9

2.2.1.a Resistor Color Code 10

2.2.2.a Polarized Capacitor And its

Circuit Symbol

12

2.2.2.b Unpolarized Capacitor And its

Circuit Symbol

13

2.2.3.a Diodes And Its Circuit Symbol 14

2.2.3.b Zener Diode And Its Circuit Symbol 15

2.2.4.a Light Emitting Diode And Its

Circuit Symbol

16

2.2.5.a Thermistor And Its Circuit Symbol 17

2.2.6.a LDR And Its Circuit Symbol 18

3.1.a Pic Overall Circuit Diagram 19

3.1.1.a Dual Power Supply 21

3.1.2.a Voltage Sensing Circuit 24

3.1.3.a Current Sensing Circuit 26

3.1.5.a Responder Frequency To VoltageConversion Circuit

27

3.1.6.a Dc Voltage Measurement Circuit 28

3.2.a Bock Diagram Of Regulated Power

Supply System

29

3.2.b Transformer And Its Waveform 29


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3.2.c Transformer With Rectifier And Its

Waveform

30

3.2.d Transformer With Rectifier and

Smoothing

30

3.2.e Transformer With Rectifier,

Smoothing And Regulator

30

3.2.2.1.a Bridge Rectifier And Its Output 33

3.2.3.a Smoothing And Its Waveform 33

3.2.4.a Regulator 34

3.3.5.a Pin Diagram Of PIC16F877A 37

3.5.a ULN 2003 Pin 41

3.5.2.a Relay Driving Circuit 43

3.6.a Max 232 44

3.7.a DB-9 Connector 46

3.9.a Transmitter And Receiver Circuit 49

LIST OF TABLES

TABLE NO DESCRIPTION PAGE NO

1.1a Power Consumption/Bts 2

3.7a DB-9 Pin Detail 46


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LIST OF ABBREVIATIONS

AC - Alternating Current

ADC - Analog - to - Digital Converter

ADCON - Analog to Digital Controller

BCF - Bit Clear File

CO - Change-Over

CS - Chip Select

CT - Center Tap

DC - Direct Current

DPST - Double Pole Single Throw

DPDT - Double Pole Double Throw

IC - Integrated Circuit

I/O - Input/Output

LED - Light Emitting Diode

LDR - Light Dependent Resistor

MCLR - Master Clear Reset

NC - Normally Closed

NO - Normally Open

OST - Oscillator Start-up Timer

PGC - Programming Clock

PGD - Programming Debug

PGM - Programming Mode

PIC - Peripheral Interface Controller

POR - Power-On Reset

PSP - Parallel Slave Port


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PUT - Power -Up Timer

PWM - Pulse Width Modulation

QPDT - Quadruple Pole Double Throw

RAM - Random Access Memory

RA - Port A

RB - Port B

RC - Port C

RD - Port D

RE - Port E

RD/RW - Read/Write

RISC - Reduced Instruction Set Computer

RMS - Root Mean Square

SSP - Synchronous Serial Port

SPST - Single Pole Single Throw

SPDT - Single Pole Double Throw

TRISA - Temporary Storage Register A

TRISB - Temporary Storage Register B

TRISC - Temporary Storage Register C

TRISD - Temporary Storage Register D

TRISE - Temporary Storage Register E

TTL - Transistor Transistor Logic

USART - Universal Asynchronous Receiver Transmitter

VLSI - Very Large Scale Integration

VREF - Voltage Reference

WR - Write

WDT - Watch Dog Timer

New Abstract Project(2)

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