Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar...

16
Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006
  • date post

    20-Dec-2015
  • Category

    Documents

  • view

    219
  • download

    5

Transcript of Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar...

Page 1: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Network based System on Chip

Students: Medvedev AlexeyShimon Ofir

Supervisor: Walter Isaschar (Zigmond)

Winter-Spring 2006

Page 2: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Problem

• In modern high-speed systems that contain a lot of components traffic is a major problem.

• Components are interacting with each other using a bus.

Page 3: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Problem

BUS

I/O ETC…CACHE

CPU FPU MEM

Page 4: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Problem

• This architecture has certain disadvantages: low speed, allows to connect only two components at a given

time, no parallel access, unconfigurable.

Page 5: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Solution

Page 6: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Solution

• On-chip packet-switched networks have been proposed as a solution for the problem of global interconnect in deep sub-micron VLSI Systems on Chip (SoC).

Page 7: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Solution• Networks on Chip (NoC) can address and contain

major physical issues such as parallelization, noise, error correction, speed optimization.

• NoC can also improve design productivity by supporting modularity and reuse of complex cores, thus enabling a higher level of abstraction in architectural modeling of future systems.

Page 8: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Project Goals

• Understand NoC protocol

• Implement NoC and NoC router using a FPGA system

• Implement Flow Control Unit and Hot-Spot Controller

Page 9: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Example:

FCU FCU

FCUHot-Spot

DataData

Data DataData

Data

High Priority Data Low

Priority Data

R

Transmission Request

DataData

Page 10: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

NoC Router

SwitchSwitch

Buffers

(with Virtual Channels and wormhole data transfer)

Page 11: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Virtual Channels & Wormholes• Wormhole means that the data is

transmitted in a constant flow rather than in packets.

• Using virtual channel we can manage to transmit more than one data stream through a router.

Page 12: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

HW & SW used• Xilinx ML-310

Evaluation board with VirtexII Pro FPGA

• HDL designer• ModelSim 6.1• Xilinx EDK 6.3i

Page 13: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Project ScheduleWeek 1: Get familiar with the Virtex II pro FPGA Week 2: Get familiar with the PowerPC 405

processorWeek 3-4: Studying the VHDL programming

language. Week 5: Get familiar with the FPGA design

process.Week 6: Studying the EDK software for

developing SoC

Page 14: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Week 7: Writing a simple application.

Week 8-9: Developing NoC protocol

Week 10-12: Implementing a simple router for NoC.

Week 13-14: Implementing a basic NoC.

Project Schedule

Page 15: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

Project Schedule (second semester)

• Implementing a Source Flow Control Unit

• Implementing a Hot-Spot Flow Control Unit (Scheduler) for bandwidth - consuming components.

Page 16: Network based System on Chip Students: Medvedev Alexey Shimon Ofir Supervisor: Walter Isaschar (Zigmond) Winter-Spring 2006.

The End